Alpha PALcode built-ins, primarily for privileged code, are used in the same way that Alpha instruction built-ins are used with two exceptions: o For the queue PAL functions, the compiler does not move the input arguments to the Alpha registers before issuing the PAL call as it does for all other functions. Therefore, you must supply the code to do that. o When using a built-in for a PAL call that returns a value, the source code must explicitly read R0 for the return value. Certain Alpha PALcode built-ins, EVAX_INSQHIQR, EVAX_INSQTIQR, EVAX_REMQHIQR, and EVAX_REMQHITR, support the manipulation of quadword queues, a function that VAX MACRO does not support. If you use these built-ins, you must supply the code to move the input arguments to R16 (and R17, for EVAX_INSQxxxx), as shown in the following example: MOVAB Q_header, R16 ; Set up address of queue header for PAL call EVAX_REMQHIQR ; Remove quadword queue entry EVAX_STQ R0, entry ; Save entry address returned in R0 The Alpha PALcode built-ins are listed in the following table. NOTE You can use the .DEFINE_PAL compiler directive to custom- define a built-in for an Alpha PALcode operation that is not listed in this table. Built-in Operands Description EVAX_CFLUSH <RQ> Cache flush EVAX_DRAINA <> Drain aborts EVAX_LDQP <AQ> Load quadword physical EVAX_STQP <AQ,RQ> Store quadword physical EVAX_SWPCTX <AQ> Swap privileged context EVAX_BUGCHK <RQ> Bugcheck EVAX_CHMS <> Change mode supervisor EVAX_CHMU <> Change mode user EVAX_IMB <> Instruction memory barrier EVAX_SWASTEN <RQ> Swap AST enable EVAX_WR_PS_SW <RQ> Write processor status software field EVAX_MTPR_ASTEN <RQ> Move to processor register ASTEN EVAX_MTPR_ASTSR <RQ> Move to processor register ASTSR EVAX_MTPR_AT <RQ> Move to processor register AT EVAX_MTPR_FEN <RQ> Move to processor register FEN EVAX_MTPR_IPIR <RQ> Move to processor register IPIR EVAX_MTPR_IPL <RQ> Move to processor register IPL EVAX_MTPR_PRBR <RQ> Move to processor register PRBR EVAX_MTPR_SCBB <RQ> Move to processor register SCBB EVAX_MTPR_SIRR <RQ> Move to processor register SIRR EVAX_MTPR_TBIA <> Move to processor register TBIA EVAX_MTPR_TBIAP <> Move to processor register TBIAP EVAX_MTPR_TBIS <AQ> Move to processor register TBIS EVAX_MTPR_TBISD <AQ> Move to processor register, TB invalidate single DATA EVAX_MTPR_TBISI <AQ> Move to processor register, TB invalidate single ISTREAM EVAX_MTPR_ESP <AQ> Move to processor register ESP EVAX_MTPR_SSP <AQ> Move to processor register SSP EVAX_MTPR_USP <AQ> Move to processor register USP EVAX_MFPR_ASN <> Move from processor register ASN EVAX_MFPR_AT <> Move from processor register AT EVAX_MFPR_FEN <> Move from processor register FEN EVAX_MFPR_IPL <> Move from processor register IPL EVAX_MFPR_MCES <> Move from processor register MCES EVAX_MFPR_PCBB <> Move from processor register PCBB EVAX_MFPR_PRBR <> Move from processor register PRBR EVAX_MFPR_PTBR <> Move from processor register PTBR EVAX_MFPR_SCBB <> Move from processor register SCBB EVAX_MFPR_SISR <> Move from processor register SISR EVAX_MFPR_TBCHK <AQ> Move from processor register TBCHK EVAX_MFPR_ESP <> Move from processor register ESP EVAX_MFPR_SSP <> Move from processor register SSP EVAX_MFPR_USP <> Move from processor register USP EVAX_MFPR_WHAMI <> Move from processor register WHAMI EVAX_INSQHILR <> Insert entry into longword queue at head interlocked-resident EVAX_INSQTILR <> Insert entry into longword queue at tail interlocked-resident EVAX_INSQHIQR <> Insert entry into quadword queue at head interlocked-resident EVAX_INSQTIQR <> Insert entry into quadword queue at tail interlocked-resident EVAX_REMQHILR <> Remove entry from longword queue at head interlocked-resident EVAX_REMQTILR <> Remove entry from longword queue at tail interlocked-resident EVAX_REMQHIQR <> Remove entry from quadword queue at head interlocked-resident EVAX_REMQTIQR <> Remove entry from quadword queue at tail interlocked-resident EVAX_GENTRAP <> Generate trap exception EVAX_READ_UNQ <> Read unique context EVAX_WRITE_UNQ <RQ> Write unique context