Optimization and code alignment can affect the addresses
    assigned to labels defined in psects that have the EXE and NOMIX
    attributes. Optimization and code alignment are disabled by
    default, and can be enabled with the /OPTIMIZE and /ALIGNMENT
    command-line qualifiers and the .ENABLE directive In general, the
    assembler assigns the psect and offset of the current location
    counter before optimization or alignment of code labels. However,
    the assembler adjusts references to labels in branch instructions
    to the address of the label after optimization and code alignment
    processing. The assembler does not adjust references to labels
    where the label reference occurs in an expression with more than
    one term. The following example shows this:

            .PSECT CODE, EXE, NOMIX
            BSR     R0, 10$            ; R0 -> 10$ (postoptimization)
    10$:    LDA     R1, 20$-10$(R0)    ; R1 -> 20$ (preoptimization)
            JMP     (R1)
            [...]
    20$:

    In the previous example, the assembler adjusts the target
    address of the BSR instruction to be the location of 10$ after
    optimization and code alignment have taken place. Thus, the
    branch to 10$ functions as expected. However, when processing the
    LDA instruction, the assembler computes the offset between 20$
    and 10$ before optimization and code alignment. Thus, the address
    of 20$ that is stored in R1 is the address prior to optimization
    and code alignment. Depending on the sequence of instructions
    between 10$ and 20$, the address before optimization and code
    alignment may differ from the address after optimization and code
    alignment and the JMP instruction may not transfer control to the
    expected address.

    Note also that the assembler only performs postoptimization
    adjustment of label addresses when the label is the only term
    in the expression. For example:

            .PSECT CODE, EXE, NOMIX
            .BASE R27,LINKAGE
            LDQ     R26, ROUTINE1_ADDR
            JSR     R26, (R26)
            LDQ     R26, ROUTINE2_ADDR
            JSR     R26, (R26)
            RET     R28
            NOP
            NOP

    ROUTINE1:
            RET     (R26)
    ROUTINE2:
            RET     (R26)

            .PSECT LINKAGE, NOEXE
    LINKAGE:
    ROUTINE1_ADDR:
            .ADDRESS ROUTINE1
    ROUTINE2_ADDR:
            .ADDRESS ROUTINE2+0

    In the previous example, the assembler adjusts the address stored
    with the .ADDRESS ROUTINE1 directive to the address of label
    ROUTINE1 after optimization and code alignment. However, since
    the expression in the .ADDRESS ROUTINE2+0 directive is not a
    single term, the assembler adds the offset 0 and the address
    of ROUTINE2 before optimization and code alignment and stores
    the result. Since the address stored is the address before
    optimization and code alignment, the second JSR instruction may
    not transfer control to the address that is expected.