This topic provides figures and tables showing the data types
and addressing capabilities of the Alpha architecture. The
information is derived from the Alpha Architecture Quick
Reference Guide. Minor changes have been made to reflect the
usage of the Alpha architecture that is specific to MACRO-64.
For more information, see the Alpha Architecture Reference Manual
and the OpenVMS Calling Standard.
1 – Register Usage Conventions
Register Usage Conventions for OpenVMS Alpha lists the register
usage conventions for OpenVMS Alpha. MACRO-64 recognizes FP and
SP as register synonyms, but does not recognize AI, RA, or PV as
register synonyms.
Table 11 Register Usage Conventions for OpenVMS Alpha
R0 Int func ret value
R1 Scratch
R2-R15 Saved
R16- Argument
R21
R22- Scratch
R24
R25 AI Argument information
R26 RA Return address
R27 PV Procedure value
R28 Volatile scratch
R29 FP Stack frame base
R30 SP Stack pointer
R31 Zero
F0 F-P function ret value
F1 F-P complex func ret value
F2-F9 Saved
F10- Scratch
F15
F16- Argument
F22
F23- Scratch
F30
F31 Zero
2 – Instruction Operand Notation
Instruction Operand Notation shows the notation for instruction
operands. The notation format is as follows:
<name>.<access type><data type>
Table 12 Instruction Operand Notation
<name>:
disp Displacement field
fnc PALcode function field
Ra Integer register operand in the Ra field
Rb Integer register operand in the Rb field
#b Integer literal operand in the Rb field
Rc Integer register operand in the Rc field
Fa Floating-point register operand in the Ra field
Fb Floating-point register operand in the Rb field
Fc Floating-point register operand in the Rc field
<access type>:
a The operand is used in an address calculation to form an
effective address. The data-type code that follows indicates
the units of addressability (or scale factor) applied to
this operand when the instruction is decoded.
i The operand is an immediate literal.
m The operand is both read and written.
r The operand is read only.
w The operand is write only.
<data type>:
b Byte
f F_floating
g G_floating
l Longword
q Quadword
s IEEE single floating (S_floating)
t IEEE double floating (T_floating)
w Word
x The data type is specified by the instruction.
3 – Instruction Qualifier Notation
Instruction Qualifier Notation shows the notation for instruction
qualifiers.
Table 13 Instruction Qualifier Notation
/QualifierMeaning
C Chopped rounding
D Dynamic rounding
(mode determined by FPCR<DYN>)
I Inexact result enable
M Minus infinity rounding
S Software completion enable
U Floating underflow enable
V Integer overflow enable
4 – F-P Control Register (FPCR) Format
F-P Control Register (FPCR) Format shows the format for the F-P
control register.
Table 14 F-P Control Register (FPCR) Format
Bits Symbol Meaning
63 SUM Bitwise OR of <57:52>
62:60 RAZ Read as zero; ignored when written
/IGN
59:58 DYN IEEE rounding mode selected:
00 Chopped
01 Minus infinity
10 Normal rounding
11 Plus infinity
57 IOV Integer overflow of destination precision
56 INE Floating mathematically inexact result
55 UNF Floating underflow of destination exponent
54 OVF Floating overflow of destination exponent
53 DZE Floating divide with divisor of zero
52 INV Floating invalid operand value
51:0 RAZ Read as zero; ignored when written
/IGN
5 – Decodable Pseudo-Operations
Decodable Pseudo-Operations lists the decodable pseudo-operations
and their associated actual instructions.
Table 15 Decodable Pseudo-Operations
Pseudo- Actual
Operation Instruction
BR target BR R31,target
CLR Rx BIS R31,R31,Rx
FABS Fx,Fy CPYS F31,Fx,Fy
FCLR Fx CPYS F31,F31,Fx
FMOV Fx,Fy CPYS Fx,Fx,Fy
FNEG Fx,Fy CPYSN Fx,Fx,Fy
FNOP CPYS F31,F31,F31
MOV Lit,Rx LDA Rx,lit(R31)
MOV {Rx BIS R31,{Rx/Lit8},Ry
/Lit8},Ry
MF_FPCR Fx MF_FPCR Fx,Fx,Fx
MT_FPCR Fx MT_FPCR Fx,Fx,Fx
NEGF Fx,Fy SUBF F31,Fx,Fy
NEGF/S Fx,Fy SUBF/S F31,Fx,Fy
NEGG Fx,Fy SUBG F31,Fx,Fy
NEGG/S Fx,Fy SUBG/S F31,Fx,Fy
NEGL {Rx SUBL R31,{Rx/Lit},Ry
/Lit8},Ry
NEGL/V {Rx SUBL/V R31,{Rx/Lit},Ry
/Lit8},Ry
NEGQ {Rx SUBQ R31,{Rx/Lit},Ry
/Lit8},Ry
NEGQ/V {Rx SUBQ/V R31,{Rx/Lit},Ry
/Lit8},Ry
NEGS Fx,Fy SUBS F31,Fx,Fy
NEGS/SU Fx,Fy SUBS/SU F31,Fx,Fy
NEGS/SUI Fx,FY SUBS/SUI F31,Fx,Fy
NEGT Fx,Fy SUBT F31,Fx,Fy
NEGT/SU Fx,Fy SUBT/SU F31,Fx,Fy
NEGT/SUI Fx,FY SUBT/SUI F31,Fx,Fy
NOP BIS R31,R31,R31
NOT {Rx ORNOT R31,{Rx/Lit},Ry
/Lit8},Ry
SEXTL {Rx ADDL R31,{Rx/Lit},Ry
/Lit},Ry
UNOP LDQ_U R31,0(Rx)
6 – Common Architecture Opcodes in Numerical Order
This table lists the common architecture opcodes in numerical
order.
MACRO-64 Alpha Architecture Quick Reference
A.6 Common Architecture Opcodes in Numerical Order
Table_A-6_Common_Architecture_Opcodes_in_Numerical_Order
Opcode________________Opcode________________Opcode___
00 CALL_PAL 11.26 CMOVNE 15.01E CVTDG/C
01 OPC01 11.28 ORNOT 15.020 ADDG/C
02 OPC02 11.40 XOR 15.021 SUBG/C
03 OPC03 11.44 CMOVLT 15.022 MULG/C
04 OPC04 11.46 CMOVGE 15.023 DIVG/C
05 OPC05 11.48 EQV 15.02C CVTGF/C
06 OPC06 11.64 CMOVLE 15.02D CVTGD/C
07 OPC07 11.66 CMOVGT 15.02F CVTGQ/C
08 LDA 12.02 MSKBL 15.03C CVTQF/C
09 LDAH 12.06 EXTBL 15.03E CVTQG/C
0A OPC0A 12.0B INSBL 15.080 ADDF
0B LDQ_U 12.12 MSKWL 15.081 SUBF
0C OPC0C 12.16 EXTWL 15.082 MULF
0D OPC0D 12.1B INSWL 15.083 DIVF
0E OPC0E 12.22 MSKLL 15.09E CVTDG
0F STQ_U 12.26 EXTLL 15.0A0 ADDG
10.00 ADDL 12.2B INSLL 15.0A1 SUBG
10.02 S4ADDL 12.30 ZAP 15.0A2 MULG
10.09 SUBL 12.31 ZAPNOT 15.0A3 DIVG
10.0B S4SUBL 12.32 MSKQL 15.0A5 CMPGEQ
10.0F CMPBGE 12.34 SRL 15.0A6 CMPGLT
10.12 S8ADDL 12.36 EXTQL 15.0A7 CMPGLE
10.1B S8SUBL 12.39 SLL 15.0AC CVTGF
10.1D CMPULT 12.3B INSQL 15.0AD CVTGD
10.20 ADDQ 12.3C SRA 15.0AF CVTGQ
10.22 S4ADDQ 12.52 MSKWH 15.0BC CVTQF
10.29 SUBQ 12.57 INSWH 15.0BE CVTQG
10.2B S4SUBQ 12.5A EXTWH 15.100 ADDF/UC
10.2D CMPEQ 12.62 MSKLH 15.101 SUBF/UC
10.32 S8ADDQ 12.67 INSLH 15.102 MULF/UC
10.3B S8SUBQ 12.6A EXTLH 15.103 DIVF/UC
10.3D CMPULE 12.72 MSKQH 15.11E CVTDG
/UC
10.40 ADDL/V 12.77 INSQH 15.120 ADDG
/UC
10.49 SUBL/V 12.7A EXTQH 15.121 SUBG
/UC
10.4D CMPLT 13.00 MULL 15.122 MULG
/UC
10.60 ADDQ/V 13.20 MULQ 15.123 DIVG
/UC
10.69 SUBQ/V 13.30 UMULH 15.12C CVTGF
/UC
10.6D CMPLE 13.40 MULL/V 15.12D CVTGD
/UC
11.00 AND 13.60 MULQ/V 15.12F CVTGQ
/VC
11.08 BIC 14 OPC14 15.180 ADDF
/U
11.14 CMOVLBS 15.000 ADDF/C 15.181 SUBF
/U
11.16 CMOVLBC 15.001 SUBF/C 15.182 MULF
/U
11.20 BIS 15.002 MULF/C 15.183 DIVF
/U
11.24 CMOVEQ 15.003 DIVF/C 15.19E CVTDG
/U
15.1A0 ADDG/U 15.580 ADDF/SU 16.0A6 CMPTLT
15.1A1 SUBG/U 15.581 SUBF/SU 16.0A7 CMPTLE
15.1A2 MULG/U 15.582 MULF/SU 16.0AC CVTTS
15.1A3 DIVG/U 15.583 DIVF/SU 16.0AF CVTTQ
15.1AC CVTGF/U 15.59E CVTDG/SU 16.0BC CVTQS
15.1AD CVTGD/U 15.5A0 ADDG/SU 16.0BE CVTQT
15.1AF CVTGQ/V 15.5A1 SUBG/SU 16.0C0 ADDS
/D
15.400 ADDF/SC 15.5A2 MULG/SU 16.0C1 SUBS
/D
15.401 SUBF/SC 15.5A3 DIVG/SU 16.0C2 MULS
/D
15.402 MULF/SC 15.5AC CVTGF/SU 16.0C3 DIVS
/D
15.403 DIVF/SC 15.5AD CVTGD/SU 16.0E0 ADDT
/D
15.41E CVTDG/SC 15.5AF CVTGQ/SV 16.0E1 SUBT
/D
15.420 ADDG/SC 16.000 ADDS/C 16.0E2 MULT
/D
15.421 SUBG/SC 16.001 SUBS/C 16.0E3 DIVT
/D
15.422 MULG/SC 16.002 MULS/C 16.0EC CVTTS
/D
15.423 DIVG/SC 16.003 DIVS/C 16.0EF CVTTQ
/D
15.42C CVTGF/SC 16.020 ADDT/C 16.0FC CVTQS
/D
15.42D CVTGD/SC 16.021 SUBT/C 16.0FE CVTQT
/D
15.42F CVTGQ/SC 16.022 MULT/C 16.100 ADDS
/UC
15.480 ADDF/S 16.023 DIVT/C 16.101 SUBS
/UC
15.481 SUBF/S 16.02C CVTTS/C 16.102 MULS
/UC
15.482 MULF/S 16.02F CVTTQ/C 16.103 DIVS
/UC
15.483 DIVF/S 16.03C CVTQS/C 16.120 ADDT
/UC
15.49E CVTDG/S 16.03E CVTQT/C 16.121 SUBT
/UC
15.4A0 ADDG/S 16.040 ADDS/M 16.122 MULT
/UC
15.4A1 SUBG/S 16.041 SUBS/M 16.123 DIVT
/UC
15.4A2 MULG/S 16.042 MULS/M 16.12C CVTTS
/UC
15.4A3 DIVG/S 16.043 DIVS/M 16.12F CVTTQ
/VC
15.4A5 CMPGEQ/S 16.060 ADDT/M 16.140 ADDS
/UM
15.4A6 CMPGLT/S 16.061 SUBT/M 16.141 SUBS
/UM
15.4A7 CMPGLE/S 16.062 MULT/M 16.142 MULS
/UM
15.4AC CVTGF/S 16.063 DIVT/M 16.143 DIVS
/UM
15.4AD CVTGD/S 16.06C CVTTS/M 16.160 ADDT
/UM
15.4AF CVTGQ/S 16.06F CVTTQ/M 16.161 SUBT
/UM
15.500 ADDF/SUC 16.07C CVTQS/M 16.162 MULT
/UM
15.501 SUBF/SUC 16.07E CVTQT/M 16.163 DIVT
/UM
15.502 MULF/SUC 16.080 ADDS 16.16C CVTTS
/UM
15.503 DIVF/SUC 16.081 SUBS 16.16F CVTTQ
/VM
15.51E CVTDG/SUC 16.082 MULS 16.180 ADDS
/U
15.520 ADDG/SUC 16.083 DIVS 16.181 SUBS
/U
15.521 SUBG/SUC 16.0A0 ADDT 16.182 MULS
/U
15.522 MULG/SUC 16.0A1 SUBT 16.183 DIVS
/U
15.523 DIVG/SUC 16.0A2 MULT 16.1A0 ADDT
/U
15.52C CVTGF/SUC 16.0A3 DIVT 16.1A1 SUBT
/U
15.52D CVTGD/SUC 16.0A4 CMPTUN 16.1A2 MULT
/U
15.52F CVTGQ/SVC 16.0A5 CMPTEQ 16.1A3 DIVT
/U
16.1AC CVTTS/U 16.5AF CVTTQ/SV 16.7BC CVTQS
/SUI
16.1AF CVTTQ/V 16.5C0 ADDS/SUD 16.7BE CVTQT
/SUI
16.1C0 ADDS/UD 16.5C1 SUBS/SUD 16.7C0 ADDS
/SUID
16.1C1 SUBS/UD 16.5C2 MULS/SUD 16.7C1 SUBS
/SUID
16.1C2 MULS/UD 16.5C3 DIVS/SUD 16.7C2 MULS
/SUID
16.1C3 DIVS/UD 16.5E0 ADDT/SUD 16.7C3 DIVS
/SUID
16.1E0 ADDT/UD 16.5E1 SUBT/SUD 16.7E0 ADDT
/SUID
16.1E1 SUBT/UD 16.5E2 MULT/SUD 16.7E1 SUBT
/SUID
16.1E2 MULT/UD 16.5E3 DIVT/SUD 16.7E2 MULT
/SUID
16.1E3 DIVT/UD 16.5EC CVTTS/SUD 16.7E3 DIVT
/SUID
16.1EC CVTTS/UD 16.5EF CVTTQ/SVD 16.7EC CVTTS
/SUID
16.1EF CVTTQ/VD 16.6AC CVTST/S 16.7EF CVTTQ
/SVID
16.2AC CVTST 16.700 ADDS/SUIC 16.7FC CVTQS
/SUID
16.500 ADDS/SUC 16.701 SUBS/SUIC 16.7FE CVTQT
/SUID
16.501 SUBS/SUC 16.702 MULS/SUIC 17.010 CVTLQ
16.502 MULS/SUC 16.703 DIVS/SUIC 17.020 CPYS
16.503 DIVS/SUC 16.720 ADDT/SUIC 17.021 CPYSN
16.520 ADDT/SUC 16.721 SUBT/SUIC 17.022 CPYSE
16.521 SUBT/SUC 16.722 MULT/SUIC 17.024 MT_
FPCR
16.522 MULT/SUC 16.723 DIVT/SUIC 17.025 MF_
FPCR
16.523 DIVT/SUC 16.72C CVTTS/SUIC 17.02A FCMOVEQ
16.52C CVTTS/SUC 16.72F CVTTQ/SVIC 17.02B FCMOVNE
16.52F CVTTQ/SVC 16.73C CVTQS/SUIC 17.02C FCMOVLT
16.540 ADDS/SUM 16.73E CVTQT/SUIC 17.02D FCMOVGE
16.541 SUBS/SUM 16.740 ADDS/SUIM 17.02E FCMOVLE
16.542 MULS/SUM 16.741 SUBS/SUIM 17.02F FCMOVGT
16.543 DIVS/SUM 16.742 MULS/SUIM 17.030 CVTQL
16.560 ADDT/SUM 16.743 DIVS/SUIM 17.130 CVTQL/V
16.561 SUBT/SUM 16.760 ADDT/SUIM 17.530 CVTQL/SV
16.562 MULT/SUM 16.761 SUBT/SUIM 18.0000 TRAPB
16.563 DIVT/SUM 16.762 MULT/SUIM 18.0400 EXCB
16.56C CVTTS/SUM 16.763 DIVT/SUIM 18.4000 MB
16.56F CVTTQ/SVM 16.76C CVTTS/SUIM 18.4400 WMB
16.580 ADDS/SU 16.76F CVTTQ/SVIM 18.8000 FETCH
16.581 SUBS/SU 16.77C CVTQS/SUIM 18.A000 FETCH_M
16.582 MULS/SU 16.77E CVTQT/SUIM 18.C000 RPCC
16.583 DIVS/SU 16.780 ADDS/SUI 18.E000 RC
16.5A0 ADDT/SU 16.781 SUBS/SUI 18.F000 RS
16.5A1 SUBT/SU 16.782 MULS/SUI 19 PAL19
16.5A2 MULT/SU 16.783 DIVS/SUI 1A.0 JMP
16.5A3 DIVT/SU 16.7A0 ADDT/SUI 1A.1 JSR
16.5A4 CMPTUN/SU 16.7A1 SUBT/SUI 1A.2 RET
16.5A5 CMPTEQ/SU 16.7A2 MULT/SUI 1A.3 JSR_
COROUTINE
16.5A6 CMPTLT/SU 16.7A3 DIVT/SUI 1B PAL1B
16.5A7 CMPTLE/SU 16.7AC CVTTS/SUI 1C OPC1C
16.5AC CVTTS/SU 16.7AF CVTTQ/SVI 1D PAL1D
1E PAL1E 2A LDL_L 36 FBGE
1F PAL1F 2B LDQ_L 37 FBGT
20 LDF 2C STL 38 BLBC
21 LDG 2D STQ 39 BEQ
22 LDS 2E STL_C 3A BLT
23 LDT 2F STQ_C 3B BLE
24 STF 30 BR 3C BLBS
25 STG 31 FBEQ 3D BNE
26 STS 32 FBLT 3E BGE
27 STT 33 FBLE 3F BGT
28 LDL 34 BSR
29 LDQ 35 FBNE
7 – OpenVMS PALcode Instruction Summary
OpenVMS Unprivileged PALcode Instructions lists the OpenVMS
unprivileged PALcode instructions and OpenVMS Privileged PALcode
Instructions lists the OpenVMS privileged PALcode instructions.
Table 16 OpenVMS Unprivileged PALcode Instructions
Mnemonic Opcode Description
AMOVRM 00.00A1 Atomic move from register to memory
AMOVRR 00.00A0 Atomic move from register to register
BPT 00.0080 Breakpoint
BUGCHK 00.0081 Bugcheck
CHMK 00.0083 Change mode to kernel
CHME 00.0082 Change mode to executive
CHMS 00.0084 Change mode to supervisor
CHMU 00.0085 Change mode to user
GENTRAP 00.00AA Generate software trap
IMB 00.0086 I-stream memory barrier
INSQHIL 00.0087 Insert into longword queue at head
interlocked
INSQHILR 00.00A2 Insert into longword queue at head
interlocked resident
INSQHIQ 00.0089 Insert into quadword queue at head
interlocked
INSQHIQR 00.00A4 Insert into quadword queue at head
interlocked resident
INSQTIL 00.0088 Insert into longword queue at tail
interlocked
INSQTILR 00.00A3 Insert into longword queue at tail
interlocked resident
INSQTIQ 00.008A Insert into quadword queue at tail
interlocked
INSQTIQR 00.00A5 Insert into quadword queue at tail
interlocked resident
INSQUEL 00.008B Insert entry into longword queue
INSQUEL/D 00.008D Insert entry into longword queue deferred
INSQUEQ 00.008C Insert entry into quadword queue
INSQUEQ/D 00.008E Insert entry into quadword queue deferred
PROBER 00.008F Probe for read access
PROBEW 00.0090 Probe for write access
RD_PS 00.0091 Move processor status
READ_UNQ 00.009E Read unique context
REI 00.0092 Return from exception or interrupt
REMQHIL 00.0093 Remove from longword queue at head
interlocked
REMQHILR 00.00A6 Remove from longword queue at head
interlocked resident
REMQHIQ 00.0095 Remove from quadword queue at head
interlocked
REMQHIQR 00.00A8 Remove from quadword queue at head
interlocked resident
REMQTIL 00.0094 Remove from longword queue at tail
interlocked
REMQTILR 00.00A7 Remove from longword queue at tail
interlocked resident
REMQTIQ 00.0096 Remove from quadword queue at tail
interlocked
REMQTIQR 00.00A9 Remove from quadword queue at tail
interlocked resident
REMQUEL 00.0097 Remove entry from longword queue
REMQUEL/D 00.0099 Remove entry from longword queue deferred
REMQUEQ 00.0098 Remove entry from quadword queue
REMQUEQ/D 00.009A Remove entry from quadword queue deferred
RSCC 00.009D Read system cycle counter
SWASTEN 00.009B Swap AST enable for current mode
WRITE_UNQ 00.009F Write unique context
WR_PS_SW 00.009C Write processor status software field
Table 17 OpenVMS Privileged PALcode Instructions
Mnemonic Opcode Description
CFLUSH 00.0001 Cache flush
CSERVE 00.0009 Console service
DRAINA 00.0002 Drain aborts
HALT 00.0000 Halt processor
LDQP 00.0003 Load quadword physical
MFPR_ASN 00.0006 Move from processor register ASN
MFPR_ESP 00.001E Move from processor register ESP
MFPR_FEN 00.000B Move from processor register FEN
MFPR_IPL 00.000E Move from processor register IPL
MFPR_MCES 00.0010 Move from processor register MCES
MFPR_PCBB 00.0012 Move from processor register PCBB
MFPR_PRBR 00.0013 Move from processor register PRBR
MFPR_PTBR 00.0015 Move from processor register PTBR
MFPR_SCBB 00.0016 Move from processor register SCBB
MFPR_SISR 00.0019 Move from processor register SISR
MFPR_SSP 00.0020 Move from processor register SSP
MFPR_TBCHK 00.001A Move from processor register TBCHK
MFPR_USP 00.0022 Move from processor register USP
MFPR_VPTB 00.0029 Move from processor register VPTB
MFPR_WHAMI 00.003F Move from processor register WHAMI
MTPR_ASTEN 00.0026 Move to processor register ASTEN
MTPR_ASTSR 00.0027 Move to processor register ASTSR
MTPR_DATFX 00.002E Move to processor register DATFX
MTPR_ESP 00.001F Move to processor register ESP
MTPR_FEN 00.000B Move to processor register FEN
MTPR_IPIR 00.000D Move to processor register IPRI
MTPR_IPL 00.000E Move to processor register IPL
MTPR_MCES 00.0011 Move to processor register MCES
MTPR_PERFMON 00.002B Move to processor register PERFMON
MTPR_PRBR 00.0014 Move to processor register PRBR
MTPR_SCBB 00.0017 Move to processor register SCBB
MTPR_SIRR 00.0018 Move to processor register SIRR
MTPR_SSP 00.0021 Move to processor register SSP
MTPR_TBIA 00.001B Move to processor register TBIA
MTPR_TBIAP 00.001C Move to processor register TBIAP
MTPR_TBIS 00.001D Move to processor register TBIS
MTPR_TBISD 00.0024 Move to processor register TBISD
MTPR_TBISI 00.0025 Move to processor register TBISI
MTPR_USP 00.0023 Move to processor register USP
MTPR_VPTB 00.002A Move to processor register VPTB
STQP 00.0004 Store quadword physical
SWPCTX 00.0005 Swap privileged context
SWPPAL 00.000A Swap PALcode image
8 – PALcode Opcodes in Numerical Order
PALcode Opcodes in Numerical Order lists the PALcode opcodes in
numerical order.
Table 18 PALcode Opcodes in Numerical Order
Opcode(16Opcode(10)penVMS
00.0000 00.0000 HALT
00.0001 00.0001 CFLUSH
00.0002 00.0002 DRAINA
00.0003 00.0003 LDQP
00.0004 00.0004 STQP
00.0005 00.0005 SWPCTX
00.0006 00.0006 MFPR_ASN
00.0007 00.0007 MTPR_ASTEN
00.0008 00.0008 MTPR_ASTSR
00.0009 00.0009 CSERVE
00.000A 00.0010 SWPPAL
00.000B 00.0011 MFPR_FEN
00.000C 00.0012 MTPR_FEN
00.000D 00.0013 MTPR_IPIR
00.000E 00.0014 MFPR_IPL
00.000F 00.0015 MTPR_IPL
00.0010 00.0016 MFPR_MCES
00.0011 00.0017 MTPR_MCES
00.0012 00.0018 MFPR_PCBB
00.0013 00.0019 MFPR_PRBR
00.0014 00.0020 MTPR_PRBR
00.0015 00.0021 MFPR_PTBR
00.0016 00.0022 MFPR_SCBB
00.0017 00.0023 MTPR_SCBB
00.0018 00.0024 MTPR_SIRR
00.0019 00.0025 MFPR_SISR
00.001A 00.0026 MFPR_TBCHK
00.001B 00.0027 MTPR_TBIA
00.001C 00.0028 MTPR_TBIAP
00.001D 00.0029 MTPR_TBIS
00.001E 00.0030 MFPR_ESP
00.001F 00.0031 MTPR_ESP
00.0020 00.0032 MFPR_SSP
00.0021 00.0033 MTPR_SSP
00.0022 00.0034 MFPR_USP
00.0023 00.0035 MTPR_USP
00.0024 00.0036 MTPR_TBISD
00.0025 00.0037 MTPR_TBISI
00.0026 00.0038 MFPR_ASTEN
00.0027 00.0039 MFPR_ASTSR
00.0029 00.0040 MFPR_VPTB
00.002A 00.0041 MTPR_VPTB
00.002B 00.0042 MTPR_PERFMON
00.002E 00.0043 MTPR_DATFX
00.003F 00.0063 MFPR_WHAMI
00.0080 00.0128 BPT
00.0081 00.0129 BUGCHK
00.0082 00.0130 CHME
00.0083 00.0131 CHMK
00.0084 00.0132 CHMS
00.0085 00.0133 CHMU
00.0086 00.0134 IMB
00.0087 00.0135 INSQHIL
00.0088 00.0136 INSQTIL
00.0089 00.0137 INSQHIQ
00.008A 00.0138 INSQTIQ
00.008B 00.0139 INSQUEL
00.008C 00.0140 INSQUEQ
00.008D 00.0141 INSQUEL/D
00.008E 00.0142 INSQUEQ/D
00.008F 00.0143 PROBER
00.0090 00.0144 PROBEW
00.0091 00.0145 RD_PS
00.0092 00.0146 REI
00.0093 00.0147 REMQHIL
00.0094 00.0148 REMQTIL
00.0095 00.0149 REMQHIQ
00.0096 00.0150 REMQTIQ
00.0097 00.0151 REMQUEL
00.0098 00.0152 REMQUEQ
00.0099 00.0153 REMQUEL/D
00.009A 00.0154 REMQUEQ/D
00.009B 00.0155 SWASTEN
00.009C 00.0156 WR_PS_SW
00.009D 00.0157 RSCC
00.009E 00.0158 READ_UNQ
00.009F 00.0159 WRITE_UNQ
00.00A0 00.0160 AMOVRR
00.00A1 00.0161 AMOVRM
00.00A2 00.0162 INSQHILR
00.00A3 00.0163 INSQTILR
00.00A4 00.0164 INSQHIQR
00.00A5 00.0165 INSQTIQR
00.00A6 00.0166 REMQHILR
00.00A7 00.0167 REMQTILR
00.00A8 00.0168 REMQHIQR
00.00A9 00.0169 REMQTIQR
00.00AA 00.0170 GENTRAP
9 – Common Architecture Instructions