VMS Help  —  MACRO  /ALPHA  Directives  .BEGIN EXACT
    Exact instruction block directive

    Format

      .BEGIN_EXACT

1  –  Description

    An exact instruction block suppresses code optimizations
    (SCHEDULE and PEEPHOLE) regardless if these optimizations are
    enabled for the assembly unit. Unlike .ENABLE and .DISABLE, which
    can be used to enable or disable specific optimizations for the
    entire assembly unit, .BEGIN_EXACT and .END_EXACT allow you to
    suppress optimization for a specified range of instructions.
    Instructions outside the specified range remain subject to any
    optimizations you have enabled.

2  –  Notes

    o  This directive cannot appear in a psect with the NOEXE and
       NOMIX attributes.

    o  Although this directive is accepted by the assembler in a
       psect with the MIX attribute, it has no effect in these psects
       since no code optimizations are in affect for MIX psects.

    o  .BEGIN_EXACT must be paired with a matching .END_EXACT to
       close the exact instruction block.

    o  .BEGIN_EXACT and .END_EXACT instruction blocks can be
       nested. The outermost level of the .BEGIN_EXACT and matching
       .END_EXACT directives delimit the actual exact instruction
       block from which code optimizations are suppressed. Nesting
       .BEGIN_EXACT and .END_EXACT instruction blocks can be useful
       in macro definitions where the macro expansion requires an
       exact instruction sequence. Nested .BEGIN_EXACT and .END_EXACT
       instruction blocks allow a macro to be invoked both from
       within and without the exact instruction block.

    o  .BEGIN_EXACT does not affect automatic alignment. Automatic
       alignment is enabled with the .ENABLE ALIGN_CODE and .ENABLE
       ALIGN_DATA directives or with the /ALIGN=(CODE,DATA) command-
       line qualifier.

3  –  Examples

      The following example shows an instruction sequence prior to
      optimization:

             addf f7, f8, f9     ; 1
             addf f2, f3, f4     ; 2
             addl r5, r6, r7     ; 3
             addl r8, r9, r10    ; 4

      The assembler optimizes the previous example to a sequence
      similar to the following instruction sequence:

                     :
             addf f7, f8, f9     ; 1
             addl r5, r6, r7     ; 3
             addf f2, f3, f4     ; 2
             addl r8, r9, r10    ; 4
                     :

      If you choose to suppress optimization in the previous example,
      enclose the four instructions with the .BEGIN_EXACT and
      .END_EXACT directives, as shown in the following example:

             .BEGIN_EXACT
             addf f7, f8, f9     ; 1
             addf f2, f3, f4     ; 2
             addl r5, r6, r7     ; 3
             addl r8, r9, r10    ; 4
             .END_EXACT
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