/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:27:05 by OpenVMS SDL EV3-3 */ /* Source: 26-MAY-1993 10:46:30 $1$DGA7274:[LIB_H.SRC]XMIDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $XMIDEF ***/ #ifndef __XMIDEF_LOADED #define __XMIDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* XMI Required Registers */ /*- */ #define XMI$C_IO_CLASS 32 #define XMI$C_MEMORY_CLASS 64 #define XMI$C_CPU_CLASS 128 /* */ #define XMI$C_READ 1 #define XMI$C_IREAD 2 #define XMI$C_UWMASK 6 #define XMI$C_WMASK 7 #define XMI$C_INTR 8 #define XMI$C_IDENT 9 #define XMI$C_IVINTR 15 /* XMI-2 additional commands */ #define XMI$C_OREAD 3 #define XMI$C_DWMASK 4 #define XMI$C_TBDATA 11 #define XMI$M_EMP 0x2 #define XMI$M_DXTO 0x4 #define XMI$M_EHWW 0x8 #define XMI$M_FCMD 0xF #define XMI$M_FCID 0x3F0 #define XMI$M_STF 0x400 #define XMI$M_ETF 0x800 #define XMI$M_NSES 0x1000 #define XMI$M_TTO 0x2000 #define XMI$M_TE 0x4000 #define XMI$M_CNAK 0x8000 #define XMI$M_RER 0x10000 #define XMI$M_RSE 0x20000 #define XMI$M_NRR 0x40000 #define XMI$M_CRD 0x80000 #define XMI$M_WDNAK 0x100000 #define XMI$M_RIDNAK 0x200000 #define XMI$M_WSE 0x400000 #define XMI$M_PE 0x800000 #define XMI$M_IPE 0x1000000 #define XMI$M_WEI 0x2000000 #define XMI$M_XFAULT 0x4000000 #define XMI$M_CC 0x8000000 #define XMI$M_XBAD 0x10000000 #define XMI$M_NHALT 0x20000000 #define XMI$M_NRESET 0x40000000 #define XMI$M_ES 0x80000000 #define XMI$M_SLEEP_MODE 0x40000000 #define XMI$M_FAEM_ENABLE 0x80000000 #define XMI$M_LOCMOD 0x3 #define XMI$M_XBADD 0x4 #define XMI$M_CRDID 0x10000 #define XMI$M_CCID 0x20000 #define XMI$M_SEO 0x1 #define XMI$M_OLR 0x2 #define XMI$M_URR 0x4 #define XMI$S_XMIDEF 1592 /* Old size name - synonym */ typedef struct _xmi { __union { unsigned int xmi$l_xdev; /* XMI Device register */ __struct { __union { unsigned short int xmi$w_dtype; /* Device type */ __struct { unsigned char xmi$b_dev_id; /* Device ID */ unsigned char xmi$b_class; /* Device class */ } xmi$r_dtype_fields; } xmi$r_dtype_overlay; unsigned short int xmi$w_drev; /* Device Revision */ } xmi$r_xdev_fields; } xmi$r_xdev_overlay; /* XMI commands */ /* */ __union { unsigned int xmi$l_xbe; /* XMI Bus Error register */ __struct { /* Post V1.4 */ unsigned xmi$$_fill_1 : 1; /* Reserved bit */ unsigned xmi$v_emp : 1; /* Enable More Protocol */ unsigned xmi$v_dxto : 1; /* Disable XMI Timeout */ unsigned xmi$v_ehww : 1; /* Enable HexaWord Write */ unsigned xmi$v_fill_0_ : 4; } xmi$r_fcmd_redefined; __struct { unsigned xmi$v_fcmd : 4; /* Failing Command (Pre V1.4) */ unsigned xmi$v_fcid : 6; /* Failing Commander ID */ unsigned xmi$v_stf : 1; /* Self-test fail */ unsigned xmi$v_etf : 1; /* Extended Test fail */ unsigned xmi$v_nses : 1; /* Node-specific Err. Summary */ unsigned xmi$v_tto : 1; /* Transaction timeout */ unsigned xmi$v_te : 1; /* Transmit error */ unsigned xmi$v_cnak : 1; /* Command NoAck */ unsigned xmi$v_rer : 1; /* Read Error Response */ unsigned xmi$v_rse : 1; /* Read Sequence Error */ unsigned xmi$v_nrr : 1; /* No Read Response */ unsigned xmi$v_crd : 1; /* Corrected Read Data */ unsigned xmi$v_wdnak : 1; /* Write Data NoACk */ unsigned xmi$v_ridnak : 1; /* Read/IDENT Data NoAck */ unsigned xmi$v_wse : 1; /* Write Sequence Error */ unsigned xmi$v_pe : 1; /* Parity Error */ unsigned xmi$v_ipe : 1; /* Inconsistent Parity Error */ unsigned xmi$v_wei : 1; /* Write Error Interrupt */ unsigned xmi$v_xfault : 1; /* XMI Fault */ unsigned xmi$v_cc : 1; /* Corrected Confirmation */ unsigned xmi$v_xbad : 1; /* XMI Bad */ unsigned xmi$v_nhalt : 1; /* Node Halt */ unsigned xmi$v_nreset : 1; /* Node Reset */ unsigned xmi$v_es : 1; /* Error Summary */ } xmi$r_xbe_bits; } xmi$r_xbe_overlay; __union { unsigned int xmi$l_xfad; /* XMI Failing Address (physical) register */ unsigned int xmi$l_xfadr0; /* XMI Failing Address (physical) register */ __struct { unsigned xmi$v_fadr : 30; /* Failing Address */ unsigned xmi$v_fln : 2; /* Failing length */ } xmi$r_xfad_fields; } xmi$r_xfad_overlay; __union { /* XJA's version of the XFAER */ /* register. This is identical */ /* to other node's XFAER except */ /* that for the XJA it is here */ /* at bb+C rather than at bb+2C. */ unsigned int xmi$l_xja_xfadrb; /* XJA Failing Address register (physical) Ext. */ /* For the field definitions, use */ /* those defined below for XFAER. */ unsigned int xmi$l_xgpr; /* XMI General Purpose register */ } xmi$r_xja_xfadrb_overlay; __union { /* XJA's General Purpose Register. */ unsigned int xmi$l_xja_xgpr; /* XJA's General Purpose Register. */ unsigned int xmi$l_xcomm; /* XMI Communication register */ } xmi$r_xja_xgpr_overlay; __union { unsigned int xmi$l_xja_xfaemctl; /* XJA's FAEM Control Register */ __struct { unsigned xmi$v_xbi_window_mask : 16; /* XBI Window Space Mask */ unsigned xmi$$_fill_1 : 14; unsigned xmi$v_sleep_mode : 1; /* Set Sleep Mode */ unsigned xmi$v_faem_enable : 1; /* Enable FAEM */ } xmi$r_xja_xfaemctl_fields; } xmi$r_xja_xfaemctl_overlay; __union { /* XJA's Add On Self Test Status Register */ unsigned int xmi$l_xja_aosts; /* XJA's Add On Self Test Status Register */ } xmi$r_xja_aosts_overlay; __union { unsigned int xmi$l_xja_sernum; /* XJA's Serial Number Register */ __struct { unsigned xmi$v_serial_number : 17; /* Serial Number */ unsigned xmi$v_plant : 4; /* Manufacturing Plant. */ unsigned xmi$v_rev : 4; /* Revision Level. */ unsigned xmi$v_vari : 4; /* Variation. */ unsigned xmi$$_fill_1 : 3; } xmi$r_xja_sernum_fields; __union { unsigned int xmi$l_nscsr; /* XMI-1 Node specific CSR */ unsigned int xmi$l_nscsr0; /* XMI-2 Node specific CSR */ } xmi$r_nscr_overlay; } xmi$r_xja_sernum_overlay; int xmi$$_fill_3 [1]; /*RESERVED REGISTERS */ __union { unsigned int xmi$l_xbcr; /* XMI-1 Bus control register */ unsigned int xmi$l_xbcr0; /* XMI-2 Bus control register */ __struct { unsigned xmi$v_locmod : 2; /* Lockout mode bits */ unsigned xmi$v_xbadd : 1; /* XMI Bad Drive */ unsigned xmi$v_fill_2 : 13; unsigned xmi$v_crdid : 1; /* Corrected Read Int. disable */ unsigned xmi$v_ccid : 1; /* Corrected Conf. Int. disable */ unsigned xmi$v_fill_1_ : 6; } xmi$r_xbcr_fields; } xmi$r_xbcr_overlay; unsigned int xmi$l_fill_3; __union { unsigned int xmi$l_xfaer; /* XMI-1 Failing Address (physical) Ext register */ unsigned int xmi$l_xfaer0; /* XMI-2 Failing Address (physical) Ext register */ __struct { unsigned xmi$v_mask : 16; /* Failing Mask */ unsigned xmi$v_addrext : 10; /* Failing Address Extension bits [38:29] */ unsigned xmi$$_fill_3 : 2; /* Reserved bits */ unsigned xmi$v_fcmdx : 4; /* Failing Command */ } xmi$r_xfaer_fields; } xmi$r_xfaer_overlay; /* End of XMI-1 Register. The addition register only apply to XMI-2. */ unsigned int xmi$l_fill_4; __union { unsigned int xmi$l_xbeer; /* XMI-1 Bus Error extension */ unsigned int xmi$l_xbeer0; /* XMI-2 Bus Error extension */ __struct { unsigned xmi$v_seo : 1; /* Second Error Occured */ unsigned xmi$v_olr : 1; /* Only LOC Response */ unsigned xmi$v_urr : 1; /* Unexpected Read Response */ unsigned xmi$v_fill_2_ : 5; } xmi$r_xbeer_fields; } xmi$r_xbeer_overlay; unsigned char xmi$b_fill_5 [460]; unsigned int xmi$l_xbe1; /* XMI-2 Bus Error register */ unsigned int xmi$l_xfad1; /* XMI-2 Failing Addr (physical) register */ unsigned int xmi$l_fill_6 [4]; unsigned int xmi$l_nscsr1; /* XMI-2 Node specific CSR */ unsigned int xmi$l_fill_7; unsigned int xmi$l_xbcr1; /* XMI-2 Bus control register */ unsigned int xmi$l_fill_8; unsigned int xmi$l_xfaer1; /* XMI-2 Failing addr. (physical) extension */ unsigned int xmi$l_fill_9; unsigned int xmi$l_xbeer1; /* XMI-2 Bus Error extension */ /* */ unsigned char xmi$b_fill_a [460]; unsigned int xmi$l_xbe2; /* XMI-2 Bus Error register */ unsigned int xmi$l_xfad2; /* XMI-2 Failing Addr (physical) register */ unsigned int xmi$l_fill_b [4]; unsigned int xmi$l_nscsr2; /* XMI-2 Node specific CSR */ unsigned int xmi$l_fill_c; unsigned int xmi$l_xbcr2; /* XMI-2 Bus control register */ unsigned int xmi$l_fill_d; unsigned int xmi$l_xfaer2; /* XMI-2 Failing addr. (physical) extension */ unsigned int xmi$l_fill_e; unsigned int xmi$l_xbeer2; /* XMI-2 Bus Error extension */ /* */ unsigned char xmi$b_fill_f [460]; unsigned int xmi$l_xbe3; /* XMI-2 Bus Error register */ unsigned int xmi$l_xfad3; /* XMI-2 Failing Addr (phsycial) register */ unsigned int xmi$l_fill_10 [4]; unsigned int xmi$l_nscsr3; /* XMI-2 Node specific CSR */ unsigned int xmi$l_fill_11; unsigned int xmi$l_xbcr3; /* XMI-2 Bus control register */ unsigned int xmi$l_fill_12; unsigned int xmi$l_xfaer3; /* XMI-2 Failing addr. (physical) extension */ unsigned int xmi$l_fill_13; unsigned int xmi$l_xbeer3; /* XMI-2 Bus Error extension */ } XMI; #if !defined(__VAXC) #define xmi$l_xdev xmi$r_xdev_overlay.xmi$l_xdev #define xmi$w_dtype xmi$r_xdev_overlay.xmi$r_xdev_fields.xmi$r_dtype_overlay.xmi$w_dtype #define xmi$b_dev_id xmi$r_xdev_overlay.xmi$r_xdev_fields.xmi$r_dtype_overlay.xmi$r_dtype_fields.xmi$b_dev_id #define xmi$b_class xmi$r_xdev_overlay.xmi$r_xdev_fields.xmi$r_dtype_overlay.xmi$r_dtype_fields.xmi$b_class #define xmi$w_drev xmi$r_xdev_overlay.xmi$r_xdev_fields.xmi$w_drev #define xmi$l_xbe xmi$r_xbe_overlay.xmi$l_xbe #define xmi$$_fill_1 xmi$r_xbe_overlay.xmi$r_fcmd_redefined.xmi$$_fill_1 #define xmi$v_emp xmi$r_xbe_overlay.xmi$r_fcmd_redefined.xmi$v_emp #define xmi$v_dxto xmi$r_xbe_overlay.xmi$r_fcmd_redefined.xmi$v_dxto #define xmi$v_ehww xmi$r_xbe_overlay.xmi$r_fcmd_redefined.xmi$v_ehww #define xmi$v_fcmd xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_fcmd #define xmi$v_fcid xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_fcid #define xmi$v_stf xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_stf #define xmi$v_etf xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_etf #define xmi$v_nses xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_nses #define xmi$v_tto xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_tto #define xmi$v_te xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_te #define xmi$v_cnak xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_cnak #define xmi$v_rer xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_rer #define xmi$v_rse xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_rse #define xmi$v_nrr xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_nrr #define xmi$v_crd xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_crd #define xmi$v_wdnak xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_wdnak #define xmi$v_ridnak xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_ridnak #define xmi$v_wse xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_wse #define xmi$v_pe xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_pe #define xmi$v_ipe xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_ipe #define xmi$v_wei xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_wei #define xmi$v_xfault xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_xfault #define xmi$v_cc xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_cc #define xmi$v_xbad xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_xbad #define xmi$v_nhalt xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_nhalt #define xmi$v_nreset xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_nreset #define xmi$v_es xmi$r_xbe_overlay.xmi$r_xbe_bits.xmi$v_es #define xmi$l_xfad xmi$r_xfad_overlay.xmi$l_xfad #define xmi$l_xfadr0 xmi$r_xfad_overlay.xmi$l_xfadr0 #define xmi$v_fadr xmi$r_xfad_overlay.xmi$r_xfad_fields.xmi$v_fadr #define xmi$v_fln xmi$r_xfad_overlay.xmi$r_xfad_fields.xmi$v_fln #define xmi$l_xja_xfadrb xmi$r_xja_xfadrb_overlay.xmi$l_xja_xfadrb #define xmi$l_xgpr xmi$r_xja_xfadrb_overlay.xmi$l_xgpr #define xmi$l_xja_xgpr xmi$r_xja_xgpr_overlay.xmi$l_xja_xgpr #define xmi$l_xcomm xmi$r_xja_xgpr_overlay.xmi$l_xcomm #define xmi$l_xja_xfaemctl xmi$r_xja_xfaemctl_overlay.xmi$l_xja_xfaemctl #define xmi$v_xbi_window_mask xmi$r_xja_xfaemctl_overlay.xmi$r_xja_xfaemctl_fields.xmi$v_xbi_window_mask #define xmi$v_sleep_mode xmi$r_xja_xfaemctl_overlay.xmi$r_xja_xfaemctl_fields.xmi$v_sleep_mode #define xmi$v_faem_enable xmi$r_xja_xfaemctl_overlay.xmi$r_xja_xfaemctl_fields.xmi$v_faem_enable #define xmi$l_xja_aosts xmi$r_xja_aosts_overlay.xmi$l_xja_aosts #define xmi$l_xja_sernum xmi$r_xja_sernum_overlay.xmi$l_xja_sernum #define xmi$v_serial_number xmi$r_xja_sernum_overlay.xmi$r_xja_sernum_fields.xmi$v_serial_number #define xmi$v_plant xmi$r_xja_sernum_overlay.xmi$r_xja_sernum_fields.xmi$v_plant #define xmi$v_rev xmi$r_xja_sernum_overlay.xmi$r_xja_sernum_fields.xmi$v_rev #define xmi$v_vari xmi$r_xja_sernum_overlay.xmi$r_xja_sernum_fields.xmi$v_vari #define xmi$l_nscsr xmi$r_xja_sernum_overlay.xmi$r_nscr_overlay.xmi$l_nscsr #define xmi$l_nscsr0 xmi$r_xja_sernum_overlay.xmi$r_nscr_overlay.xmi$l_nscsr0 #define xmi$l_xbcr xmi$r_xbcr_overlay.xmi$l_xbcr #define xmi$l_xbcr0 xmi$r_xbcr_overlay.xmi$l_xbcr0 #define xmi$v_locmod xmi$r_xbcr_overlay.xmi$r_xbcr_fields.xmi$v_locmod #define xmi$v_xbadd xmi$r_xbcr_overlay.xmi$r_xbcr_fields.xmi$v_xbadd #define xmi$v_crdid xmi$r_xbcr_overlay.xmi$r_xbcr_fields.xmi$v_crdid #define xmi$v_ccid xmi$r_xbcr_overlay.xmi$r_xbcr_fields.xmi$v_ccid #define xmi$l_xfaer xmi$r_xfaer_overlay.xmi$l_xfaer #define xmi$l_xfaer0 xmi$r_xfaer_overlay.xmi$l_xfaer0 #define xmi$v_mask xmi$r_xfaer_overlay.xmi$r_xfaer_fields.xmi$v_mask #define xmi$v_addrext xmi$r_xfaer_overlay.xmi$r_xfaer_fields.xmi$v_addrext #define xmi$$_fill_3 xmi$r_xfaer_overlay.xmi$r_xfaer_fields.xmi$$_fill_3 #define xmi$v_fcmdx xmi$r_xfaer_overlay.xmi$r_xfaer_fields.xmi$v_fcmdx #define xmi$l_xbeer xmi$r_xbeer_overlay.xmi$l_xbeer #define xmi$l_xbeer0 xmi$r_xbeer_overlay.xmi$l_xbeer0 #define xmi$v_seo xmi$r_xbeer_overlay.xmi$r_xbeer_fields.xmi$v_seo #define xmi$v_olr xmi$r_xbeer_overlay.xmi$r_xbeer_fields.xmi$v_olr #define xmi$v_urr xmi$r_xbeer_overlay.xmi$r_xbeer_fields.xmi$v_urr #endif /* #if !defined(__VAXC) */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __XMIDEF_LOADED */