/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:26:39 by OpenVMS SDL EV3-3 */ /* Source: 23-APR-1993 14:41:38 $1$DGA7274:[LIB_H.SRC]SSCTDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $SSCTDEF ***/ #ifndef __SSCTDEF_LOADED #define __SSCTDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* This file contains offset definitions for SSC timer registers accessible */ /* through XMI private space on the XMI-based processors. */ /*- */ #define SSCT_TCR0$M_RUN 0x1 #define SSCT_TCR0$M_STP 0x4 #define SSCT_TCR0$M_XFR 0x10 #define SSCT_TCR0$M_SGL 0x20 #define SSCT_TCR0$M_IE 0x40 #define SSCT_TCR0$M_INT 0x80 #define SSCT_TCR0$M_ERR 0x80000000 #define SSCT_TIVR0$M_VECTOR 0x3FC #define SSCT_TCR1$M_RUN 0x1 #define SSCT_TCR1$M_STP 0x4 #define SSCT_TCR1$M_XFR 0x10 #define SSCT_TCR1$M_SGL 0x20 #define SSCT_TCR1$M_IE 0x40 #define SSCT_TCR1$M_INT 0x80 #define SSCT_TCR1$M_ERR 0x80000000 #define SSCT_TIVR1$M_VECTOR 0x3FC #define SSCT$S_SSCTDEF 32 typedef struct _ssct { __union { /* Timer Control Register 0 */ unsigned int ssct$l_tcr0; __struct { unsigned ssct_tcr0$v_run : 1; /* Enables timer */ unsigned ssct_tcr0$v_fill_27 : 1; unsigned ssct_tcr0$v_stp : 1; /* Stop on overflow */ unsigned ssct_tcr0$v_fill_28 : 1; unsigned ssct_tcr0$v_xfr : 1; /* 1=copy TNIRn to TIRn */ unsigned ssct_tcr0$v_sgl : 1; /* Increment counter by one */ unsigned ssct_tcr0$v_ie : 1; /* Interrupt Enable */ unsigned ssct_tcr0$v_int : 1; /* Set on timer overflow */ unsigned ssct_tcr0$v_fill_28a : 23; unsigned ssct_tcr0$v_err : 1; /* Indicates missed overflow */ } ssct$r_tcr0_fields; } ssct$r_tcr0_overlay; unsigned int ssct$l_tir0; /* Timer Interval Register 0 */ unsigned int ssct$l_tnir0; /* Timer Next Interval Reg. 0 */ __union { /* Timer Interval Vector Reg. 0 */ unsigned int ssct$l_tivr0; __struct { unsigned ssct_tivr0$v_fill_29 : 2; unsigned ssct_tivr0$v_vector : 8; /* Longword aligned SCB vector */ unsigned ssct_tivr0$v_fill_0_ : 6; } ssct$r_tivr0_fields; } ssct$r_tivr0_overlay; __union { /* Timer Control Register 1 */ unsigned int ssct$l_tcr1; __struct { unsigned ssct_tcr1$v_run : 1; /* Enables timer */ unsigned ssct_tcr1$v_fill_27 : 1; unsigned ssct_tcr1$v_stp : 1; /* Stop on overflow */ unsigned ssct_tcr1$v_fill_28 : 1; unsigned ssct_tcr1$v_xfr : 1; /* 1=copy TNIRn to TIRn */ unsigned ssct_tcr1$v_sgl : 1; /* Increment counter by one */ unsigned ssct_tcr1$v_ie : 1; /* Interrupt Enable */ unsigned ssct_tcr1$v_int : 1; /* Set on timer overflow */ unsigned ssct_tcr1$v_fill_28a : 23; unsigned ssct_tcr1$v_err : 1; /* Indicates missed overflow */ } ssct$r_tcr1_fields; } ssct$r_tcr1_overlay; unsigned int ssct$l_tir1; /* Timer Interval Register 1 */ unsigned int ssct$l_tnir1; /* Timer Next Interval Reg. 1 */ __union { /* Timer Interval Vector Reg. 1 */ unsigned int ssct$l_tivr1; __struct { unsigned ssct_tivr1$v_fill_30 : 2; unsigned ssct_tivr1$v_vector : 8; /* Longword aligned SCB vector */ unsigned ssct_tivr1$v_fill_1_ : 6; } ssct$r_tivr1_fields; } ssct$r_tivr1_overlay; } SSCT; #if !defined(__VAXC) #define ssct$l_tcr0 ssct$r_tcr0_overlay.ssct$l_tcr0 #define ssct_tcr0$v_run ssct$r_tcr0_overlay.ssct$r_tcr0_fields.ssct_tcr0$v_run #define ssct_tcr0$v_stp ssct$r_tcr0_overlay.ssct$r_tcr0_fields.ssct_tcr0$v_stp #define ssct_tcr0$v_xfr ssct$r_tcr0_overlay.ssct$r_tcr0_fields.ssct_tcr0$v_xfr #define ssct_tcr0$v_sgl ssct$r_tcr0_overlay.ssct$r_tcr0_fields.ssct_tcr0$v_sgl #define ssct_tcr0$v_ie ssct$r_tcr0_overlay.ssct$r_tcr0_fields.ssct_tcr0$v_ie #define ssct_tcr0$v_int ssct$r_tcr0_overlay.ssct$r_tcr0_fields.ssct_tcr0$v_int #define ssct_tcr0$v_err ssct$r_tcr0_overlay.ssct$r_tcr0_fields.ssct_tcr0$v_err #define ssct$l_tivr0 ssct$r_tivr0_overlay.ssct$l_tivr0 #define ssct_tivr0$v_vector ssct$r_tivr0_overlay.ssct$r_tivr0_fields.ssct_tivr0$v_vector #define ssct$l_tcr1 ssct$r_tcr1_overlay.ssct$l_tcr1 #define ssct_tcr1$v_run ssct$r_tcr1_overlay.ssct$r_tcr1_fields.ssct_tcr1$v_run #define ssct_tcr1$v_stp ssct$r_tcr1_overlay.ssct$r_tcr1_fields.ssct_tcr1$v_stp #define ssct_tcr1$v_xfr ssct$r_tcr1_overlay.ssct$r_tcr1_fields.ssct_tcr1$v_xfr #define ssct_tcr1$v_sgl ssct$r_tcr1_overlay.ssct$r_tcr1_fields.ssct_tcr1$v_sgl #define ssct_tcr1$v_ie ssct$r_tcr1_overlay.ssct$r_tcr1_fields.ssct_tcr1$v_ie #define ssct_tcr1$v_int ssct$r_tcr1_overlay.ssct$r_tcr1_fields.ssct_tcr1$v_int #define ssct_tcr1$v_err ssct$r_tcr1_overlay.ssct$r_tcr1_fields.ssct_tcr1$v_err #define ssct$l_tivr1 ssct$r_tivr1_overlay.ssct$l_tivr1 #define ssct_tivr1$v_vector ssct$r_tivr1_overlay.ssct$r_tivr1_fields.ssct_tivr1$v_vector #endif /* #if !defined(__VAXC) */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __SSCTDEF_LOADED */