/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:37:41 by OpenVMS SDL EV3-3 */ /* Source: 01-JUN-2009 19:57:52 $1$DGA7274:[LIB_H.SRC]SPLDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $SPLDEF ***/ #ifndef __SPLDEF_LOADED #define __SPLDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif #include /* */ /* SPINLOCK Control Block */ /* */ #define SPL$C_SPL_SPINLOCK 1 /* Static system spinlock */ #define SPL$C_SPL_FORKLOCK 2 /* Spinlock used for FORKLOCK */ #define SPL$C_SPL_DEVICELOCK 3 /* Dynamic spinlock (devicelock) */ #define SPL$C_SPL_PORTLOCK_TEMPLATE 4 /* Static portlock template */ #define SPL$C_SPL_PORTLOCK 5 /* Dynamic ranked portlock */ #define SPL$M_INTERLOCK 0x1 #define SPL$M_DYNAMIC_THRESHOLD 0x1 #define SPL$M_BITMAP_POINTERS 0x8000000000000000 #define SPL$K_PC_VEC_CNT 8 /* Size of PC vector */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _spl { #pragma __nomember_alignment int spl$l_own_cpu; /* Owner CPU's per-cpu database addr */ int spl$l_own_cnt; /* Count of concurrent acquires */ unsigned short int spl$w_size; /* Structure size */ unsigned char spl$b_type; /* Structure type */ unsigned char spl$b_subtype; /* Spinlock subtype */ __union { unsigned int spl$l_spinlock; /* Structure lock semaphore */ __struct { unsigned spl$v_interlock : 1; /* Spinlock access interlock */ unsigned spl$v_fill_4_ : 7; } spl$r_fill_1_; } spl$r_fill_0_; void *spl$ps_share_array; /* Pointer for Share array */ void *spl$ps_share_link; /* Pointer to the first Share */ /* array element */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned __int64 spl$q_release_count; /* Count of spinlock releases */ #pragma __nomember_alignment unsigned __int64 spl$q_history_bitmask; /* CPU bitmask of acqs in sequence */ unsigned int spl$l_spares_1 [6]; /* pad to next 64-byte boundary */ int spl$l_rank; /* RANK of spinlock */ __union { /* Lock IPL defined for spinlock */ unsigned int spl$l_ipl; /* Lock IPL */ __struct { unsigned char spl$b_ipl; /* Defined for first byte only */ char spl$b_fill1 [3]; /* */ } spl$r_ipl_fields; } spl$r_ipl_overlay; unsigned int spl$l_timo_int; /* Busywait timeout interval */ char spl$t_name [12]; /* Spinlock name */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned __int64 spl$q_abuse_threshold; /* Lock releases before abuse state */ #pragma __nomember_alignment unsigned __int64 spl$q_abuse_bitmask; /* CPU bitmask that are currently abused */ __union { unsigned __int64 spl$q_flags; /* Behavioral flags */ __struct { unsigned spl$v_dynamic_threshold : 1; /* Set if threshold is dynamic */ unsigned spl$v_reserved_1_1 : 32; unsigned spl$v_reserved_1_2 : 30; unsigned spl$v_bitmap_pointers : 1; /* Set if abuse/history bitmasks are bitmap pointers */ } spl$r_fill_3_; } spl$r_fill_2_; unsigned int spl$l_spares_2 [4]; /* pad to next 64-byte boundary */ __union { int spl$l_rls_pc; /* PC of nested acquisition releaser */ __int64 spl$q_rls_pc; /* PC of nested acquisition releaser */ } spl$r_rls_pc_overlay; int spl$l_wait_cpus; /* Count of waiting CPUs */ /* */ /* After much consultation, we think that BUSY_WAITS should be unsigned. */ /* The MACRO-32 source treats it as an unsigned longword integer, and */ /* tests for overflow by testing if the value is zero. */ /* */ unsigned int spl$l_busy_waits; /* Count of failed acquisitions */ __int64 spl$q_spins; /* Count number of spins */ unsigned __int64 spl$q_acq_count; /* Count of actual acquisitions */ /* */ /* Que header for singly linked deferred work. This queue header is synchronized */ /* by atomic updates. FKB type structures are queued to this header. If */ /* the queue is non-empty, the FPC routine in each FKB will be called passing */ /* fr3 and fr4. Note that the FLCK field is ignored. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif struct _fkb *spl$l_deferred_work_flink; #pragma __nomember_alignment char spl$t_align [24]; /* Assure 128 byte alignment */ int spl$l_vec_inx; /* PC vector index */ __union { int spl$l_own_pc_vec; /* 8 double longword PCs of acquires/releases */ __int64 spl$q_own_pc_vec [8]; /* 8 PCs of quadword acquires/releases */ } spl$r_pc_vec_overlay; } SPL; #if !defined(__VAXC) #define spl$l_spinlock spl$r_fill_0_.spl$l_spinlock #define spl$v_interlock spl$r_fill_0_.spl$r_fill_1_.spl$v_interlock #define spl$l_ipl spl$r_ipl_overlay.spl$l_ipl #define spl$b_ipl spl$r_ipl_overlay.spl$r_ipl_fields.spl$b_ipl #define spl$q_flags spl$r_fill_2_.spl$q_flags #define spl$v_dynamic_threshold spl$r_fill_2_.spl$r_fill_3_.spl$v_dynamic_threshold #define spl$v_bitmap_pointers spl$r_fill_2_.spl$r_fill_3_.spl$v_bitmap_pointers #define spl$l_rls_pc spl$r_rls_pc_overlay.spl$l_rls_pc #define spl$q_rls_pc spl$r_rls_pc_overlay.spl$q_rls_pc #define spl$l_own_pc_vec spl$r_pc_vec_overlay.spl$l_own_pc_vec #define spl$q_own_pc_vec spl$r_pc_vec_overlay.spl$q_own_pc_vec #endif /* #if !defined(__VAXC) */ #define SPL$K_LENGTH 256 /* Structure size */ #define SPL$C_LENGTH 256 /* Structure size */ #define SPL$S_SPLDEF 256 /* Old size name, synonym for SPL$S_SPL */ /* */ /* The SPL_SHR structure is utilized for spinlocks being accessed as sharelocks. */ /* An array of SPL_SHR structure is allocated when a lock is going to be used */ /* as a sharelock by the SMP$MAKE_LOCK routine. Enough elements are allocated */ /* for the maximum number of CPUs possible in the system. The SPL$ structure */ /* will point the array via SPL$L_SHARE_ARRAY. */ /* */ /* These elements are 128 bytes to avoid CPU cache contention. */ /* */ #define SPL_SHR$K_LENGTH 128 /* Structure size */ #define SPL_SHR$C_LENGTH 128 /* Structure size */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _spl_shr { #pragma __nomember_alignment unsigned int spl_shr$l_link; /* Link to next Share Array Element */ int spl_shr$l_share_count; /* Number of Shared Acquires */ unsigned short int spl_shr$w_mbo; /* must-be-one field */ unsigned char spl_shr$b_type; /* Structure type (DYN$C_SPL_SHR) */ unsigned char spl_shr$b_subtype; /* Spinlock subtype (0) */ int spl_shr$l_cpu_id; /* CPU ID associated with this element */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif __int64 spl_shr$q_size; /* Size */ #pragma __nomember_alignment __int64 spl_shr$q_timeout_int; /* Busywait timeout interval (in ns.) */ char spl_shr$t_align [96]; /* Assure 128 byte alignment */ } SPL_SHR; #define SPLDBG$K_REV1 1 #define SPLDBG$K_REVISION 1 #define SPLDBG$K_ACQ 1 #define SPLDBG$K_REL 2 #define SPLDBG$K_SPIN 3 #define SPLDBG$K_FORKDSPTH 4 #define SPLDBG$K_FORKEND 5 #define SPLDBG$K_MAX_FLAG 5 #define SPLDBG$K_ACQNOIPL 1 #define SPLDBG$K_ACQUIRE 2 #define SPLDBG$K_ACQUIREL 3 #define SPLDBG$K_ACQNOIPL_OWN 4 #define SPLDBG$K_ACQUIRE_OWN 5 #define SPLDBG$K_ACQUIREL_OWN 6 #define SPLDBG$K_ACQUIRE_SHR_OWN 7 #define SPLDBG$K_ACQ_NOSPIN_OWN 8 #define SPLDBG$K_ACQ_SHR_NOSPIN_OWN 9 #define SPLDBG$K_ACQNOIPL_SPIN 10 #define SPLDBG$K_ACQUIRE_SPIN 11 #define SPLDBG$K_ACQUIREL_SPIN 12 #define SPLDBG$K_RESTORE 13 #define SPLDBG$K_RESTOREL 14 #define SPLDBG$K_RELEASE 15 #define SPLDBG$K_RELEASEL 16 #define SPLDBG$K_ACQUIRE_SHR 17 #define SPLDBG$K_ACQUIRE_SHR_SPIN 18 #define SPLDBG$K_RELEASE_SHR 19 #define SPLDBG$K_RESTORE_SHR 20 #define SPLDBG$K_ACQ_NOSPIN 21 #define SPLDBG$K_ACQ_NOSPIN_INUSE 22 #define SPLDBG$K_ACQ_SHR_NOSPIN 23 #define SPLDBG$K_ACQ_SHR_NOSPIN_INUSE 24 #define SPLDBG$K_ACQ_CVT_TO_EX 25 #define SPLDBG$K_ACQ_CVT_TO_EX_INUSE 26 #define SPLDBG$K_ACQ_CVT_TO_EX_SPIN 27 #define SPLDBG$K_ACQ_CVT_TO_SHR 28 #define SPLDBG$K_MAX_MODE 28 #define SPLDBG$M_ACQUIRE 0x1 #define SPLDBG$M_RELEASE 0x2 #define SPLDBG$M_SPINWAIT 0x4 #define SPLDBG$M_LCKMGR 0x8 #define SPLDBG$M_FORKDSPTH 0x10 #define SPLDBG$M_FORKEND 0x20 #define SPLDBG$K_LENGTH 116 /* Structure size */ #define SPLDBG$C_LENGTH 116 /* Structure size */ #ifdef __cplusplus /* Define structure prototypes */ struct _spltrh; #endif /* #ifdef __cplusplus */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _spldbg { #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ struct _spltrh *spldbg$q_trace_buffer; /* pointer to trace buffer */ #else unsigned __int64 spldbg$q_trace_buffer; #endif unsigned short int spldbg$w_mbo; /* must-be-one field */ unsigned char spldbg$b_type; /* Structure type (DYN$C_SPLX) */ unsigned char spldbg$b_subtype; /* Spinlock subtype (DYN$C_SPLDBG) */ unsigned int spldbg$l_revision; /* revision field */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif __int64 spldbg$q_size; /* Size */ #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif int (*spldbg$l_start_trace)(); /* ptr to start trace routine */ int (*spldbg$l_stop_trace)(); /* ptr to stop trace routine */ void (*spldbg$l_trace_acquire)(); /* ptr to trace acquire routine */ void (*spldbg$l_trace_release)(); /* ptr to trace release routine */ void (*spldbg$l_trace_spinwait)(); /* ptr to trace spinwait routine */ void (*spldbg$l_trace_forkdspth)(); /* ptr to trace fork dispatch routine */ void (*spldbg$l_trace_forkend)(); /* ptr to trace end fork routine */ __union { unsigned int spldbg$l_trace_flags; /* trace flags */ __struct { unsigned spldbg$v_acquire : 1; unsigned spldbg$v_release : 1; unsigned spldbg$v_spinwait : 1; unsigned spldbg$v_lckmgr : 1; unsigned spldbg$v_forkdspth : 1; unsigned spldbg$v_forkend : 1; unsigned spldbg$v_fill_5_ : 2; } spldbg$r_trace_flags_bits; } spldbg$r_trace_flags_overlay; unsigned int spldbg$l_spl_flags; /* trace specific spinlock */ int spldbg$l_cpu_flags; /* trace specific CPU */ unsigned int spldbg$l_frk_flags; /* trace specific forklock */ unsigned int spldbg$l_trace_run; /* trace run index */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned __int64 spldbg$q_reserved1; #pragma __nomember_alignment unsigned __int64 spldbg$q_reserved2; unsigned __int64 spldbg$q_reserved3; unsigned __int64 spldbg$q_reserved4; unsigned __int64 *spldbg$pq_scc; /* pointer to array of cycle counts per possible CPU */ unsigned __int64 *spldbg$pq_systime; /* pointer to array of systime info per possible CPU */ int spldbg$l_max_cpus; char spldbg$b_fill_6_ [4]; } SPLDBG; #if !defined(__VAXC) #define spldbg$l_trace_flags spldbg$r_trace_flags_overlay.spldbg$l_trace_flags #define spldbg$v_acquire spldbg$r_trace_flags_overlay.spldbg$r_trace_flags_bits.spldbg$v_acquire #define spldbg$v_release spldbg$r_trace_flags_overlay.spldbg$r_trace_flags_bits.spldbg$v_release #define spldbg$v_spinwait spldbg$r_trace_flags_overlay.spldbg$r_trace_flags_bits.spldbg$v_spinwait #define spldbg$v_lckmgr spldbg$r_trace_flags_overlay.spldbg$r_trace_flags_bits.spldbg$v_lckmgr #define spldbg$v_forkdspth spldbg$r_trace_flags_overlay.spldbg$r_trace_flags_bits.spldbg$v_forkdspth #define spldbg$v_forkend spldbg$r_trace_flags_overlay.spldbg$r_trace_flags_bits.spldbg$v_forkend #endif /* #if !defined(__VAXC) */ #define SPLTRE$K_LENGTH 40 /* Structure size */ #ifdef __cplusplus /* Define structure prototypes */ struct _ktb; #endif /* #ifdef __cplusplus */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _spltre { #pragma __nomember_alignment unsigned __int64 spltre$q_timestamp; /* timestamp in system cycle counts */ __int64 spltre$q_pc; /* callers PC or fork PC */ unsigned int spltre$l_cpuid; /* current CPU id or address of CPU db */ unsigned int spltre$l_mode; /* general trace category */ unsigned int spltre$l_flag; /* which event was traced */ struct _pcb *spltre$l_pcb; /* current process during trace */ __union { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ struct _spl *spltre$q_spl_addr; /* spinlock tracing: address of spinlock */ #else unsigned __int64 spltre$q_spl_addr; #endif unsigned int spltre$l_flck; /* fork tracing: fork lock index */ } spltre$r_overlay1; } SPLTRE; #if !defined(__VAXC) #define spltre$q_spl_addr spltre$r_overlay1.spltre$q_spl_addr #define spltre$l_flck spltre$r_overlay1.spltre$l_flck #endif /* #if !defined(__VAXC) */ #define SPLTRH$K_LENGTH 72 /* Structure size */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _spltrh { #pragma __nomember_alignment int spltrh$l_idx; /* current index into trace buffer */ unsigned int spltrh$l_max_idx; /* maximum trace index */ unsigned short int spltrh$w_mbo; /* must-be-one field */ unsigned char spltrh$b_type; /* Structure type (DYN$C_SPLX) */ unsigned char spltrh$b_subtype; /* Spinlock subtype (DYN$C_SPLTRH) */ unsigned int spltrh$l_fill1; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif __int64 spltrh$q_size; /* Size */ #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ struct _spltre *spltrh$q_entry_ptr; /* pointer to first trace entry */ #else unsigned __int64 spltrh$q_entry_ptr; #endif SPLTRE spltrh$r_entry [1]; /* array of trace entries */ } SPLTRH; /* */ /* NPP data structure to hold a list of spinlock addresses */ /* that are not in one of SDA's known lists (static, device, */ /* port, mailbox, PCB, cached PCB, Pshared). */ /* Note that size of structure (and number of entries) can */ /* be changed by altering #splptr_size below. */ /* */ #define SPLPTR$C_ENTRIES 125 /* the maximum number of addresses */ #define SPLPTR$C_LENGTH 512 /* Structure size */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _splptr { /* Size of SPLPTR structure */ #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif struct _splptr *splptr$ps_flink; /* Pointer to next array */ unsigned int splptr$l_count; /* Number of entries used in this block */ unsigned short int splptr$w_size; /* Structure size (SPLPTR$C_LENGTH) */ unsigned char splptr$b_type; /* Structure type (DYN$C_SPLX) */ unsigned char splptr$b_subtype; /* Structure subtype (DYN$C_SPLPTR) */ /* Number of longword entries that will fit */ struct _spl *splptr$ps_spinlock [125]; /* Up to n spinlock addresses */ } SPLPTR; /* */ /* Spinlock Pointer Declarations */ /* */ #pragma __required_pointer_size __save #pragma __required_pointer_size __long typedef SPL *SPL_PQ; /* long pointer to a spinlock structure */ #pragma __required_pointer_size __restore #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __SPLDEF_LOADED */