/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:26:53 by OpenVMS SDL EV3-3 */ /* Source: 17-MAY-2006 10:19:13 $1$DGA7274:[LIB_H.SRC]PHDDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $PHDDEF ***/ #ifndef __PHDDEF_LOADED #define __PHDDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /* */ /* Process Header Definitions. The process header contains the swappable */ /* scheduler and memory management data bases for a process in the balance set. */ /* */ #define PHD$M_ASTEN 0xF #define PHD$M_ASTSR 0xF0 #define PHD$M_ASTEN_KEN 0x1 #define PHD$M_ASTEN_EEN 0x2 #define PHD$M_ASTEN_SEN 0x4 #define PHD$M_ASTEN_UEN 0x8 #define PHD$M_ASTSR_KPD 0x10 #define PHD$M_ASTSR_EPD 0x20 #define PHD$M_ASTSR_SPD 0x40 #define PHD$M_ASTSR_UPD 0x80 #define PHD$M_FEN 0x1 #define PHD$M_PME 0x4000000000000000 #define PHD$M_DATFX 0x8000000000000000 #define PHD$C_HWPCBLEN 128 /* Length of HWPCB */ #define PHD$K_HWPCBLEN 128 /* Length of HWPCB */ /* */ #define PHD$C_FPR_COUNT 32 /* Count of saved FP registers */ #define PHD$K_FPR_COUNT 32 /* Count of saved FP registers */ #define PHD$M_SW_FEN 0x1 #define PHD$M_AST_PENDING 0x80000000 #define PHD$M_PFMFLG 0x1 #define PHD$M_DALCSTX 0x2 #define PHD$M_WSPEAKCHK 0x4 #define PHD$M_NOACCVIO 0x8 #define PHD$M_IWSPEAKCK 0x10 #define PHD$M_IMGDMP 0x20 #define PHD$M_NO_WS_CHNG 0x40 #define PHD$M_SPARE_8 0x80 #define PHD$M_LOCK_HEADER 0x100 #define PHD$M_FREWSLE_ACTIVE 0x200 #define PHD$K_LENGTH 1008 /* Length of fixed part of process header */ #define PHD$C_LENGTH 1008 /* Length of fixed part of the process header */ #ifdef __cplusplus /* Define structure prototypes */ struct _wsl; struct _rde; struct _rights; #endif /* #ifdef __cplusplus */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _phd { #pragma __nomember_alignment unsigned __int64 phd$q_privmsk; /* Privilege mask */ unsigned short int phd$w_size; /* Structure size */ unsigned char phd$b_type; /* Dynamic structure type (PHD) */ char phd$$_spare_1; /* Spare */ /* */ /* Working set list pointers - these contain longword offsets from the beginning */ /* of the process header. */ /* */ unsigned int phd$l_wslist; /* 1st working set list entry */ unsigned int phd$l_wslock; /* 1st locked working set list entry */ unsigned int phd$l_wsdyn; /* 1st dynamic working set list entry */ unsigned int phd$l_wsnext; /* Last WSL entry replaced */ unsigned int phd$l_wslast; /* Last WSL entry in list */ /* */ /* The following three longwords specify the maximum and initial working set */ /* sizes for the process. Rather than containing the count of pages, they */ /* contains the longword index to what would be the last working set list entry. */ /* */ unsigned int phd$l_wsextent; /* Max working set size against borrowing */ unsigned int phd$l_wsquota; /* Quota on working set size */ unsigned int phd$l_dfwscnt; /* Default working set size */ unsigned int phd$l_cpulim; /* Limit on CPU time for process */ /* */ /* Process Section Table data base - PST_BASE_OFFSET is the byte offset */ /* from the beginning of the process header to the first longword beyond */ /* the process section table. PST_LAST and PST_FREE are section table */ /* indices to section table entries. */ /* */ unsigned int phd$l_pst_base_offset; /* Byte offset to base of PST */ /* First longword not in PST */ /* PST grows backwards from here */ unsigned int phd$l_pst_last; /* End of process section table */ /* (index of last PSTE allocated) */ unsigned int phd$l_pst_free; /* Head of free PSTE list */ /* (index of first free PSTE) */ /* */ /* MMG Context */ /* */ unsigned int phd$l_iorefc; /* Num reasons to keep PHD resident due to pages locked for I/O */ unsigned __int64 phd$q_next_region_id; /* Next user-defined region id */ int phd$l_pst_base_max; /* section index of top PST */ unsigned int phd$l_emptpg; /* Count of empty working set pages */ unsigned int phd$l_dfpfc; /* Default page fault cluster */ unsigned int phd$l_pgtbpfc; /* Page table cluster factor */ /* */ /* Quotas and Limits */ /* */ unsigned int phd$l_astlm; /* AST limit */ unsigned int phd$l_pshared; /* process shared object flag */ unsigned int phd$l_wssize; /* Current allowed working set size */ unsigned int phd$l_diocnt; /* Direct I/O count */ unsigned int phd$l_biocnt; /* Buffered I/O count */ unsigned int phd$l_phvindex; /* Process header vector index */ __int64 phd$q_fredptr; /* pointer to first FRED page */ __union { unsigned __int64 phd$q_lefc; /* Local event flags */ __struct { unsigned int phd$l_lefc_0; /* Cluster 0 */ unsigned int phd$l_lefc_1; /* Cluster 1 */ } phd$r_lefc_clusters; } phd$r_lefc_overlay; /* */ /* Hardware Privileged Context Block (HWPCB) - This structure must be aligned to */ /* a 128 byte boundary. Natural alignment prevents the structure from crossing a */ /* page boundary. */ /* */ /* NOTE WELL: There are bit symbols defined here for accessing the saved ASTEN, */ /* ASTSR, FEN and DATFX values in the HWPCB. These symbols are NOT to be used when */ /* interfacing to the ASTEN, ASTSR, FEN or DATFX internal processor registers directly. */ /* See the specific internal register definitions for bitmasks and constants */ /* to be used when interfacing to the IPRs directly. */ /* */ __union { unsigned __int64 phd$q_hwpcb; /* Base of HWPCB */ unsigned __int64 phd$q_ksp; /* Kernel stack pointer */ } phd$r_hwpcb_overlay; unsigned __int64 phd$q_esp; /* Executive stack pointer */ unsigned __int64 phd$q_ssp; /* Supervisor stack pointer */ unsigned __int64 phd$q_usp; /* User stack pointer */ /* Verified for IA64 port - KLN */ unsigned __int64 phd$q_ptbr; /* Page Table Base Register */ unsigned __int64 phd$q_asn; /* Address Space Number */ __union { unsigned __int64 phd$q_astsr_asten; /* ASTSR / ASTEN quadword */ __struct { unsigned phd$v_asten : 4; /* AST Enable Register */ unsigned phd$v_astsr : 4; /* AST Pending Summary Register */ } phd$r_ast_bits0; __struct { unsigned phd$v_asten_ken : 1; /* Kernel AST Enable = 1 */ unsigned phd$v_asten_een : 1; /* Executive AST Enable = 1 */ unsigned phd$v_asten_sen : 1; /* Supervisor AST Enable = 1 */ unsigned phd$v_asten_uen : 1; /* User AST Enable = 1 */ unsigned phd$v_astsr_kpd : 1; /* Kernel AST Pending = 1 */ unsigned phd$v_astsr_epd : 1; /* Executive AST Pending = 1 */ unsigned phd$v_astsr_spd : 1; /* Supervisor AST Pending = 1 */ unsigned phd$v_astsr_upd : 1; /* User AST Pending = 1 */ } phd$r_ast_bits1; } phd$r_ast_overlay; __union { unsigned __int64 phd$q_fen_datfx; /* Floating Point Enable */ __struct { unsigned phd$v_fen : 1; /* Floating Point Enable = 1 */ unsigned phd$v_fill_61_1 : 32; unsigned phd$v_fill_61_2 : 29; unsigned phd$v_pme : 1; /* Performance Monitor Enable */ unsigned phd$v_datfx : 1; /* Data Alignment Trap Fixup */ } phd$r_fen_datfx_overlay; } phd$r_fen_overlay; unsigned __int64 phd$q_cc; /* Cycle Counter */ unsigned __int64 phd$q_unq; /* Process Unique Value (IA64 R13) */ unsigned int phd$l_cpu_id; /* CPU id */ int phd$l_reserved_1; __int64 phd$q_pal_rsvd [5]; /* Reserved for PAL Scratch */ /* End of Hardware Privileged Context Block (HWPCB). */ /* */ /* */ /* Floating Point Register Save Area. There is space for 32 floating */ /* point registers, F0 through F30, and the FPCR. Note that F31 is a */ /* fixed sink register that doesn't need to be saved. */ /* */ __union { __int64 phd$q_fpr [32]; /* Space for 32 floating point registers */ __struct { /* F0 and F1 on IPF are constant registers--no save */ unsigned __int64 phd$q_f0; /* Floating Point Register F0 */ unsigned __int64 phd$q_f1; /* F1 */ unsigned __int64 phd$q_f2; /* F2 */ unsigned __int64 phd$q_f3; /* F3 */ unsigned __int64 phd$q_f4; /* F4 */ unsigned __int64 phd$q_f5; /* F5 */ unsigned __int64 phd$q_f6; /* F6 */ unsigned __int64 phd$q_f7; /* F7 */ unsigned __int64 phd$q_f8; /* F8 */ unsigned __int64 phd$q_f9; /* F9 */ unsigned __int64 phd$q_f10; /* F10 */ unsigned __int64 phd$q_f11; /* F11 */ unsigned __int64 phd$q_f12; /* F12 */ unsigned __int64 phd$q_f13; /* F13 */ unsigned __int64 phd$q_f14; /* F14 */ unsigned __int64 phd$q_f15; /* F15 */ unsigned __int64 phd$q_f16; /* F16 */ unsigned __int64 phd$q_f17; /* F17 */ unsigned __int64 phd$q_f18; /* F18 */ unsigned __int64 phd$q_f19; /* F19 */ unsigned __int64 phd$q_f20; /* F20 */ unsigned __int64 phd$q_f21; /* F21 */ unsigned __int64 phd$q_f22; /* F22 */ unsigned __int64 phd$q_f23; /* F23 */ unsigned __int64 phd$q_f24; /* F24 */ unsigned __int64 phd$q_f25; /* F25 */ unsigned __int64 phd$q_f26; /* F26 */ unsigned __int64 phd$q_f27; /* F27 */ unsigned __int64 phd$q_f28; /* F28 */ unsigned __int64 phd$q_f29; /* F29 */ unsigned __int64 phd$q_f30; /* F30 */ unsigned __int64 phd$q_fpcr; /* FPCR */ } phd$r_fpr_nums; } phd$r_fpr_overlay; /* */ /* End of Floating Point Register Save Area. */ /* */ /* */ /* Note: The Alpha architecture defines that the FEN bit in HWPCB cannot */ /* be read, so a separate software FEN bit must be kept. For performance */ /* reasons, we make this bit the low-bit. */ /* */ /* Note2: This field must immediately follow the floating point register */ /* save area. Do not move this field. By placing this field after */ /* the FPR save area, this field can be referenced using $FREDDEF */ /* as well as this data structure. */ /* */ __union { unsigned int phd$l_flags2; /* Flags2 longword */ __struct { unsigned phd$v_sw_fen : 1; /* Software FEN bit */ unsigned phd$v_fill_flags2 : 30; unsigned phd$v_ast_pending : 1; /* AST pending optimization */ } phd$r_flags2_bits; } phd$r_flags2_overlay; unsigned int phd$l_extracpu; /* Accumulated CPU time limit extension */ unsigned __int64 phd$q_asnseq; /* Address Space Number (Region ID) Sequence */ unsigned int phd$l_extdynws; /* Extra dynamic working set list entries */ /* above required WSFLUID minimum */ unsigned int phd$l_pageflts; /* Count of page faults */ unsigned int phd$l_fow_flts; /* Count of Fault On Write faults incurred */ unsigned int phd$l_for_flts; /* Count of Fault On Read faults incurred */ unsigned int phd$l_foe_flts; /* Count of Fault On Execute faults incurred */ unsigned int phd$l_cputim; /* Accumulated CPU time charged */ unsigned int phd$l_cpumode; /* Access mode to notify about cputime */ unsigned int phd$l_awsmode; /* Access mode flag for auto WS AST */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ struct _wsl *phd$q_wsl; /* pointer to WSL */ #else unsigned __int64 phd$q_wsl; #endif /* */ /* Page Table Statistics */ /* */ #pragma __nomember_alignment unsigned int phd$l_ptcntlck; /* Count of page tables containing */ /* 1 or more locked WSLEs */ unsigned int phd$l_ptcntval; /* Count of page tables containing */ /* 1 or more valid WSLEs */ unsigned int phd$l_ptcntact; /* Count of active page tables */ unsigned int phd$l_ptcntmax; /* Max count of page tables */ /* which have non-zero PTEs */ unsigned __int64 phd$q_login; /* system time at process creation */ unsigned __int64 phd$q_virtpeak; /* peak virtual size */ unsigned int phd$l_wspeak; /* peak workingset size */ int phd$l_wsfluid; /* Guaranteed number of fluid WS pages */ unsigned int phd$l_wsauth; /* Authorized working set size */ unsigned int phd$l_wsauthext; /* Authorized WS extent */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif void *phd$l_reslsth; /* Pointer to resource list */ unsigned int phd$l_authpri; /* Initial process priority */ unsigned __int64 phd$q_authpriv; /* Authorized privileges mask */ unsigned __int64 phd$q_imagpriv; /* Installed image privileges mask */ unsigned int phd$l_imgcnt; /* Image counter bumped by SYSRUNDWN */ unsigned int phd$l_pfltrate; /* Page fault rate */ unsigned int phd$l_pflref; /* Page faults at end of last interval */ unsigned int phd$l_timref; /* Time at end of last interval */ unsigned int phd$l_pgfltio; /* Count of pagefault I/O */ __struct { /* Minimum authorized security clearance */ unsigned char phd$$$_fill_3 [20]; } phd$r_min_class; __struct { /* Maximum authorized security clearance */ unsigned char phd$$$_fill_4 [20]; } phd$r_max_class; unsigned int phd$l_volumes; /* count of volumes mounted */ __int64 phd$q_wsl_next; /* VA of next page for WSL Expansion */ __int64 phd$q_wsl_last; /* VA of last page for WSL Expansion */ __union { __int64 phd$q_pagefile_refs; /* process references to pagefiles */ __struct { int phd$l_pagefile_refs_lo; /* lo longword */ int phd$l_pagefile_refs_hi; /* hi longword */ } phd$r_pagefile_refs_longs; } phd$r_pagefile_refs_overlay; unsigned __int64 phd$q_istart; /* image activation time */ /* */ /* ***** BE CAREFUL ABOUT SYNCHRONIZING ACCESS TO THESE FLAGS !! ***** */ /* */ /* Before adding new flags to this longword, READ and UNDERSTAND the following. */ /* */ /* Any new flag that requires a change to this synchronization model means that */ /* all references to the longword containing these flags must be reviewed. */ /* */ /* The current set of flags is synchronized in the following way. All flags are */ /* written only in process context. Therefore, their basic synchronization is */ /* by executing at IPL=IPL$_MMG. Note that this is NOT the same as saying that */ /* the MMG spinlock is needed. (Requiring all writes to occur under MMG would */ /* work, but it's overkill given the current set of flags.) */ /* */ /* Some of these flags are written at lower IPLs using Load-Locked/Store-Conditional */ /* sequences. This is OK, because any write at IPL$_MMG will cause the lower IPL */ /* write to be reexecuted. Writes at IPL$_MMG need not be interlocked since the writes */ /* are synchronized by virtue of occurring at the synchronization IPL. */ /* */ /* EXCEPTION !! */ /* */ /* If the flags are for the system PHD, then being at IPL$_MMG is not enough */ /* protection. In this case only, even the writes that occur at this IPL must */ /* be done as interlocked sequences since this is not a case of being limited */ /* to process context only. */ /* */ __union { unsigned int phd$l_flags; /* Flags longword */ __struct { unsigned phd$v_pfmflg : 1; /* Page fault monitoring enabled */ unsigned phd$v_dalcstx : 1; /* Need to deallocate section indices */ unsigned phd$v_wspeakchk : 1; /* Check for new working set size (proc) */ unsigned phd$v_noaccvio : 1; /* Set after inswap of process header */ unsigned phd$v_iwspeakck : 1; /* Check for new working set size (image) */ unsigned phd$v_imgdmp : 1; /* Take image dump on error exit */ unsigned phd$v_no_ws_chng : 1; /* No change to working set or swapping */ /* (Transient use by MMG code only) */ unsigned phd$$_spare_8 : 1; /* was: PGFLACC */ unsigned phd$v_lock_header : 1; /* Do not swap process header */ /* (Transient use by MMG code only) */ unsigned phd$v_frewsle_active : 1; /* FREWSLE critical section is active for */ /* a specific process context */ unsigned phd$v_fill_0_ : 6; } phd$r_flags_bits; } phd$r_flags_overlay; /* */ /* Cluster-Wide Process Services */ /* */ unsigned int phd$l_pscanctx_seqnum; /* PSCAN sequence number */ unsigned __int64 phd$q_pscanctx_queue; /* Queue of PSCAN blocks */ unsigned int phd$l_icputim; /* initial image CPU time */ unsigned int phd$l_ifaults; /* initial image fault count */ unsigned int phd$l_ifaultio; /* initial image fault I/O count */ unsigned int phd$l_iwspeak; /* image workingset peak */ unsigned int phd$l_ipagefl; /* image pagefile peak usage */ unsigned int phd$l_idiocnt; /* initial image direct I/O count */ unsigned int phd$l_ibiocnt; /* initial image buffered I/O count */ unsigned int phd$l_ivolumes; /* initial image volume mount count */ /* */ /* PTE Backpointer range for process page table pages which cannot be deleted */ /* by the modified page writer due to VA space creation in progress. */ /* */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_pt_no_delete1; /* Low PTE backpointer */ #else unsigned __int64 phd$pq_pt_no_delete1; #endif #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_pt_no_delete2; /* High PTE backpointer */ #else unsigned __int64 phd$pq_pt_no_delete2; #endif unsigned __int64 phd$q_free_pte_count; /* Count of free PTEs */ /* */ /* Beginning of process permanent region descriptors for P0, P1 and P2 */ /* ** Warning *** */ /* The layout of the following fields must match rdedef.sdl */ /* ************** */ /* */ __union { __int64 phd$q_p0_rde; /* RDE for P0 space */ __struct { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif struct _rde *phd$ps_p0_va_list_flink; /* Pointer to first RDE in P0 */ struct _rde *phd$ps_p0_va_list_blink; /* Pointer to last RDE in P0 */ } phd$r_p0_va_list; } phd$r_p0_rde_overlay; unsigned int phd$$$_p0_rde_fields [2]; /* SIZE, TYPE, SUBTYP, TABLE_LINK */ unsigned int phd$l_p0_flags; /* P0 RDE flags */ unsigned int phd$l_p0_region_prot; /* Region protection */ unsigned __int64 phd$q_p0_region_id; /* P0 region id */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_p0_start_va; /* Starting address of P0 region */ #else unsigned __int64 phd$pq_p0_start_va; #endif unsigned __int64 phd$q_p0_region_size; /* Size of P0 region */ __union { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_p0_first_free_va; /* 1st free VA at end of P0 space */ #else unsigned __int64 phd$pq_p0_first_free_va; #endif int phd$l_frep0va; /* 1st free VA at end of P0 space */ } phd$r_frep0va_overlay; __union { __int64 phd$q_p1_rde; /* RDE for P0 space */ __struct { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif struct _rde *phd$ps_p1_va_list_flink; /* Pointer to first RDE in P0 */ struct _rde *phd$ps_p1_va_list_blink; /* Pointer to last RDE in P0 */ } phd$r_p1_va_list; } phd$r_p1_rde_overlay; unsigned int phd$$$_p1_rde_fields [2]; /* SIZE, TYPE, SUBTYP, TABLE_LINK */ unsigned int phd$l_p1_flags; /* P1 RDE flags */ unsigned int phd$l_p1_region_prot; /* Region protection */ unsigned __int64 phd$q_p1_region_id; /* P1 region id */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_p1_start_va; /* Starting address of P1 region */ #else unsigned __int64 phd$pq_p1_start_va; #endif unsigned __int64 phd$q_p1_region_size; /* Size of P1 region */ __union { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_p1_first_free_va; /* 1st free VA at end of P1 space */ #else unsigned __int64 phd$pq_p1_first_free_va; #endif int phd$l_frep1va; /* 1st free VA at end of P1 space */ } phd$r_frep1va_overlay; __union { __int64 phd$q_p2_rde; /* RDE for P0 space */ __struct { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif struct _rde *phd$ps_p2_va_list_flink; /* Pointer to first RDE in P0 */ struct _rde *phd$ps_p2_va_list_blink; /* Pointer to last RDE in P0 */ } phd$r_p2_va_list; } phd$r_p2_rde_overlay; unsigned int phd$$$_p2_rde_fields [2]; /* SIZE, TYPE, SUBTYP, TABLE_LINK */ unsigned int phd$l_p2_flags; /* P2 RDE flags */ unsigned int phd$l_p2_region_prot; /* Region protection */ unsigned __int64 phd$q_p2_region_id; /* P2 region id */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_p2_start_va; /* Starting address of P2 region */ #else unsigned __int64 phd$pq_p2_start_va; #endif unsigned __int64 phd$q_p2_region_size; /* Size of P2 region */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *phd$pq_p2_first_free_va; /* 1st free VA at end of P2 space */ #else unsigned __int64 phd$pq_p2_first_free_va; #endif /* */ /* End of process permanent region descriptors for P0, P1 and P2 */ /* */ unsigned __int64 phd$q_image_authpriv; /* Installed image authorized privs */ unsigned __int64 phd$q_image_permpriv; /* Installed image initial privs */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif struct _rights *phd$ar_image_authrights; /* Installed image authorized rights */ struct _rights *phd$ar_image_rights; /* Installed image initial rights */ struct _rights *phd$ar_subsystem_authrights; /* Subsystem authorized rights */ struct _rights *phd$ar_subsystem_rights; /* Subsystem initial rights */ /* */ /* For threaded processors, we have a field to hold fractional CPU time ticks */ /* */ /* */ /* End of the fixed portion of the process header. */ /* */ } PHD; #if !defined(__VAXC) #define phd$q_lefc phd$r_lefc_overlay.phd$q_lefc #define phd$l_lefc_0 phd$r_lefc_overlay.phd$r_lefc_clusters.phd$l_lefc_0 #define phd$l_lefc_1 phd$r_lefc_overlay.phd$r_lefc_clusters.phd$l_lefc_1 #define phd$q_hwpcb phd$r_hwpcb_overlay.phd$q_hwpcb #define phd$q_ksp phd$r_hwpcb_overlay.phd$q_ksp #define phd$q_astsr_asten phd$r_ast_overlay.phd$q_astsr_asten #define phd$v_asten phd$r_ast_overlay.phd$r_ast_bits0.phd$v_asten #define phd$v_astsr phd$r_ast_overlay.phd$r_ast_bits0.phd$v_astsr #define phd$v_asten_ken phd$r_ast_overlay.phd$r_ast_bits1.phd$v_asten_ken #define phd$v_asten_een phd$r_ast_overlay.phd$r_ast_bits1.phd$v_asten_een #define phd$v_asten_sen phd$r_ast_overlay.phd$r_ast_bits1.phd$v_asten_sen #define phd$v_asten_uen phd$r_ast_overlay.phd$r_ast_bits1.phd$v_asten_uen #define phd$v_astsr_kpd phd$r_ast_overlay.phd$r_ast_bits1.phd$v_astsr_kpd #define phd$v_astsr_epd phd$r_ast_overlay.phd$r_ast_bits1.phd$v_astsr_epd #define phd$v_astsr_spd phd$r_ast_overlay.phd$r_ast_bits1.phd$v_astsr_spd #define phd$v_astsr_upd phd$r_ast_overlay.phd$r_ast_bits1.phd$v_astsr_upd #define phd$q_fen_datfx phd$r_fen_overlay.phd$q_fen_datfx #define phd$v_fen phd$r_fen_overlay.phd$r_fen_datfx_overlay.phd$v_fen #define phd$v_pme phd$r_fen_overlay.phd$r_fen_datfx_overlay.phd$v_pme #define phd$v_datfx phd$r_fen_overlay.phd$r_fen_datfx_overlay.phd$v_datfx #define phd$q_fpr phd$r_fpr_overlay.phd$q_fpr #define phd$q_f0 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f0 #define phd$q_f1 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f1 #define phd$q_f2 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f2 #define phd$q_f3 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f3 #define phd$q_f4 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f4 #define phd$q_f5 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f5 #define phd$q_f6 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f6 #define phd$q_f7 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f7 #define phd$q_f8 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f8 #define phd$q_f9 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f9 #define phd$q_f10 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f10 #define phd$q_f11 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f11 #define phd$q_f12 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f12 #define phd$q_f13 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f13 #define phd$q_f14 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f14 #define phd$q_f15 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f15 #define phd$q_f16 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f16 #define phd$q_f17 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f17 #define phd$q_f18 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f18 #define phd$q_f19 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f19 #define phd$q_f20 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f20 #define phd$q_f21 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f21 #define phd$q_f22 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f22 #define phd$q_f23 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f23 #define phd$q_f24 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f24 #define phd$q_f25 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f25 #define phd$q_f26 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f26 #define phd$q_f27 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f27 #define phd$q_f28 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f28 #define phd$q_f29 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f29 #define phd$q_f30 phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_f30 #define phd$q_fpcr phd$r_fpr_overlay.phd$r_fpr_nums.phd$q_fpcr #define phd$l_flags2 phd$r_flags2_overlay.phd$l_flags2 #define phd$v_sw_fen phd$r_flags2_overlay.phd$r_flags2_bits.phd$v_sw_fen #define phd$v_ast_pending phd$r_flags2_overlay.phd$r_flags2_bits.phd$v_ast_pending #define phd$q_pagefile_refs phd$r_pagefile_refs_overlay.phd$q_pagefile_refs #define phd$l_pagefile_refs_lo phd$r_pagefile_refs_overlay.phd$r_pagefile_refs_longs.phd$l_pagefile_refs_lo #define phd$l_pagefile_refs_hi phd$r_pagefile_refs_overlay.phd$r_pagefile_refs_longs.phd$l_pagefile_refs_hi #define phd$l_flags phd$r_flags_overlay.phd$l_flags #define phd$v_pfmflg phd$r_flags_overlay.phd$r_flags_bits.phd$v_pfmflg #define phd$v_dalcstx phd$r_flags_overlay.phd$r_flags_bits.phd$v_dalcstx #define phd$v_wspeakchk phd$r_flags_overlay.phd$r_flags_bits.phd$v_wspeakchk #define phd$v_noaccvio phd$r_flags_overlay.phd$r_flags_bits.phd$v_noaccvio #define phd$v_iwspeakck phd$r_flags_overlay.phd$r_flags_bits.phd$v_iwspeakck #define phd$v_imgdmp phd$r_flags_overlay.phd$r_flags_bits.phd$v_imgdmp #define phd$v_no_ws_chng phd$r_flags_overlay.phd$r_flags_bits.phd$v_no_ws_chng #define phd$v_lock_header phd$r_flags_overlay.phd$r_flags_bits.phd$v_lock_header #define phd$v_frewsle_active phd$r_flags_overlay.phd$r_flags_bits.phd$v_frewsle_active #define phd$q_p0_rde phd$r_p0_rde_overlay.phd$q_p0_rde #define phd$ps_p0_va_list_flink phd$r_p0_rde_overlay.phd$r_p0_va_list.phd$ps_p0_va_list_flink #define phd$ps_p0_va_list_blink phd$r_p0_rde_overlay.phd$r_p0_va_list.phd$ps_p0_va_list_blink #define phd$pq_p0_first_free_va phd$r_frep0va_overlay.phd$pq_p0_first_free_va #define phd$l_frep0va phd$r_frep0va_overlay.phd$l_frep0va #define phd$q_p1_rde phd$r_p1_rde_overlay.phd$q_p1_rde #define phd$ps_p1_va_list_flink phd$r_p1_rde_overlay.phd$r_p1_va_list.phd$ps_p1_va_list_flink #define phd$ps_p1_va_list_blink phd$r_p1_rde_overlay.phd$r_p1_va_list.phd$ps_p1_va_list_blink #define phd$pq_p1_first_free_va phd$r_frep1va_overlay.phd$pq_p1_first_free_va #define phd$l_frep1va phd$r_frep1va_overlay.phd$l_frep1va #define phd$q_p2_rde phd$r_p2_rde_overlay.phd$q_p2_rde #define phd$ps_p2_va_list_flink phd$r_p2_rde_overlay.phd$r_p2_va_list.phd$ps_p2_va_list_flink #define phd$ps_p2_va_list_blink phd$r_p2_rde_overlay.phd$r_p2_va_list.phd$ps_p2_va_list_blink #endif /* #if !defined(__VAXC) */ #define PHD$S_PHDDEF 1008 /* Old size name - synonym */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __PHDDEF_LOADED */