/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:32:41 by OpenVMS SDL EV3-3 */ /* Source: 08-APR-2008 05:03:11 $1$DGA7274:[LIB.SRC]PDTDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $PDTDEF ***/ #ifndef __PDTDEF_LOADED #define __PDTDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* DEFINE PORT-INDEPENDENT OFFSETS IN A PORT DESCRIPTOR TABLE. */ /* */ /* THERE IS ONE PDT PER PORT ACCESSED VIA SCS. THESE PORTS INCLUDE */ /* CI'S AND UDA'S. THE PDT CONTAINS A PORT-INDEPENDENT PIECE (DEFINED */ /* HERE) FOLLOWED BY AN OPTIONAL PORT-SPECIFIC PIECE DEFINED IN THE */ /* PORT DRIVER. PDT'S ARE CREATED BY THE CONTROLLER INIT ROUTINES */ /* OF THE INDIVIDUAL PORT DRIVERS. */ /*- */ #define PDT$M_SNGLHOST 0x1 #define PDT$C_PA 1 /* CI PORT */ #define PDT$C_PU 2 /* UDA PORT */ #define PDT$C_PE 3 /* NI PORT */ #define PDT$C_PS 4 /* PASSTHRU PORT */ /* constant PB equals 5 prefix PDT tag $C; /* VAX:BVP storage port */ #define PDT$C_PI 6 /* DSSI PORT */ #define PDT$C_PL 7 /* Gapless tape port */ #define PDT$C_PW 8 /* SWIFT port */ #define PDT$C_PN 9 /* NPORT */ #define PDT$C_PC 10 /* PCI-NPORT */ #define PDT$C_PB 11 /* Galaxy SMCI Port */ #define PDT$C_PM 12 /* Memory Channel Port */ #define PDT$M_CNTBSY 0x1 #define PDT$M_CNTRLS 0x2 #define PDT$M_XCNTRS 0x4 #define PDT$M_NON_CI_BHANDLE 0x8 #define PDT$M_AFFINITY 0x10 #define PDT$C_BASEVER 0 /*V4.0 drivers */ #define PDT$C_LISTENVER 1 /*V5.0 redesigned listener connection state transitions */ #define PDT$C_BALANCEVER 2 /*Dynamic load balancing version */ #define PDT$C_REORGVER 1 /*V5.0 reorganized PDT format */ #define PDT$C_CREDITVER 2 /*Optimistic credit allocation format */ #define PDT$C_NI_CLASS 10 /* NI/SCA performance level port/interconnect */ #define PDT$C_DSSI_MEDIUM_CLASS 48 /* DSSI performance level port/interconnect */ #define PDT$C_CI_CLASS 140 /* CI performance level port/interconnect */ #define PDT$C_MC_CLASS 800 /* MC performance level port/interconnect */ #define PDT$C_SM_CLASS 32767 /* Shared Memory performance level port/interconnect */ /* */ #define PDT$C_YELLOW 4 /* Port is in YELLOW zone */ #define PDT$C_RED 6 /* Port is in RED zone */ #define PDT$C_UNEQUAL_PATH 7 /* Unequal path load sharing (i.e. NI->CI) */ #define PDT$C_CTRSTART 636 /* start of pdt counter area a */ #define PDT$C_STD_CTREND 668 /* end of standard pdt counter area a */ #define PDT$C_STDNO_CTR 7 /* 7 standard counters */ #define PDT$C_EXT_CTRSTART 668 /* start of pdt extended counter area a */ #define PDT$C_EXT_CTREND 776 /* end of standard pdt counter area a */ #define PDT$C_EXTNO_CTR 26 /* 26 extended counters */ #define SCS$C_EB_MAX_INDEX 9 #define PDT$K_LENGTH 1064 /*SIZE OF PORT-INDEPENDENT PIECE */ #define PDT$C_LENGTH 1064 /*SIZE OF PORT-INDEPENDENT PIECE */ /* OF PDT. */ #define PDT$S_PDTDEF 1064 /* Old size name - synonym */ #ifdef __cplusplus /* Define structure prototypes */ struct _rbun; struct _cdrp; struct _ucb; struct _adp; #endif /* #ifdef __cplusplus */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pdt { #pragma __nomember_alignment struct _pdt *pdt$l_flink; /*LINK TO NEXT SCS PDT */ __union { unsigned short int pdt$w_portchar; /*Port Characteristics */ __struct { unsigned pdt$v_snglhost : 1; /* Port to single host bus */ unsigned pdt$v_fill_0_ : 7; } pdt$r_portchar_bits; } pdt$r_portchar_overlay; char pdtdef$$_fill_2; /* UNUSED BYTE */ unsigned char pdt$b_pdt_type; /* TYPE OF PDT */ unsigned short int pdt$w_size; /*STRUCTURE SIZE IN BYTES */ unsigned char pdt$b_type; /*STRUCTURE TYPE = SCS */ unsigned char pdt$b_subtyp; /*STRUCTURE SUBTYPE */ /* */ /* SCS accesses routines in the port driver via dispatch vectors in the PDT. */ /* There are two sets of vectors, Required entries (must be supplied by every */ /* port driver) and Optional entries (allow port drivers that must do so */ /* to supplant SCS supplied routines). */ /* */ /* The required entries are defined below, they must have the prefix */ /* PDTVEC and tag L for the INIT_PORT_VECTORS macro to work correctly */ int (*pdtvec$l_allocdg)(); /* ALLOCATE A DG BUFFER */ int (*pdtvec$l_allocmsg)(); /* ALLOCATE A MESSAGE BUFFER */ int (*pdtvec$l_deallocdg)(); /* DEALLOCATE DG BUFFER */ int (*pdtvec$l_deallomsg)(); /* DEALLOCATE MSG BUFFER */ int (*pdtvec$l_ins_pes_mfreeq)(); /* return MSG buf to port free buffer supply */ int (*pdtvec$l_ins_opt_mfreeq)(); /* return MSG buf to port free buffer supply (optimistic) */ int (*pdtvec$l_rem_opt_mfreeq)(); /* take MSG buf from port free buffer supply (optimistic) */ int (*pdtvec$l_rem_pes_mfreeq)(); /* take MSG buf from port free buffer supply (pessimistic) */ int (*pdtvec$l_add_free_dg)(); /* Give Receive DG buffer to port driver */ int (*pdtvec$l_rem_free_dg)(); /* take receive DG buffer to port driver */ int (*pdtvec$l_queue_dg)(); /* Queue DG buffer to port driver */ int (*pdtvec$l_reqdata)(); /* REQUEST BLK DATA XFER */ int (*pdtvec$l_senddata)(); /* SEND BLK DATA XFER */ int (*pdtvec$l_senddatawmsg)(); /* send data w/piggyback message */ int (*pdtvec$l_senddg)(); /* SEND A DATAGRAM */ int (*pdtvec$l_sendmsg)(); /* SEND A MESSAGE */ int (*pdtvec$l_sendmsgl)(); /* SEND A MESSAGE (low priority) */ int (*pdtvec$l_trnmsgh)(); /* return message to sender (high priority) */ int (*pdtvec$l_trnmsgl)(); /* return message to sender (low priority) */ int (*pdtvec$l_readcount)(); /* READ COUNTERS (FMT PORT SPECIFIC) */ int (*pdtvec$l_rlscount)(); /* RELEASE COUNTERS (FMT PORT SPECIFIC) */ int (*pdtvec$l_mreset)(); /* MAINT RESET OF REMOTE */ int (*pdtvec$l_mstart)(); /* MAINT START OF REMOTE */ int (*pdtvec$l_stop_vcs)(); /* SEND STOP DGS ON ALL VCS */ int (*pdtvec$l_shut_all_vc)(); /* Shutdown all VCs on a port */ int (*pdtvec$l_crash_vc)(); /* Crash (Shut off) a single VC */ int (*pdtvec$l_crash_port)(); /* Shutdown the port */ int (*pdtvec$l_reinit_port)(); /* REINIT A PORT */ int (*pdtvec$l_flush_vc)(); /* complete outstanding requests on a VC */ int (*pdtvec$l_log_error_scs)(); /* log Packet error for SCS */ int (*pdtvec$l_cleanup_pkt)(); /* return outstanding pakcets to SCS */ int (*pdtvec$l_pb_from_msg)(); /* return PB for message */ int (*pdtvec$l_chk_lost_ack)(); /* check if circuit handshake could complete */ int (*pdtvec$l_remove_pb)(); /* Remove PB if no connections */ /* Optional port driver entry point vectors (and reserved vectors). */ /* If these entries are not set by the port driver SCS defaults are used. */ int (*pdt$l_connect)(); /* REQUEST CONNECTION TO REMOTE */ int (*pdt$l_dconnect)(); /* BREAK CONNECTION */ int (*pdt$l_add_scs_hdr)(); /* Add SCS session header to a send message */ int (*pdt$l_cancel_wait)(); /* Cancel a stalled CDRP waiting for a SCS resource. This vector is required */ /* if port driver stalls for any resource. */ int (*pdt$l_map)(); /* Port-dependent Mapping of a Buffer for a Block Transfer */ int (*pdt$l_unmap)(); /* Port-dependent Unmapping of a Buffer for a Block Transfer */ int (*pdt$l_fast_sendmsg_request)(); /* Port routine to check if Fast Path can be used to send a message */ int (*pdt$l_fast_sendmsg_ass_res_pm)(); /* Port routine to associate allocated resources to a Fast Path send message */ int (*pdt$l_fast_sendmsg_pm)(); /* Port routine to send a message via Fast Path */ int (*pdt$l_alloc_rbun)(); /* Port routine to create port-specific RBUN resources */ int (*pdt$l_dealloc_rbun)(); /* Port routine to deallocate port-specific RBUN resources */ int (*pdt$l_fast_recvmsg_chk_res)(); /* Port routine to check port-specific resources to see */ /* if Fast Path can be used for a received message */ int (*pdt$l_test_crash_port)(); /* Port-dependent Crash Port routine */ int (*pdt$l_test_ins_comqh)(); /* Port-dependent Command Queue Insertion */ int (*pdt$l_test_1_port)(); /* Port-dependent Test 1 vector */ int (*pdt$l_test_2_port)(); /* Port-dependent Test 2 vector */ int (*pdtdef$$_fill_4 [7])(); /*RESERVED VECTORS */ struct _fkb *pdt$l_waitqfl; /*LISTHEAD FOR FORK BLOCKS WAITING */ struct _fkb *pdt$l_waitqbl; /* FOR NONPAGED POOL */ void *pdt$l_pm_portlock; /* PM portlock data structure */ struct _rbun *pdt$l_rbun_list; /* Singly linked list of resource bundles */ unsigned int pdt$l_rbun_length; /* Port-specific length of a RBUN */ unsigned int pdt$l_rbun_pooltype; /* Port-specific pooltype for RBUN */ /* allocation/deallocation */ unsigned int pdt$l_non_fp_sendmsgs; /* Counter of number of non-Fast Path send messages */ unsigned int pdt$l_non_fp_rcvdmsgs; /* Counter of number of non-Fast Path receive messages */ /* FILL_10 longword fill prefix PDTDEF tag $$; /* Filler for quadword alignment */ /* Keep QUADWORD aligned: */ __union { unsigned int pdt$l_dghdrsz; /*DATAGRAM HEADER SIZE */ unsigned int pdt$l_msghdrsz; /*MESSAGE HEADER SIZE */ } pdt$r_hdrsz_overlay; unsigned int pdt$l_dgovrhd; /*DATAGRAM HEADER SIZE */ /* ^^^ Obsolete field */ unsigned int pdt$l_maxbcnt; /*MAXIMUM TRANSFER BCNT */ __union { unsigned short int pdt$w_flags; /*PORT FLAGS */ __struct { unsigned pdt$v_cntbsy : 1; /* COUNTERS IN USE */ unsigned pdt$v_cntrls : 1; /* RELEASE COUNTERS */ unsigned pdt$v_xcntrs : 1; /* port supports block xfer counters */ unsigned pdt$v_non_ci_bhandle : 1; /* Port uses non-CI buffer handles */ unsigned pdt$v_affinity : 1; /* Set if user has specified affinity for this port */ unsigned pdt$v_fill_1_ : 3; } pdt$r_flags_bits; } pdt$r_flags_overlay; short int pdtdef$$_fill_5; /*RESERVED WORD */ char pdt$t_cntowner [16]; /*NAME OF SYSAP USING COUNTERS */ struct _cdrp *pdt$l_cntcdrp; /*CDRP OF SYSAP READING COUNTERS */ unsigned int pdt$l_pollsweep; /*# SECONDS TO DO A POLLER SWEEP */ struct _ucb *pdt$l_ucb0; /*ADDR OF UCB. */ struct _adp *pdt$l_adp; /*ADDR OF ADP. */ unsigned int pdt$l_max_vctmo; /*Maximum VC timeout */ unsigned short int pdt$w_scsversion; /*SCSLOA version */ unsigned short int pdt$w_ppdversion; /*PPD driver version */ int (*pdt$l_load_vector)(); /*Load vector */ unsigned short int pdt$w_load_class; /*Load class (higher arbitrary numbers for higher interconnect performance) */ /* class = 0 for default lowest performance level */ /* Interconnect specific load class values (~= Raw HW BW in Mb/S): */ /* (TYC 15-Feb-89) Dynamic Load Sharing Specific Counters and Fields */ /* */ short int pdtdef$$_fill_6; /* (TYC 24-Mar-89) quadword align queues here */ unsigned __int64 pdt$q_pb; /* Queue header for path blocks */ unsigned __int64 pdt$q_conn_wait; /* Queue header for CDTs in Load Share Wait Queue */ unsigned __int64 pdt$q_yellow; /* Queue header for CDTs in Load Share Yellow Queue */ unsigned __int64 pdt$q_red; /* Queue header for CDTs in Load Share Red Queue */ unsigned __int64 pdt$q_disabled; /* Queue header for CDTs in Load Share Disabled Queue */ unsigned int pdt$l_port_map; /* 32-bit load sharing domain bit map */ int pdt$l_avail_thruput; /* Port's available throughput */ unsigned int pdt$l_load_rating; /* Port load share rating */ unsigned int pdt$l_time_stamp; /* Load sharing port time stamp */ /* Load share thresholds */ unsigned int pdt$l_saturation_pt; /* Port saturation point */ unsigned int pdt$l_max_thruput_threshold; /* Port maximum throughput threshold */ unsigned int pdt$l_min_thruput_threshold; /* Port minimum throughput threshold */ unsigned int pdt$l_tolerance_threshold; /* Port load tolerance threshold */ /* Filler for quadword alignment: */ /* Load sharing data transfer counters */ unsigned int pdt$l_bytes_dg_xmt; /* Total bytes xmitted by port for DG only */ unsigned int pdt$l_bytes_dg_rcv; /* Total bytes rcv'd by port for DG only */ unsigned int pdt$l_bytes_msg_xmt; /* Total bytes xmitted by port for MSG only */ unsigned int pdt$l_bytes_msg_rcv; /* Total bytes rcv'd by port for MSG only */ unsigned int pdt$l_bytes_mapped; /* Total bytes mapped by port for BT only */ unsigned int pdt$l_dg_xmt; /* Total DGs xmitted by port */ unsigned int pdt$l_dg_rcv; /* Total DGs rcv'd by port */ unsigned int pdt$l_msg_xmt; /* Total MSGs xmitted by port */ unsigned int pdt$l_msg_rcv; /* Total MSGs rcv'd by port */ unsigned __int64 pdt$q_bytes_xfer; /* Total bytes xferred by port (both XMIT and RCV) */ unsigned int pdt$l_num_map; /* (TYC0001) # of map operations completed */ unsigned int pdt$l_port_cmd; /* Total # of port commands placed on */ /* queue when the queue is not empty */ /* (this is a conditional counter) */ /* Filler for quadword alignment: */ char pdtdef$$_fill_55 [4]; unsigned int pdt$l_bytes_dg_xmt_last; /* Total bytes xmitted by port for DG only */ /* up to last load sharing interval */ unsigned int pdt$l_bytes_dg_rcv_last; /* Total bytes rcv'd by port for DG only */ /* up to last load sharing interval */ unsigned int pdt$l_bytes_msg_xmt_last; /* Total bytes xmitted by port for MSG only */ /* up to last load sharing interval */ unsigned int pdt$l_bytes_msg_rcv_last; /* Total bytes rcv'd by port for MSG only */ /* up to last load sharing interval */ unsigned int pdt$l_bytes_mapped_last; /* Total bytes mapped by port for BT only */ /* up to last load sharing interval */ unsigned int pdt$l_dg_xmt_last; /* Total DGs xmitted by port */ /* up to last load sharing interval */ unsigned int pdt$l_dg_rcv_last; /* Total DGs rcv'd by port */ /* up to last load sharing interval */ unsigned int pdt$l_msg_xmt_last; /* Total MSGs xmitted by port */ /* up to last load sharing interval */ unsigned int pdt$l_msg_rcv_last; /* Total MSGs rcv'd by port */ /* up to last load sharing interval */ unsigned __int64 pdt$q_bytes_xfer_last; /* Total bytes xferred by port */ /* up to last load sharing interval */ unsigned int pdt$l_num_map_last; /* (TYC0001) # of map operations completed */ /* by port up to last load sharing interval */ unsigned int pdt$l_port_cmd_last; /* Total # of port commands placed on */ /* queue when the queue is not empty */ /* up to last load sharing interval */ /* (this is a conditional counter) */ int pdtdef$$_fill_66; /* Filler for quadword alignment */ unsigned int pdt$l_bytes_xfer_int; /* (TYC 31-AUG-89) TOTAL BYTES XFERRED */ /* DURING LAST LOAD SHARING INTERVAL */ unsigned int pdt$l_equal_path_call_count; /* Number of equal path move requests made */ /* to connections on this port */ unsigned int pdt$l_unequal_path_call_count; /* Number of unequal path move requests made */ /* to connections on this port */ unsigned int pdt$l_connection_move_count; /* Number of connection moves from this port */ /* */ /* (TYC 27-Feb-89) peak counters used with conditional assembly */ unsigned int pdt$l_bytes_dg_xmt_peak; /* Peak value of total bytes xmitted */ /* by port for DG only */ unsigned int pdt$l_bytes_dg_rcv_peak; /* Peak value of total bytes rcv'd */ /* by port for DG only */ unsigned int pdt$l_bytes_msg_xmt_peak; /* Peak value of total bytes xmitted */ /* by port for MSG only */ unsigned int pdt$l_bytes_msg_rcv_peak; /* Peak value of total bytes rcv'd */ /* by port for MSG only */ unsigned int pdt$l_bytes_mapped_peak; /* Peak value of total bytes mapped */ /* by port for BT only */ unsigned int pdt$l_dg_xmt_peak; /* Peak value of total DGs xmitted by port */ unsigned int pdt$l_dg_rcv_peak; /* Peak value of total DGs rcv'd by port */ unsigned int pdt$l_msg_xmt_peak; /* Peak value of total MSGs xmitted by port */ unsigned int pdt$l_msg_rcv_peak; /* Peak value of total MSGs rcv'd by port */ unsigned __int64 pdt$q_bytes_xfer_peak; /* Peak value of total bytes xferred */ /* by port (both XMIT and RCV) */ unsigned int pdt$l_port_cmd_peak; /* Peak value of total # of port commands placed on */ /* queue when the queue is not empty */ /* */ /* (TYC 27-Feb-89) average counters used with conditional assembly */ unsigned int pdt$l_bytes_dg_xmt_avg; /* Average value of total bytes xmitted */ /* by port for DG only */ unsigned int pdt$l_bytes_dg_rcv_avg; /* Average value of total bytes rcv'd */ /* by port for DG only */ unsigned int pdt$l_bytes_msg_xmt_avg; /* Average value of total bytes xmitted */ /* by port for MSG only */ unsigned int pdt$l_bytes_msg_rcv_avg; /* Average value of total bytes rcv'd */ /* by port for MSG only */ unsigned int pdt$l_bytes_mapped_avg; /* Average value of total bytes mapped */ /* by port for BT only */ unsigned int pdt$l_dg_xmt_avg; /* Average value of total DGs xmitted by port */ unsigned int pdt$l_dg_rcv_avg; /* Average value of total DGs rcv'd by port */ unsigned int pdt$l_msg_xmt_avg; /* Average value of total MSGs xmitted by port */ unsigned int pdt$l_msg_rcv_avg; /* Average value of total MSGs rcv'd by port */ unsigned __int64 pdt$q_bytes_xfer_avg; /* Average value of total bytes xferred */ /* by port (both XMIT and RCV) */ unsigned int pdt$l_port_cmd_avg; /* Average value of total # of port commands placed on */ /* queue when the queue is not empty */ /* (TYC 22-Jun-89) Moved down here to longword-align */ unsigned char pdt$b_ls_flag; /* Load share flag, if set, load sharing disabled for now */ char pdt$t_fill_0 [3]; /* align long. */ unsigned int pdt$l_stdno_ctr; /* Total number of standard of counters */ unsigned int pdt$l_path0_ack; /* Total Acks received on path 0. */ unsigned int pdt$l_path0_nak; /* Total Naks received on path 0. */ unsigned int pdt$l_path0_nrsp; /* Total NRSPs received on path 0. */ unsigned int pdt$l_path1_ack; /* Total Acks received on path 1. */ unsigned int pdt$l_path1_nak; /* Total Naks received on path 1. */ unsigned int pdt$l_path1_nrsp; /* Total NRSPs received on path 1. */ unsigned int pdt$l_dg_disc; /* Total Datagrams discarded. */ unsigned int pdt$l_extno_ctr; /* Total number of port extended */ unsigned int pdt$l_spare1_cnt; /* Spare counter 1. */ unsigned int pdt$l_spare2_cnt; /* Spare counter 2. */ unsigned int pdt$l_spare3_cnt; /* Spare counter 3. */ unsigned int pdt$l_spare4_cnt; /* Spare counter 4. */ __union { __struct { unsigned int pdt$l_snddat_oper_snt; /* Send Data operations completed. */ unsigned int pdt$l_snddat_data_snt; /* Bytes of SNDDAT sent by Send Data commands. */ unsigned int pdt$l_snddat_bodies_snt; /* SNDDAT Data bodies sent from host. */ unsigned int pdt$l_reqdat_oper_snt; /* REQDAT operations completed. */ unsigned int pdt$l_retdat_data_rcv; /* Bytes of data received by host in RETDAT bodies. */ unsigned int pdt$l_retdat_bodies_rcv; /* RETDAT Data bodies received by host. */ unsigned int pdt$l_sntdat_bodies_rec; /* SNTDAT bodies received and delivered to host. */ unsigned int pdt$l_sntdat_data_rec; /* Bytes of 'DATA' received in SNTDAT bodies. */ unsigned int pdt$l_cnf_snt; /* Block Data confirmations sent. */ unsigned int pdt$l_datreq_bodies_rcv; /* DATREQ bodies received. */ unsigned int pdt$l_retdat_bodies_snt; /* RETDAT Data bodies sent from host. */ unsigned int pdt$l_retdat_data_snt; /* Bytes of data sent by RETDAT. */ } pdt$r_ext_std; __struct { unsigned int pdt$l_np_sntdat_bodies_snt; /* Sent Data bodies sent */ unsigned int pdt$l_np_sntdat_data_snt; /* No. of data bytes via SNDDAT */ unsigned int pdt$l_np_cnf_bodies_rcv; /* No. Confirm bodies received */ unsigned int pdt$l_np_reqdat_oper_cmp; /* REQDAT operations completed. */ unsigned int pdt$l_np_retdat_bodies_rcv; /* RETDAT Data bodies received by host. */ unsigned int pdt$l_np_retdat_data_rcv; /* Bytes of data received by host in RETDAT bodies. */ unsigned int pdt$l_np_sntdat_bodies_rcv; /* SNTDAT bodies received and delivered to host. */ unsigned int pdt$l_np_sntdat_data_rcv; /* Bytes of 'DATA' received in SNTDAT bodies. */ unsigned int pdt$l_np_cnf_bodies_snt; /* Block Data confirmations sent. */ unsigned int pdt$l_np_reqdat_bodies_rcv; /* DATREQ bodies received. */ unsigned int pdt$l_np_retdat_bodies_snt; /* RETDAT Data bodies sent from host. */ unsigned int pdt$l_np_retdat_data_snt; /* Bytes of data sent by RETDAT. */ } pdt$r_ext_np; } pdt$r_ext_counters_overlay; unsigned int pdt$l_dgsnt; /* DG bodies sent */ unsigned int pdt$l_dg_txt_snt; /* Bytes of DG TEXT Sent */ unsigned int pdt$l_msg_snt; /* MSG bodies sent */ unsigned int pdt$l_msg_txt_snt; /* Bytes of MSG TEXT Sent */ unsigned int pdt$l_misc_snt; /* All other opcode bodies sent */ unsigned int pdt$l_dg_rec; /* DG bodies received and delivered to host. */ unsigned int pdt$l_dg_txtrec; /* Bytes of dg received and delivered to host. */ unsigned int pdt$l_msg_rec; /* MSG bodies received. */ unsigned int pdt$l_msg_txt_rec; /* Bytes of msg text received and delivered to host. */ unsigned int pdt$l_misc_rec; /* All other bodies received. */ unsigned int pdt$l_snddat_data_snt_last; /* Bytes of SNDDAT sent by Send */ /* Data commands up to last load */ /* sharing interval */ unsigned int pdt$l_snddat_oper_snt_last; /* # of Send Data operations from host */ /* up to last load sharing interval */ unsigned int pdt$l_retdat_data_rcv_last; /* Bytes of data received by host in */ /* RETDAT bodies up to last load */ /* sharing interval */ unsigned int pdt$l_reqdat_oper_snt_last; /* # of REQDAT operations completed by */ /* host up to last load share interval */ unsigned int pdt$l_cnf_snt_last; /* # of Block Data confirmations sent */ /* up to last load share interval */ unsigned int pdt$l_sntdat_data_rec_last; /* Bytes of 'DATA' received in SNTDAT bodies */ /* up to last load sharing interval */ unsigned int pdt$l_datreq_bodies_rcv_last; /* # of DATREQ bodies received */ /* up to last load sharing interval */ unsigned int pdt$l_retdat_data_snt_last; /* Bytes of data sent by RETDAT up to */ /* last load sharing interval */ unsigned int pdt$l_avg_xfer_size; /* Average transfer size used in */ /* calculating port's effective bandwidth */ unsigned int pdt$l_eb_table; /* address of Ports Effec. Bandwidth table */ int pdtdef$$_fill_77; /* Filler for quadword alignment */ void *pdt$q_formpb [2]; /* Listhead of formative PB's from this port */ unsigned short int pdt$w_pbcount; /* # PB's (non-formative) associated with this PDT */ short int pdtdef$$_fill_7; /* Ensure longword alignment */ __union { unsigned char pdt$b_port_num; /* Local port number */ unsigned char pdt$t_port_num [6]; } pdt$r_port_num_overlay; __union { unsigned char pdt$b_max_port; /* Maximum port number */ unsigned char pdt$t_max_port [6]; } pdt$r_max_port_overlay; unsigned int pdt$l_curcnt; /* time (secs) till next RDCNT */ unsigned int pdt$l_pooldue; /* time when message buffer should be available */ void *pdt$l_bdlt; /* addr. or port independent portion of ports BDLT */ /* be quadword aligned: */ unsigned char pdt$b_scs_maint_block [16]; /*Add a Maintenance block to the CDT */ /* which must be quadword aligned */ unsigned int pdt$l_tqeaddr; /* Address store for VC check TQE */ unsigned int pdt$l_timvcfail; /* Value for previous value of G^SGN$TIMVCFAIL */ __union { #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned __int64 pdt$q_mgt_handles; /* Managed & Managing object handles. */ #pragma __nomember_alignment __struct { unsigned int pdt$l_mgt_handle; /* Managed object handle */ unsigned int pdt$l_mgt_mgr_handle; /* Managing object handle */ } pdt$r_mgt_handles_struc; } pdt$r_mgt_handles_overlay; int pdt$l_mgt_priority; /* Management assigned port priority value. */ unsigned int pdt$l_mgt_req; /* Count of management requests */ unsigned int pdt$l_mgt_req_bytes; /* Cout of management request bytes */ unsigned int pdt$l_mgt_err; /* Mgt error count */ unsigned int pdt$l_mgt_rsp; /* Mgt responses */ unsigned int pdt$l_mgt_rsp_bytes; /* Bytes of response data */ unsigned int pdt$l_mgt_cont; /* Continuation flag */ unsigned int pdt$a_last_rsp_hdr; /* Address of last management response */ unsigned int pdt$l_return_func; /* Function code returned in a response */ unsigned int pdt$l_num_ret; unsigned int pdt$l_return_major; unsigned int pdt$l_return_minor; unsigned int pdt$l_cont_trace; unsigned int pdt$l_cont_seq; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif char pdt$r_trace [120]; /* TRACE CONTEXT */ } PDT; #if !defined(__VAXC) #define pdt$w_portchar pdt$r_portchar_overlay.pdt$w_portchar #define pdt$v_snglhost pdt$r_portchar_overlay.pdt$r_portchar_bits.pdt$v_snglhost #define pdt$l_dghdrsz pdt$r_hdrsz_overlay.pdt$l_dghdrsz #define pdt$l_msghdrsz pdt$r_hdrsz_overlay.pdt$l_msghdrsz #define pdt$w_flags pdt$r_flags_overlay.pdt$w_flags #define pdt$v_cntbsy pdt$r_flags_overlay.pdt$r_flags_bits.pdt$v_cntbsy #define pdt$v_cntrls pdt$r_flags_overlay.pdt$r_flags_bits.pdt$v_cntrls #define pdt$v_xcntrs pdt$r_flags_overlay.pdt$r_flags_bits.pdt$v_xcntrs #define pdt$v_non_ci_bhandle pdt$r_flags_overlay.pdt$r_flags_bits.pdt$v_non_ci_bhandle #define pdt$v_affinity pdt$r_flags_overlay.pdt$r_flags_bits.pdt$v_affinity #define pdt$l_snddat_oper_snt pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_snddat_oper_snt #define pdt$l_snddat_data_snt pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_snddat_data_snt #define pdt$l_snddat_bodies_snt pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_snddat_bodies_snt #define pdt$l_reqdat_oper_snt pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_reqdat_oper_snt #define pdt$l_retdat_data_rcv pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_retdat_data_rcv #define pdt$l_retdat_bodies_rcv pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_retdat_bodies_rcv #define pdt$l_sntdat_bodies_rec pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_sntdat_bodies_rec #define pdt$l_sntdat_data_rec pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_sntdat_data_rec #define pdt$l_cnf_snt pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_cnf_snt #define pdt$l_datreq_bodies_rcv pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_datreq_bodies_rcv #define pdt$l_retdat_bodies_snt pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_retdat_bodies_snt #define pdt$l_retdat_data_snt pdt$r_ext_counters_overlay.pdt$r_ext_std.pdt$l_retdat_data_snt #define pdt$l_np_sntdat_bodies_snt pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_sntdat_bodies_snt #define pdt$l_np_sntdat_data_snt pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_sntdat_data_snt #define pdt$l_np_cnf_bodies_rcv pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_cnf_bodies_rcv #define pdt$l_np_reqdat_oper_cmp pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_reqdat_oper_cmp #define pdt$l_np_retdat_bodies_rcv pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_retdat_bodies_rcv #define pdt$l_np_retdat_data_rcv pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_retdat_data_rcv #define pdt$l_np_sntdat_bodies_rcv pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_sntdat_bodies_rcv #define pdt$l_np_sntdat_data_rcv pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_sntdat_data_rcv #define pdt$l_np_cnf_bodies_snt pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_cnf_bodies_snt #define pdt$l_np_reqdat_bodies_rcv pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_reqdat_bodies_rcv #define pdt$l_np_retdat_bodies_snt pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_retdat_bodies_snt #define pdt$l_np_retdat_data_snt pdt$r_ext_counters_overlay.pdt$r_ext_np.pdt$l_np_retdat_data_snt #define pdt$b_port_num pdt$r_port_num_overlay.pdt$b_port_num #define pdt$t_port_num pdt$r_port_num_overlay.pdt$t_port_num #define pdt$b_max_port pdt$r_max_port_overlay.pdt$b_max_port #define pdt$t_max_port pdt$r_max_port_overlay.pdt$t_max_port #define pdt$q_mgt_handles pdt$r_mgt_handles_overlay.pdt$q_mgt_handles #define pdt$l_mgt_handle pdt$r_mgt_handles_overlay.pdt$r_mgt_handles_struc.pdt$l_mgt_handle #define pdt$l_mgt_mgr_handle pdt$r_mgt_handles_overlay.pdt$r_mgt_handles_struc.pdt$l_mgt_mgr_handle #endif /* #if !defined(__VAXC) */ #define PDT$C_PAMAC_VER 2 /* */ #define PDT$M_PWF_CLNUP 0x1 #define PDT$M_PUP 0x2 #define PDT$M_LBDG 0x4 #define PDT$M_NEW_RSP 0x8 #define PDT$M_REQID_SNT 0x10 #define PDT$M_INSTR_SNT 0x20 #define PDT$M_CLSCKT 0x40 #define PDT$M_LOCAL 0x80 #define PDT$M_LOOK_ASIDE 0x100 #define PDT$C_PQB 1096 /* Base of PQB */ #define PDT$Q_COMQBASE 1096 /* Base of queue headers */ #define PDT$C_QELOGEND 1480 #define PDT$C_PAPQBEND 1608 #define PDT$C_RESP_CNT 100 #define PDT$C_MFQ_THRESHOLD -100 #define PDT$C_MFQ_INCREMENT 30 #define PDT$C_HSHUT_SIZ 28 /* Shutdown DG itself */ #define PDT$C_LASTGASP_DG 1784 #define PDT$C_SETCKT_SIZ 36 /* SETCKT DG itself */ #define PDT$M_M 0x70000000 #define PDT$C_DEFCNTR 60 #define PDT$C_ERLCNTR 86400 #define PDT$C_SPEC_CTRSTART 2164 #define PDT$C_SPECNO_CTR 14 #define PDT$C_SPEC_CTREND 2224 #define PDT$C_SPEC_CTR_LENGTH 60 #define PDT$C_SCSLENGTH 2224 #define PDT$C_PAREGBASE 2224 #define PDT$C_PAREGEND 2340 #define PDT$C_PALENGTH 2352 #define PDT$S_PAPDTDEF 2352 /* Old size name - synonym */ #ifdef __cplusplus /* Define structure prototypes */ struct _adp; #endif /* #ifdef __cplusplus */ #pragma __nomember_alignment typedef struct _papdt { /* */ /* Skip the common PDT */ /* */ unsigned char pdt$b_pdt_fill [1064]; /* */ /* Define private PA fields */ /* */ /* All bits in PDT$L_IPORT_STS and PDT$W_LPORT_STS are uniquely defined */ /* to test for coding errors! */ /* */ __union { /* Interlocked (SMP) Port status */ __struct { unsigned pdt$v_pwf_clnup : 1; /* Power fail cleanup in progress */ unsigned pdt$v_pup : 1; /* Power up has occurred */ unsigned pdt$v_fill_6_ : 6; } pdt$r_iport_sts_bits; unsigned int pdt$l_iport_sts; } pdt$r_iport_sts_overlay; __union { /* Port status (SCS lock) */ __struct { unsigned pdt$v_fill1 : 2; unsigned pdt$v_lbdg : 1; /* 0/1 for LB dg's disabled/ */ /* enabled on this port */ unsigned pdt$v_new_rsp : 1; /* New Response timeout check */ /* Cleared every polling */ /* interval and set when a */ /* response is dequeued from */ /* the response queue. */ unsigned pdt$v_reqid_snt : 1; /* Polling activity check -- */ /* Set when the poller sends */ /* a REQID to enable the port */ /* timeout mechanism. */ unsigned pdt$v_instr_snt : 1; /* BVP instruction in progress */ unsigned pdt$v_clsckt : 1; /* PB stalled because a close */ /* circuit datagram is in use */ unsigned pdt$v_local : 1; /* This is a local (BVP) port */ /* This bit is used for */ /* interpretation of the MSTART */ /* and MRESET functions. */ unsigned pdt$v_look_aside : 1; /* This port can allocate message */ /* packets directly from the */ /* lookaside list */ unsigned pdt$v_fill_7_ : 7; } pdt$r_lport_sts_bits; unsigned short int pdt$w_lport_sts; } pdt$r_lport_sts_overlay; short int pdt$w_fill2; unsigned int pdt$l_clsckt_dg; /* Close circuit datagram */ /* stored here to guarantee */ /* circuit shutdown even though */ /* there is no pool. */ unsigned int pdt$l_adapter; /* Base of register space -- */ /* used because the CNF is */ /* not at the base for the */ /* BCI750. */ /* be quadword aligned: */ /* be quadword aligned: */ __union { unsigned __int64 pdt$q_dfreeq; /* Datagram free queue header */ __struct { void *pdt$l_dfreeq_flink; void *pdt$l_dfreeq_blink; } pdt$r_fill_3_; } pdt$r_fill_2_; __union { unsigned __int64 pdt$q_mfreeq; /* Message free queue header */ __struct { void *pdt$l_mfreeq_flink; void *pdt$l_mfreeq_blink; } pdt$r_fill_5_; } pdt$r_fill_4_; unsigned __int64 pdt$q_comql; /* Listhead for command */ /* queue 0, low priority */ unsigned __int64 pdt$q_comqh; /* Listhead for command */ /* queue 1, high priority */ unsigned __int64 pdt$q_comq2; /* Listhead for command */ /* queue 2 */ unsigned __int64 pdt$q_comq3; /* Listhead for command */ /* queue 3 */ unsigned __int64 pdt$q_rspq; /* Listhead for response */ /* queue */ void *pdt$l_dfqhdr; /* Addr of DG free queue */ /* listhead */ void *pdt$l_mfqhdr; /* Addr of MSG free queue */ /* listhead */ unsigned short int pdt$w_dqelen; /* DG free Q entry length */ short int pdt$w_fill3; /* MBZ word */ unsigned short int pdt$w_mqelen; /* MSG free Q entry length */ short int pdt$w_fill4; /* MBZ word */ void *pdt$l_vpqb; /* VA of PQB base */ void *pdt$l_vbdt; /* VA of BDT base */ unsigned short int pdt$w_bdtlen; /* # of entries in BDT */ short int pdt$w_fill5; /* MBZ word */ void *pdt$l_sptbase; /* PA of base of SPT */ unsigned int pdt$l_sptlen; /* # of entries in SPT */ void *pdt$l_gptbase; /* VA of base of GPT */ unsigned int pdt$l_gptlen; /* # of entries in GPT */ __union { unsigned int pdt$l_keepalive; /* Port keepalive interval */ unsigned int pdt$l_vc_check; /* Virtual circuit checking */ /* interval */ } pdt$r_fill6; unsigned int pdt$l_func_mask; /* Function mask */ char pdt$b_fill7 [164]; unsigned int pdt$l_dqelogout [16]; /* DGs held by port on */ /* powerfailure */ unsigned int pdt$l_mqelogout [16]; /* MSGs held by port on */ /* powerfailure */ char pdt$b_fill8 [128]; unsigned __int64 pdt$q_uninit_timeout; /* Timeout value to use during */ /* intialization sequeunces */ unsigned __int64 pdt$q_crrr_cache_que; /* Carrier queue cache */ unsigned __int64 pdt$q_qbuf_cache_que; /* QBufqueue cache */ unsigned __int64 pdt$q_type1_cache_que; /* Type 1 array queue cache */ unsigned int pdt$l_ins_comql; /* Notify port of non-empty CMDQ0 */ unsigned int pdt$l_ins_comqh; /* Notify port of non-empty CMDQ1 */ unsigned int pdt$l_ins_dfreq; /* Notify port of non-empty DFQ */ unsigned int pdt$l_ins_mfreq; /* Notify port of non-empty MFQ */ unsigned int pdt$l_trc_flag; /* Control bits for tracing */ void *pdt$l_trc_buf; /* Pointer to allocated trace */ /* buffer */ int (*pdt$l_trc_cmdql)(); /* Vector for tracing CMDQL */ int (*pdt$l_trc_cmdqm)(); /* Vector for tracing CMDQM */ int (*pdt$l_trc_cmdqh)(); /* Vector for tracing CMDQH */ int (*pdt$l_trc_rsp)(); /* Vector for tracing PROC_RSP */ int (*pdt$l_proc_rsp)(); /* Runtime vector for processing */ /* responses. */ unsigned int pdt$l_debugcheck; /* Debugging bugcheck flags */ unsigned int pdt$l_resp_cnt; /* Number of responses to be */ /* removed from the response */ /* queue before reforking */ unsigned int pdt$l_mfq_deficit; /* Dynamic message free queue */ /* deficit. If negative, one */ /* message free queue entry has */ /* been allocated for each SCA */ /* credit. If positive, then */ /* represents the number of */ /* SCA-required credits which */ /* have not been allocated to */ /* the message free queue. */ unsigned int pdt$l_mfq_threshold; /* Dynamic message threshold */ /* increment. This value */ /* is the change in */ /* PDT$L_MFQ_THRESHOLD whenever */ /* a message free queue empty */ /* interrupt indicates that the */ /* optimistic credit allocation */ /* has been too optimistic. */ unsigned int pdt$l_mfq_increment; /* Number to change the threshold */ /* by. Make this large to */ /* avoid a cascade of MFQE */ /* interrupts and a possible */ /* port timeout during the */ /* handling of these interrupts */ unsigned int pdt$l_mfqe_count; /* Count of MFQE interrupts */ unsigned int pdt$l_dgnethd; /* Network header size */ unsigned int pdt$l_dgallocsz; /* Datagram allocation size */ unsigned int pdt$l_scs_offset; /* Offset of SCS header */ unsigned int pdt$l_sprt_offset; /* Offset into PPD of source port address */ unsigned int pdt$l_dprt_offset; /* Offset into PPD of destination port address */ /* Normally zero except for ports */ /* which support subnode addressing */ unsigned int pdt$l_ppd_sub; /* Extension for subnode addressing */ /* Zero for nonsubnode type ports */ /* */ /* Host shutdown datagram fields -- used by both CI and BVP ports to short- */ /* circuit cluster and disk timeouts. As part of shutting down a system */ /* all VCs must be closed with a setckt DG before issuing the last gasp DG. */ /* This prevents data corruption problems from occurring in a multiple port */ /* system. The setckt DG and last gasp DG use the same area of memory to */ /* guarantee they are sent out */ /* */ unsigned __int64 pdt$q_temp_rspq; /* Temporary response queue to */ /* hold responses dequeued */ /* during send of host */ /* shutdown datagram */ char pdt$b_octa_fill2 [4]; unsigned char pdt$b_hshut_dg [28]; int pdt$l_fill9 [3]; unsigned char pdt$b_setckt_dg [36]; /* */ /* Maximum packet multiple which may be used by the local port. This field */ /* is minimized with the maximum packet multiple supported by the remote port. */ /* For performance reasons, the actual packet multiple is shifted to bits */ /* 30:28 to correspond with their positions in the message body. */ /* */ __union { __struct { unsigned pdt$v_fill10 : 28; unsigned pdt$v_m : 3; unsigned pdt$v_fill11 : 1; } pdt$r_lport_mult_bits; unsigned int pdt$l_lport_mult; } pdt$r_lport_mult_overlay; int pdt$l_fill12 [10]; unsigned int pdt$l_vc_chkdue; /* Next due time for VC checking */ unsigned int pdt$l_pollerdue; /* Due time for configuration */ /* poller */ unsigned char pdt$b_portmap [32]; /* Bitmap of ports */ /* we've heard from */ unsigned char pdt$b_plogmap [32]; /* Bitmap of ports we've logged */ /* with improper nodename and/or */ /* SYSID, to whom we won't talk */ unsigned char pdt$b_dqimap [32]; /* Datagram inhibit mask */ unsigned char pdt$b_fsnmap [32]; /* Full sequence number mask */ unsigned char pdt$b_samap [32]; /* Subnode addressing mask */ unsigned char pdt$b_nadpmap [32]; /* Non Alternating Dual Path mask */ unsigned char pdt$b_rdpmap [32]; /* RDP mask */ unsigned int pdt$l_setcktmsk; /* SETCKT bit mask */ unsigned char pdt$b_nxt_port; /* # of next port to poll */ unsigned char pdt$b_reqidps; /* Path select value for */ /* configuration poller */ unsigned char pdt$b_p0_lbsts; /* Status of current */ unsigned char pdt$b_p1_lbsts; /* and previous LB DG */ /* tests for paths 0/1 */ /* FILL13 word fill; */ /* Keep QW aligned: */ void *pdt$l_lbdg; /* Addr of template loopback */ /* datagram */ unsigned short int pdt$w_stdgdyn; /* # DGs queued for IDREQc */ /* used in start handshakes and */ /* finding out about bad paths */ unsigned short int pdt$w_stdgused; /* # ports that we know of that */ /* will be sending IDRECs */ short int pdt$w_fill14; char pdt$b_align2 [6]; /* QUADWORD ALIGN */ void *pdt$l_rdcntdg; /* Address of RDCNT Datagram */ unsigned int pdt$l_spare5; /* Spare entry */ unsigned int pdt$l_defcntr; /* Default Counter update rate in seconds */ unsigned int pdt$l_curcntr; /* Current Counter update rate in seconds */ unsigned int pdt$l_erlcntr; /* Errorlog Counter update rate in seconds */ unsigned int pdt$l_curerlcnt; /* Current Error log count (how many sec left till report counters to error log) */ unsigned int pdt$l_cntusers; /* Number of users requesting counters addr */ unsigned __int64 pdt$q_last_err; /* Time of last port corrected error */ unsigned __int64 pdt$q_time_rdcnt; /* Time of last RDCNT response returned */ /* */ /* CIXCD port-specific counters */ /* */ unsigned int pdt$l_specno_ctr; /* Total number of port specific of counters */ unsigned int pdt$l_pckt_rcrc; /* Total number of packets received with CRC errors */ unsigned int pdt$l_port_idle; /* Amount of time time port is idle (seconds) */ unsigned int pdt$l_rspr_wpe; /* Responder Register write PEs */ unsigned int pdt$l_mbpb_wpe; /* Mover B Packet Buffer PEs */ unsigned int pdt$l_cmdr_wpe; /* Commander Register write PEs */ unsigned int pdt$l_intr_wpe; /* Interrupt Register write PEs */ unsigned int pdt$l_mar_wpe; /* Mover A Register write PEs */ unsigned int pdt$l_mbr_wpe; /* Mover B Register write PEs */ unsigned int pdt$l_mpb_rpe; /* MCWI Packet Buffer Read PEs */ unsigned int pdt$l_tbuf_pe; /* Transmit Buffer parity error */ unsigned int pdt$l_mib_pe; /* MCDP Internal Bus PEs */ unsigned int pdt$l_mcwi_pe; /* MCWI PEs */ unsigned int pdt$l_yreg_pe; /* MCDP YREG PEs */ unsigned int pdt$l_xreg_pe; /* MCDP XREG PEs */ unsigned int pdt$l_cnf; /* Configuration register */ unsigned int pdt$l_pmc; /* Port maintenance/control register */ unsigned int pdt$l_madr; /* Port maintenance address register */ unsigned int pdt$l_mdatr; /* Port maintenance data register */ unsigned int pdt$l_ps; /* Port status register */ unsigned int pdt$l_pqbbr; /* Port queue block base register */ unsigned int pdt$l_cq0; /* Command queue 0 control register */ unsigned int pdt$l_cq1; /* Command queue 1 control register */ unsigned int pdt$l_psr; /* Port status release register */ unsigned int pdt$l_pec; /* Port enable control register */ unsigned int pdt$l_pic; /* Port initialize control register */ unsigned int pdt$l_dfq; /* DG free queue control register */ unsigned int pdt$l_mfq; /* MSG free queue control register */ unsigned int pdt$l_mtc; /* Maintenance timer control register */ unsigned int pdt$l_pfar; /* Port failing address register */ unsigned int pdt$l_ppr; /* Port parameter register */ unsigned int pdt$l_psnr; /* Port serial number register */ unsigned int pdt$l_fadrl; /* Failing address low register */ unsigned int pdt$l_fadrh; /* Failing address high register */ unsigned int pdt$l_pesr; /* Port error status register */ unsigned int pdt$l_pidr; /* Port interrupt destination register */ unsigned int pdt$l_pvr; /* Port vector register */ unsigned int pdt$l_pevr; /* Port error vector register */ unsigned int pdt$l_prvr; /* Port response vector register */ unsigned int pdt$l_xcomm; /* XMI command register */ unsigned int pdt$l_pdcsr; /* Port diagnostic control register */ unsigned int pdt$l_pscr; /* Port scan control register */ unsigned int pdt$l_psdr; /* Port scan data register */ unsigned int pdt$l_psernum; /* Port serial number */ struct _adp *pdt$l_altadp; /* The other port's ADP */ struct _pdt *pdt$l_altpdt; /* The other port's PDT */ unsigned char pdt$b_port1; /* 1 if port 1, 0 if port 2 */ char pdt$b_align3 [3]; } PAPDT; #if !defined(__VAXC) #define pdt$v_pwf_clnup pdt$r_iport_sts_overlay.pdt$r_iport_sts_bits.pdt$v_pwf_clnup #define pdt$v_pup pdt$r_iport_sts_overlay.pdt$r_iport_sts_bits.pdt$v_pup #define pdt$l_iport_sts pdt$r_iport_sts_overlay.pdt$l_iport_sts #define pdt$v_lbdg pdt$r_lport_sts_overlay.pdt$r_lport_sts_bits.pdt$v_lbdg #define pdt$v_new_rsp pdt$r_lport_sts_overlay.pdt$r_lport_sts_bits.pdt$v_new_rsp #define pdt$v_reqid_snt pdt$r_lport_sts_overlay.pdt$r_lport_sts_bits.pdt$v_reqid_snt #define pdt$v_instr_snt pdt$r_lport_sts_overlay.pdt$r_lport_sts_bits.pdt$v_instr_snt #define pdt$v_clsckt pdt$r_lport_sts_overlay.pdt$r_lport_sts_bits.pdt$v_clsckt #define pdt$v_local pdt$r_lport_sts_overlay.pdt$r_lport_sts_bits.pdt$v_local #define pdt$v_look_aside pdt$r_lport_sts_overlay.pdt$r_lport_sts_bits.pdt$v_look_aside #define pdt$w_lport_sts pdt$r_lport_sts_overlay.pdt$w_lport_sts #define pdt$q_dfreeq pdt$r_fill_2_.pdt$q_dfreeq #define pdt$l_dfreeq_flink pdt$r_fill_2_.pdt$r_fill_3_.pdt$l_dfreeq_flink #define pdt$l_dfreeq_blink pdt$r_fill_2_.pdt$r_fill_3_.pdt$l_dfreeq_blink #define pdt$q_mfreeq pdt$r_fill_4_.pdt$q_mfreeq #define pdt$l_mfreeq_flink pdt$r_fill_4_.pdt$r_fill_5_.pdt$l_mfreeq_flink #define pdt$l_mfreeq_blink pdt$r_fill_4_.pdt$r_fill_5_.pdt$l_mfreeq_blink #define pdt$l_keepalive pdt$r_fill6.pdt$l_keepalive #define pdt$l_vc_check pdt$r_fill6.pdt$l_vc_check #define pdt$v_m pdt$r_lport_mult_overlay.pdt$r_lport_mult_bits.pdt$v_m #define pdt$l_lport_mult pdt$r_lport_mult_overlay.pdt$l_lport_mult #endif /* #if !defined(__VAXC) */ #define PDT$M_PI_CQ3 0x1 #define PDT$M_PI_CQ2 0x2 #define PDT$M_PI_CQ1 0x4 #define PDT$M_PI_CQ0 0x8 #define PDT$C_PILENGTH 2488 #define PDT$S_PIPDTDEF 2488 /* Old size name - synonym */ typedef struct _pipdt { /* */ /* Skip the common PDT plus the PA extension */ /* */ unsigned char pdt$b_pdt_fill [2352]; /* */ /* Define private PI fields */ /* */ __union { unsigned __int64 pdt$q_pi_cmdq0; __struct { void *pdt$l_pi_cmdq0_flink; void *pdt$l_pi_cmdq0_blink; } pdt$r_fill_9_; } pdt$r_fill_8_; __union { unsigned __int64 pdt$q_pi_cmdq1; __struct { void *pdt$l_pi_cmdq1_flink; void *pdt$l_pi_cmdq1_blink; } pdt$r_fill_11_; } pdt$r_fill_10_; __union { unsigned __int64 pdt$q_pi_cmdq2; __struct { void *pdt$l_pi_cmdq2_flink; void *pdt$l_pi_cmdq2_blink; } pdt$r_fill_13_; } pdt$r_fill_12_; __union { unsigned __int64 pdt$q_pi_cmdq3; __struct { void *pdt$l_pi_cmdq3_flink; void *pdt$l_pi_cmdq3_blink; } pdt$r_fill_15_; } pdt$r_fill_14_; __union { unsigned __int64 pdt$q_pi_ripq; __struct { void *pdt$l_pi_ripq_flink; void *pdt$l_pi_ripq_blink; } pdt$r_fill_17_; } pdt$r_fill_16_; void *pdt$l_pi_sva; unsigned int pdt$l_pi_ppd; unsigned int pdt$l_pi_ini; unsigned int pdt$l_pi_random; unsigned int pdt$l_pi_dg_max; unsigned int pdt$l_pi_msg_max; unsigned int pdt$l_pi_nr [8]; unsigned int pdt$l_pi_ns [8]; unsigned char pdt$b_pi_cstmap; unsigned char pdt$b_pi_ripmap; unsigned char pdt$b_pi_pipmap; __union { __struct { unsigned pdt$v_pi_cq3 : 1; unsigned pdt$v_pi_cq2 : 1; unsigned pdt$v_pi_cq1 : 1; unsigned pdt$v_pi_cq0 : 1; unsigned pdt$v_fill_18_ : 4; } pdt$r_pi_work_bits; unsigned char pdt$b_pi_work; } pdt$r_pi_work_overlay; char pdt$b_pi_align [4]; } PIPDT; #if !defined(__VAXC) #define pdt$q_pi_cmdq0 pdt$r_fill_8_.pdt$q_pi_cmdq0 #define pdt$l_pi_cmdq0_flink pdt$r_fill_8_.pdt$r_fill_9_.pdt$l_pi_cmdq0_flink #define pdt$l_pi_cmdq0_blink pdt$r_fill_8_.pdt$r_fill_9_.pdt$l_pi_cmdq0_blink #define pdt$q_pi_cmdq1 pdt$r_fill_10_.pdt$q_pi_cmdq1 #define pdt$l_pi_cmdq1_flink pdt$r_fill_10_.pdt$r_fill_11_.pdt$l_pi_cmdq1_flink #define pdt$l_pi_cmdq1_blink pdt$r_fill_10_.pdt$r_fill_11_.pdt$l_pi_cmdq1_blink #define pdt$q_pi_cmdq2 pdt$r_fill_12_.pdt$q_pi_cmdq2 #define pdt$l_pi_cmdq2_flink pdt$r_fill_12_.pdt$r_fill_13_.pdt$l_pi_cmdq2_flink #define pdt$l_pi_cmdq2_blink pdt$r_fill_12_.pdt$r_fill_13_.pdt$l_pi_cmdq2_blink #define pdt$q_pi_cmdq3 pdt$r_fill_14_.pdt$q_pi_cmdq3 #define pdt$l_pi_cmdq3_flink pdt$r_fill_14_.pdt$r_fill_15_.pdt$l_pi_cmdq3_flink #define pdt$l_pi_cmdq3_blink pdt$r_fill_14_.pdt$r_fill_15_.pdt$l_pi_cmdq3_blink #define pdt$q_pi_ripq pdt$r_fill_16_.pdt$q_pi_ripq #define pdt$l_pi_ripq_flink pdt$r_fill_16_.pdt$r_fill_17_.pdt$l_pi_ripq_flink #define pdt$l_pi_ripq_blink pdt$r_fill_16_.pdt$r_fill_17_.pdt$l_pi_ripq_blink #define pdt$v_pi_cq3 pdt$r_pi_work_overlay.pdt$r_pi_work_bits.pdt$v_pi_cq3 #define pdt$v_pi_cq2 pdt$r_pi_work_overlay.pdt$r_pi_work_bits.pdt$v_pi_cq2 #define pdt$v_pi_cq1 pdt$r_pi_work_overlay.pdt$r_pi_work_bits.pdt$v_pi_cq1 #define pdt$v_pi_cq0 pdt$r_pi_work_overlay.pdt$r_pi_work_bits.pdt$v_pi_cq0 #define pdt$b_pi_work pdt$r_pi_work_overlay.pdt$b_pi_work #endif /* #if !defined(__VAXC) */ #define PDT$M_CUR_LBS 0x1 #define PDT$M_PRV_LBS 0x2 #define PDT$M_X_LBS 0x4 typedef struct _lbsts { __union { __struct { unsigned pdt$v_cur_lbs : 1; /* Current LB status */ unsigned pdt$v_prv_lbs : 1; /* Previous LB status */ unsigned pdt$v_x_lbs : 1; /* Previous LB crossed status */ unsigned pdt$v_fill_19_ : 5; } pdt$r_lbsts_bits; unsigned char pdt$b_lbsts; } pdt$r_lbsts_overlay; } LBSTS; #if !defined(__VAXC) #define pdt$v_cur_lbs pdt$r_lbsts_overlay.pdt$r_lbsts_bits.pdt$v_cur_lbs #define pdt$v_prv_lbs pdt$r_lbsts_overlay.pdt$r_lbsts_bits.pdt$v_prv_lbs #define pdt$v_x_lbs pdt$r_lbsts_overlay.pdt$r_lbsts_bits.pdt$v_x_lbs #define pdt$b_lbsts pdt$r_lbsts_overlay.pdt$b_lbsts #endif /* #if !defined(__VAXC) */ #define PDT$L_CRCTXWQFL 2352 /* CRCTX wait queue */ #define PDT$L_CRCTXWQBL 2356 /* */ #define PDT$L_CRCTX_WAITS 2360 /* count CRCTX waits */ #define PDT$C_CUNIN 0 /* Channel in UNINITIALIZED state */ #define PDT$C_CIC 1 /* Channel Initialization Completed/DISABLED state */ #define PDT$C_CEC 2 /* Channel Enable Completed/ENABLED state */ #define PDT$M_ONLINE 0x40000000 #define PDT$M_CHNL_CLNUP 0x80000000 #define PDT$C_TQE_IOTO_TIMEOUT 100000000 /* 10 sec t/o (100ns) */ #define PDT$C_TQE_INIT_TIMEOUT 10000 /* 1 msec t/o (100ns) */ #define PDT$C_PNLENGTH 3032 #define PDT$S_PNPDTDEF 3032 /* Old size name - synonym */ #ifdef __cplusplus /* Define structure prototypes */ struct _cram; struct _kpb; #endif /* #ifdef __cplusplus */ typedef struct _pnpdt { /* */ /* Skip the common and PA PDT to define NPORT-specific PDT fields */ /* */ unsigned char pdt$b_pdt_fill [2352]; /* multiplex one wait queue for either type0 Arrays or CRCTXs */ /* this is justified because map routines useing two resources are */ /* mutually exclusive. */ void *pdt$l_typ1waitqfl; /* Listhead for Fork Block waiting for TYP1 Arrays */ void *pdt$l_typ1waitqbl; /* */ void *pdt$l_freetyp1; /* Free Type 1 array list */ unsigned int pdt$l_dlck; /* Fork Lock */ unsigned __int64 pdt$q_ablk; /* Address of adpater block - virtual */ unsigned __int64 pdt$q_ablkp; /* Address of adpater block - physical */ unsigned __int64 pdt$q_crrr; /* Carriers used with channel queue header */ unsigned __int64 pdt$q_qbuf; /* Queue buffers used with channel queue header */ void *pdt$l_crrr_cacheqfl; /* Carriers Cache Queue */ void *pdt$l_crrr_cacheqbl; /* Carriers Cache Queue */ void *pdt$l_qbuf_cacheqfl; /* QBuffers Cache Queue */ void *pdt$l_qbuf_cacheqbl; /* QBuffers Cache Queue */ unsigned __int64 pdt$q_spare1; /* Spare quadword */ unsigned __int64 pdt$q_spare2; /* Spare quadword */ unsigned __int64 pdt$q_spare3; /* Spare quadword */ __union { /* Overlay FT & SPARE4 cells */ unsigned __int64 pdt$q_spare4; /* Spare quadword */ __struct { /* Overlay Faulty-Towers */ unsigned int pdt$l_rsrvd_for_ft_1; /* Reserved Test 1 */ unsigned int pdt$l_rsrvd_for_ft_2; /* Reserved Test 2 */ } pdt$r_spare4_ft_struct; } pdt$r_spare4_ft_overlay; unsigned int pdt$l_cntdis; /* RDCNT dispatch */ void *pdt$l_hshut_qbuf; /* Address of Host Shutdown QBUF */ void *pdt$l_setckt_qbuf; /* Address of SETCKT QBUF */ void *pdt$l_spare_qbuf; /* Address of spare QBUF */ unsigned int pdt$l_initialize; /* Initialize adapter */ unsigned int pdt$l_enable; /* Enable adapter */ unsigned int pdt$l_init_ablk; /* Init adapter block */ unsigned int pdt$l_ins_comqm; /* Notify port of non-empty CMDQ1 */ struct _cram *pdt$l_abbr; /* adapter block CRAM Address */ struct _cram *pdt$l_cq2; /* Command que 2 CRAM Address */ struct _cram *pdt$l_nre; /* emulation CRAM Address */ struct _cram *pdt$l_qir; /* QIR CRAM Address */ struct _cram *pdt$l_xber; /* XBER CRAM Address */ struct _cram *pdt$l_xdev; /* XDEV CRAM Address */ void *pdt$l_r_afar0; /* Read CRAM mailbox address - AFAR0 */ void *pdt$l_r_afar1; /* Read CRAM mailbox address - AFAR1 */ void *pdt$l_r_amcsr; /* Read CRAM mailbox address - AMCSR */ void *pdt$l_r_asr; /* Read CRAM mailbox address - ASR */ void *pdt$l_r_casr; /* Read CRAM mailbox address - CASR */ void *pdt$l_r_pesr; /* Read CRAM mailbox address - PESR */ void *pdt$l_r_pfar; /* Read CRAM mailbox address - PFAR */ void *pdt$l_r_spare; /* Read CRAM mailbox address - SPARE */ void *pdt$l_r_xbe; /* Read CRAM mailbox address - XBE */ void *pdt$l_r_xdev; /* Read CRAM mailbox address - XDEV */ void *pdt$l_r_xfadr; /* Read CRAM mailbox address - XFADR */ void *pdt$l_r_xfaer; /* Read CRAM mailbox address - XFAER */ void *pdt$l_r_xpd1; /* Read CRAM mailbox address - XPD1 */ void *pdt$l_w_abbr; /* Write CRAM mailbox address - ABBR */ void *pdt$l_w_acivr; /* Write CRAM mailbox address - ACIVR */ void *pdt$l_w_aidr; /* Write CRAM mailbox address - AIDR */ void *pdt$l_w_amcsr; /* Write CRAM mailbox address - AMCSR */ void *pdt$l_w_amivr; /* Write CRAM mailbox address - AMIVR */ void *pdt$l_w_amtcr; /* Write CRAM mailbox address - AMTCR */ void *pdt$l_w_casrcr; /* Write CRAM mailbox address - CASRCR */ void *pdt$l_w_compirr; /* Write CRAM mailbox address - COMPIRR */ void *pdt$l_w_cq0; /* Write CRAM mailbox address - CQ0 */ void *pdt$l_w_cq1; /* Write CRAM mailbox address - CQ1 */ void *pdt$l_w_cq2; /* Write CRAM mailbox address - CQ2 */ void *pdt$l_w_dfq; /* Write CRAM mailbox address - DFQ */ void *pdt$l_w_init; /* Write CRAM mailbox address - INIT */ void *pdt$l_w_cicr; /* Write CRAM mailbox address - CICR */ void *pdt$l_w_cecr; /* Write CRAM mailbox address - CECR */ void *pdt$l_w_mfq; /* Write CRAM mailbox address - MFQ */ void *pdt$l_w_nre; /* Write CRAM mailbox address - NRE */ void *pdt$l_w_qir; /* Write CRAM mailbox address - QIR */ void *pdt$l_w_xbe; /* Write CRAM mailbox address - XBE */ void *pdt$l_w_xpd1; /* Write CRAM mailbox address - XPD1 */ void *pdt$l_w_xpd2; /* Write CRAM mailbox address - XPD2 */ void *pdt$l_r_qcmdf; /* Fwd link of currently outstanding Cmd qbuffs */ void *pdt$l_r_qcmdb; /* Bkd link of currently outstanding Cmd qbuffs */ void *pdt$l_r_rspf; /* Fwd link of response qbuffs to be processed */ void *pdt$l_r_rspb; /* Bkd link of response qbuffs to be processed */ void *pdt$l_r_dafqf; /* Fwd link of free qbuffs in the Driver-Adapter Free Queue */ void *pdt$l_r_dafqb; /* Bkd link of free qbuffs in the Driver-Adapter Free Queue */ void *pdt$l_r_wcmdfl; /* DSSI command completion wait queue forward link */ void *pdt$l_r_wcmdbl; /* DSSI command completion wait queue backward link */ void *pdt$l_r_pcmdfl; /* Port command completion wait queue forward link */ void *pdt$l_r_pcmdbl; /* Port command completion wait queue backward link */ void *pdt$l_r_ab; /* Pointer to the shared Adapter Block *already defined, may use this one* */ struct _pdt *pdt$l_r_pdt; /* PDT address of the other channel */ void *pdt$ps_gcqir; /*Mailbox address of Channel's "greased" command queue insertion register */ unsigned int pdt$l_chanstate; /* Channel specific state transition code */ void *pdt$l_r_dccq2t; /* Driver-Adapter Command queue 2 tail pointer */ void *pdt$l_r_dccq1t; /* Driver-Adapter Command queue 1 tail pointer */ void *pdt$l_r_dccq0t; /* Driver-Adapter Command queue 0 tail pointer */ void *pdt$l_r_cntrs; /* Pointer to the port counter block area */ /* in the Adapter Block free memory space */ unsigned int pdt$il_initmr; /* Port initialization timeout value */ unsigned int pdt$il_enabtmr; /* Port re-enable timeout value */ struct _kpb *pdt$l_r_kpb; /* Adapter-wide Kernel Process Block address */ char pdt$b_align_busreset_fkblk [4]; /* QUADWORD ALIGN */ char pdt$ib_busreset_fkblk [32]; /* Fork block used for getting KPB for BUS RESET */ struct _kpb *pdt$l_r_busreset_kpb; /* KPB used for SCSI BUS RESET operation which */ /* is triggered by the port driver */ struct _kpb *pdt$l_r_chnl_kpb; /* KPB used for cleaning up resources and re-enabling */ /* a channel */ char pdt$ib_chnl_fkblk [32]; /* Fork block used for getting KPB for re-enabling */ char pdt$ib_chnl_int_fkblk [32]; /* Fork block used for channel specific error */ unsigned int pdt$il_chnl_int_fklck; /* CHNL_INT fork block lock field */ unsigned int pdt$il_channel; /* Channel number (0 or 1) of this port */ struct _cram *pdt$l_r_port_cram; __union { unsigned int pdt$l_sts; /* port device status */ __struct { unsigned pdt$v_filler : 30; unsigned pdt$v_online : 1; /* ONLINE bit is used when we are cleaning */ /* up the adapter buffers after powerfail/crash */ unsigned pdt$v_chnl_clnup : 1; /* This bit is used when we are cleaning up the */ /* channel resources after the BUS RESET */ } pdt$r_fill_21_; } pdt$r_fill_20_; char pdt$b_dipl [1]; char pdt$b_fill_1 [3]; char pdt$b_align4 [4]; /* QUADWORD ALIGN */ char pdt$b_tqe_ioto [64]; /* TQE for I/O timeout */ char pdt$b_tqe_init [64]; /* TQE for init forks */ unsigned int pdt$l_known_nodes; /* Map of known nodes */ unsigned int pdt$l_pb_map; /* Map of nodes to track failed VCs */ unsigned __int64 pdt$q_dma_base; /* DDMA window base BA */ unsigned __int64 pdt$q_ddma_base_pa; /* PA DDMA window base maps to */ unsigned __int64 pdt$q_monster_win_base; /* MONSTER_WINDOW base BA */ unsigned __int64 pdt$q_dma_size; /* DDMA window size in bytes */ unsigned __int64 pdt$q_mem_size; /* system memory size in bytes */ } PNPDT; #if !defined(__VAXC) #define pdt$q_spare4 pdt$r_spare4_ft_overlay.pdt$q_spare4 #define pdt$l_rsrvd_for_ft_1 pdt$r_spare4_ft_overlay.pdt$r_spare4_ft_struct.pdt$l_rsrvd_for_ft_1 #define pdt$l_rsrvd_for_ft_2 pdt$r_spare4_ft_overlay.pdt$r_spare4_ft_struct.pdt$l_rsrvd_for_ft_2 #define pdt$l_sts pdt$r_fill_20_.pdt$l_sts #define pdt$v_online pdt$r_fill_20_.pdt$r_fill_21_.pdt$v_online #define pdt$v_chnl_clnup pdt$r_fill_20_.pdt$r_fill_21_.pdt$v_chnl_clnup #endif /* #if !defined(__VAXC) */ #define PDT$L_ARG 3080 /* scratch LW/QW */ #define PDT$L_CFG_VENDOR_ID 3120 #define PDT$L_CFG_COMMAND 3124 #define PDT$L_CFG_REVISION_ID 3128 #define PDT$L_CFG_CACHE_LINE_SIZE 3132 #define PDT$R_CIPCA_CTRS 3384 #define PDT$S_CIPCA_CTRS 80 #define PDT$C_CIPCA_CTRS_MAX 20 #define PDT$C_PCLENGTH 3464 #define PDT$S_PCPDTDEF 3464 /* Old size name - synonym */ #ifdef __cplusplus /* Define structure prototypes */ struct _crab; #endif /* #ifdef __cplusplus */ typedef struct _pcpdt { /* */ /* Skip the common, PA and PN PDT to define PCI-specific PDT fields */ /* */ unsigned char pdt$b_pdt_fill [3032]; unsigned int pdt$l_numresets; /* count resets */ struct _crab *pdt$l_crab; /* pointer to PCI CRAB */ unsigned int pdt$l_dlink; /* datalink ID info (fr. ABLK) */ unsigned int pdt$l_rspq_sequence; /* dbg: sequence check rspq */ unsigned int pdt$l_map_waits; /* count of map register waits */ char pdt$b_align0 [4]; /* QUADWORD ALIGN */ void *pdt$l_crctxfqfl; /* Listhead for free CRCTXs */ void *pdt$l_crctxfqbl; /* (dbl-linked-list for dbg) */ /* multiplex the Typ1 (Typ0 Array) wait queue rather than create 2nd wait Q */ /* CRCTXWQFL,BL,WAITS defined above (in PN PDT extension) */ unsigned int pdt$l_crctx_reserve; /* no. CRCTXs currently in FQ */ unsigned int pdt$l_crctx_reslim; /* max length of CRCTXFQ */ unsigned int pdt$l_crctx_count; /* no. currently in use */ unsigned int pdt$l_crctx_high; /* highwater mark for RESERVE */ /* rpn: assume 8KB pages */ /* NPPG_OFFSET_MASK longword unsigned ; /* NPort Page offset in Phys pg */ unsigned __int64 pdt$q_arg; /* for CALL ret'd values */ unsigned __int64 pdt$q_missed_ints; /* count of 'missed' interrupts */ unsigned int pdt$l_iohandle_br0; /* IO Handle for Base Reg 0 */ unsigned int pdt$l_iohandle_br1; /* IO Handle for Base Reg 1 */ unsigned int pdt$l_iohandle_br2; /* IO Handle for Base Reg 2 */ unsigned int pdt$l_iohandle_br3; /* IO Handle for Base Reg 3 */ unsigned int pdt$l_iohandle_br4; /* IO Handle for Base Reg 4 */ unsigned int pdt$l_iohandle_br5; /* IO Handle for Base Reg 5 */ /* PCI Register Copies for staging register I/O */ /* Configuration Space Registers (Ref: NPort Spec) */ unsigned short int pdt$w_cfg_vendor_id; unsigned short int pdt$w_cfg_device_id; unsigned short int pdt$w_cfg_command; unsigned short int pdt$w_cfg_status; unsigned char pdt$b_cfg_revision_id; unsigned char pdt$b_cfg_programming_if; unsigned char pdt$b_cfg_sub_class; unsigned char pdt$b_cfg_base_class; unsigned char pdt$b_cfg_cache_line_size; unsigned char pdt$b_cfg_latency_timer; unsigned char pdt$b_cfg_header_type; unsigned char pdt$b_cfg_bist; unsigned int pdt$l_cfg_base_address_0; unsigned int pdt$l_cfg_base_address_0h; unsigned int pdt$l_cfg_base_address_1; unsigned int pdt$l_cfg_base_address_1h; unsigned int pdt$l_cfg_base_address_2; unsigned int pdt$l_cfg_base_address_2h; unsigned int pdt$l_cfg_base_address_3; unsigned int pdt$l_cfg_base_address_3h; unsigned int pdt$l_cfg_base_address_4; unsigned int pdt$l_cfg_base_address_4h; unsigned int pdt$l_cfg_base_address_5; unsigned int pdt$l_cfg_base_address_5h; unsigned int pdt$l_mio_adprst; /* Adapter Reset */ unsigned int pdt$l_mio_adprst2; /* */ unsigned int pdt$l_mio_clrinta; /* Clear Interrupt A */ unsigned int pdt$l_mio_clrinta2; /* */ unsigned int pdt$l_mio_clrintb; /* Clear Interrupt B */ unsigned int pdt$l_mio_clrintb2; /* */ unsigned int pdt$l_mio_aitcr; /* Interrupt Holdoff */ unsigned int pdt$l_mio_aitcr2; /* */ unsigned int pdt$l_mio_nodests; /* Node Status */ unsigned int pdt$l_mio_nodests2; /* */ unsigned int pdt$l_mio_intena; /* Interrupt Enable */ unsigned int pdt$l_mio_intena2; /* */ __union { /* Overlay 32 and 64 bit fields */ unsigned __int64 pdt$q_mio_abbr; /* 64 bit Adapter Block Base Register */ __struct { unsigned int pdt$l_mio_abbr; /* Adapter Block Base Register */ unsigned int pdt$l_mio_abbr2; } pdt$r_abbr_struct; } pdt$r_mio_abbr_overlay; __union { unsigned __int64 pdt$q_mio_ccq2ir; /* 64 bit Chan Cmd Q 2 Insertion */ __struct { unsigned int pdt$l_mio_ccq2ir; /* Chan Cmd Queue 2 Insertion */ unsigned int pdt$l_mio_ccq2ir2; /* */ } pdt$r_ccq2ir_struct; } pdt$r_mio_ccq2ir_overlay; __union { unsigned __int64 pdt$q_mio_ccq1ir; /* 64 bit Chan Cmd Q 1 Insertion */ __struct { unsigned int pdt$l_mio_ccq1ir; /* Chan Cmd Queue 1 Insertion */ unsigned int pdt$l_mio_ccq1ir2; /* */ } pdt$r_ccq1ir_struct; } pdt$r_mio_ccq1ir_overlay; __union { unsigned __int64 pdt$q_mio_ccq0ir; /* 64 bit Chan Cmd Q 0 Insertion */ __struct { unsigned int pdt$l_mio_ccq0ir; /* Chan Cmd Queue 0 Insertion */ unsigned int pdt$l_mio_ccq0ir2; /* */ } pdt$r_ccq0ir_struct; } pdt$r_mio_ccq0ir_overlay; __union { unsigned __int64 pdt$q_mio_adfqir; /* 64 bit D.gram Fr. Q Insertion */ __struct { unsigned int pdt$l_mio_adfqir; /* Adap D.gram Fr.Queue Insertion */ unsigned int pdt$l_mio_adfqir2; /* */ } pdt$r_adfqir_struct; } pdt$r_mio_adfqir_overlay; __union { unsigned __int64 pdt$q_mio_amfqir; /* 64 bit Message Fr. Q Insertion */ __struct { unsigned int pdt$l_mio_amfqir; /* Adap Message Fr.Queue Insertion */ unsigned int pdt$l_mio_amfqir2; /* */ } pdt$r_amfqir_struct; } pdt$r_mio_amfqir_overlay; unsigned int pdt$l_mio_casr; /* Chan/Adap Status (low LW) */ unsigned int pdt$l_mio_casr2; /* */ __union { unsigned __int64 pdt$q_mio_cafar; /* 64 bit Chan/Adap Failing Address */ __struct { unsigned int pdt$l_mio_cafar; /* Chan/Adap Failing Address */ unsigned int pdt$l_mio_cafar2; /* */ } pdt$r_cafar_struct; } pdt$r_mio_cafar_overlay; unsigned int pdt$l_mio_casrcr; /* Channel/Adapter Status Release Ctrl */ unsigned int pdt$l_mio_casrcr2; /* */ unsigned int pdt$l_mio_cicr; /* Channel Initialize Control */ unsigned int pdt$l_mio_cicr2; /* */ unsigned int pdt$l_mio_cecr; /* Channel Enable Control */ unsigned int pdt$l_mio_cecr2; /* */ unsigned int pdt$l_mio_amtcr; /* Adapter Maintenance/Sanity Timer Ctrl */ unsigned int pdt$l_mio_amtcr2; /* */ unsigned int pdt$l_mio_amtecr; /* Adapter Maintenance/Sanity Timer Expr */ unsigned int pdt$l_mio_amtecr2; /* */ unsigned int pdt$l_mio_amcsr; /* Adapter Maintenance Control & Status */ unsigned int pdt$l_mio_amcsr2; /* */ unsigned int pdt$l_mio_accx; /* Abnormal Condition Code eXtension */ unsigned int pdt$l_mio_accx2; /* */ unsigned int pdt$l_mio_mrev; /* Microcode Revision */ unsigned int pdt$l_mio_mrev2; /* */ unsigned int pdt$l_mio_musr; /* Microcode Update Status */ unsigned int pdt$l_mio_musr2; /* */ unsigned int pdt$l_mio_mucr; /* Microcode Update Control & Addr */ unsigned int pdt$l_mio_mucr2; /* */ unsigned int pdt$l_mio_altintena; /* Alternate Interrupt Enable */ unsigned int pdt$l_mio_altintena2; /* */ /* CIPCA port-dependent counters */ unsigned int pdt$l_p0_rxcrc; /* Receive packet CRC error */ unsigned int pdt$l_p1_rxcrc; /* Receive packet CRC error */ unsigned int pdt$l_p0_rxdstmismatch; /* DEST matched but DESTC did not */ unsigned int pdt$l_p1_rxdstmismatch; /* DEST matched but DESTC did not */ unsigned int pdt$l_p0_rxbuffull; /* Fifo went full during receive */ unsigned int pdt$l_p1_rxbuffull; /* Fifo went full during receive */ unsigned int pdt$l_p0_rxdattrunc; /* RX pkt length greater than DMA count */ unsigned int pdt$l_p1_rxdattrunc; /* RX pkt length greater than DMA count */ unsigned int pdt$l_p0_idreqnorsp; /* NORSP cnt from IDREQs to closed VC's */ unsigned int pdt$l_p1_idreqnorsp; /* NORSP cnt from IDREQs to closed VC's */ unsigned int pdt$l_p0_total_rx_pkts; /* Total Received Packets Path A */ unsigned int pdt$l_p1_total_rx_pkts; /* Total Received Packets Path B */ unsigned int pdt$l_p0_impl_ctr_rsv1; /* reserved */ unsigned int pdt$l_p1_impl_ctr_rsv1; /* reserved */ unsigned int pdt$l_p0_impl_ctr_rsv2; /* reserved */ unsigned int pdt$l_p1_impl_ctr_rsv2; /* reserved */ unsigned int pdt$l_p0_impl_ctr_rsv3; /* reserved */ unsigned int pdt$l_p1_impl_ctr_rsv3; /* reserved */ unsigned int pdt$l_p0_impl_ctr_rsv4; /* reserved */ unsigned int pdt$l_p1_impl_ctr_rsv4; /* reserved */ } PCPDT; #if !defined(__VAXC) #define pdt$q_mio_abbr pdt$r_mio_abbr_overlay.pdt$q_mio_abbr #define pdt$l_mio_abbr pdt$r_mio_abbr_overlay.pdt$r_abbr_struct.pdt$l_mio_abbr #define pdt$l_mio_abbr2 pdt$r_mio_abbr_overlay.pdt$r_abbr_struct.pdt$l_mio_abbr2 #define pdt$q_mio_ccq2ir pdt$r_mio_ccq2ir_overlay.pdt$q_mio_ccq2ir #define pdt$l_mio_ccq2ir pdt$r_mio_ccq2ir_overlay.pdt$r_ccq2ir_struct.pdt$l_mio_ccq2ir #define pdt$l_mio_ccq2ir2 pdt$r_mio_ccq2ir_overlay.pdt$r_ccq2ir_struct.pdt$l_mio_ccq2ir2 #define pdt$q_mio_ccq1ir pdt$r_mio_ccq1ir_overlay.pdt$q_mio_ccq1ir #define pdt$l_mio_ccq1ir pdt$r_mio_ccq1ir_overlay.pdt$r_ccq1ir_struct.pdt$l_mio_ccq1ir #define pdt$l_mio_ccq1ir2 pdt$r_mio_ccq1ir_overlay.pdt$r_ccq1ir_struct.pdt$l_mio_ccq1ir2 #define pdt$q_mio_ccq0ir pdt$r_mio_ccq0ir_overlay.pdt$q_mio_ccq0ir #define pdt$l_mio_ccq0ir pdt$r_mio_ccq0ir_overlay.pdt$r_ccq0ir_struct.pdt$l_mio_ccq0ir #define pdt$l_mio_ccq0ir2 pdt$r_mio_ccq0ir_overlay.pdt$r_ccq0ir_struct.pdt$l_mio_ccq0ir2 #define pdt$q_mio_adfqir pdt$r_mio_adfqir_overlay.pdt$q_mio_adfqir #define pdt$l_mio_adfqir pdt$r_mio_adfqir_overlay.pdt$r_adfqir_struct.pdt$l_mio_adfqir #define pdt$l_mio_adfqir2 pdt$r_mio_adfqir_overlay.pdt$r_adfqir_struct.pdt$l_mio_adfqir2 #define pdt$q_mio_amfqir pdt$r_mio_amfqir_overlay.pdt$q_mio_amfqir #define pdt$l_mio_amfqir pdt$r_mio_amfqir_overlay.pdt$r_amfqir_struct.pdt$l_mio_amfqir #define pdt$l_mio_amfqir2 pdt$r_mio_amfqir_overlay.pdt$r_amfqir_struct.pdt$l_mio_amfqir2 #define pdt$q_mio_cafar pdt$r_mio_cafar_overlay.pdt$q_mio_cafar #define pdt$l_mio_cafar pdt$r_mio_cafar_overlay.pdt$r_cafar_struct.pdt$l_mio_cafar #define pdt$l_mio_cafar2 pdt$r_mio_cafar_overlay.pdt$r_cafar_struct.pdt$l_mio_cafar2 #endif /* #if !defined(__VAXC) */ #define PDT$M_WORKQ_BUSY 0x1 typedef struct _pbpdt { unsigned char pdt$b_pdt_fill [2488]; __union { unsigned __int64 pdt$q_pb_comql; __struct { void *pdt$l_pb_comql_flink; void *pdt$l_pb_comql_blink; } pdt$r_fill_pb_11; } pdt$r_fill_pb_10; __union { unsigned __int64 pdt$q_pb_comqh; __struct { void *pdt$l_pb_comqh_flink; void *pdt$l_pb_comqh_blink; } pdt$r_fill_pb_9; } pdt$r_fill_pb_8; unsigned int pdt$v_pb_comqh; unsigned int pdt$v_pb_comql; unsigned int pdt$v_pb_online; unsigned int pdt$v_pb_stall; unsigned int pdt$l_pb_stall_counter; unsigned int pdt$l_pb_cumulative_stall_ctr; unsigned int pdt$l_pb_was_online; unsigned int pdt$l_pb_blk_data_xfer_size; unsigned int pdt$l_pb_max_msg_size; unsigned __int64 pdt$q_adapter_version; int pdt$l_outbufs; unsigned int pdt$l_crash; unsigned int pdt$l_attempts; unsigned int pdt$l_sendcopy; unsigned int pdt$l_sendnocopy; unsigned int pdt$l_fud; unsigned int pdt$l_fud1; unsigned int pdt$l_fud2; unsigned int pdt$l_fud3; unsigned int pdt$l_ppd_bdxfer_maxlen; /* ppd block data transfer max. len */ unsigned __int64 pdt$q_pfn_bdxfer_maxlen; /* pfn block data transfer max. len. */ unsigned __int64 pdt$q_bdxfer_maxlen; /* pfn block data transfer max. len. */ unsigned int pdt$l_poller_tqe; /* poller tqe */ /* If you add a bit, please update the bit symbols just bellow */ __union { __struct { unsigned pdt$v_workq_busy : 1; /* work queue fork block busy bit */ unsigned pdt$v_fill_22_ : 7; } pdt$r_fkb_bits; unsigned int pdt$l_pb_flags; /* flag longword */ } pdt$r_fkb_bitfield; unsigned char pdt$b_wq_fkb [48]; /* work queue fork block */ unsigned int pdt$l_workq [2]; /* local end work queue pointer */ unsigned int pdt$l_maxpfnpkt; /* max number of pfn packets */ __union { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *pdt$pq_pktsva; /* pfn pass buffer */ #else unsigned __int64 pdt$pq_pktsva; #endif #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif void *pdt$pl_pktsva; /* pfn pass buffer */ } pdt$r_pkt_va; #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *pdt$pq_pktpte; /* pfn pte address */ #else unsigned __int64 pdt$pq_pktpte; #endif } PBPDT; #if !defined(__VAXC) #define pdt$q_pb_comql pdt$r_fill_pb_10.pdt$q_pb_comql #define pdt$r_fill_pb_11 pdt$r_fill_pb_10.pdt$r_fill_pb_11 #define pdt$l_pb_comql_flink pdt$r_fill_pb_11.pdt$l_pb_comql_flink #define pdt$l_pb_comql_blink pdt$r_fill_pb_11.pdt$l_pb_comql_blink #define pdt$q_pb_comqh pdt$r_fill_pb_8.pdt$q_pb_comqh #define pdt$r_fill_pb_9 pdt$r_fill_pb_8.pdt$r_fill_pb_9 #define pdt$l_pb_comqh_flink pdt$r_fill_pb_9.pdt$l_pb_comqh_flink #define pdt$l_pb_comqh_blink pdt$r_fill_pb_9.pdt$l_pb_comqh_blink #define pdt$v_workq_busy pdt$r_fkb_bitfield.pdt$r_fkb_bits.pdt$v_workq_busy #define pdt$l_pb_flags pdt$r_fkb_bitfield.pdt$l_pb_flags #define pdt$pq_pktsva pdt$r_pkt_va.pdt$pq_pktsva #define pdt$pl_pktsva pdt$r_pkt_va.pdt$pl_pktsva #endif /* #if !defined(__VAXC) */ /* */ /* PORT Structure */ /* -------------- */ /* */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __PDTDEF_LOADED */