/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:25:54 by OpenVMS SDL EV3-3 */ /* Source: 12-MAY-1993 17:06:29 $1$DGA7274:[LIB_H.SRC]MPMDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $MPMDEF ***/ #ifndef __MPMDEF_LOADED #define __MPMDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* MULTIPORT MEMORY (MA780/MA750) ADAPTER REGISTER OFFSET DEFINITIONS */ /*- */ /* */ /* The UETP for the MA780 depends on some of the following definitions. Please */ /* let someone in that group know if the definitions change substantially. */ /* */ #define MPM$C_PORTS 4 /*MAXIMUM NUMBER OF PORTS PER MEMORY */ #define MPM$M_CSR_PORT 0x3 #define MPM$M_CSR_ADCOD 0xFF #define MPM$M_CSR_PU 0x400000 #define MPM$M_CSR_PD 0x800000 #define MPM$M_CSR_XMFLT 0x4000000 #define MPM$M_CSR_MT 0x8000000 #define MPM$M_CSR_IS 0x10000000 #define MPM$M_CSR_WS 0x40000000 #define MPM$M_CSR_PE 0x80000000 #define MPM$C_CSR_TYPE 64 /* MULTIPORT ADAPTER TYPE CODE */ #define MPM$M_CR_MIE 0x1 #define MPM$M_CR_EIE 0x2 #define MPM$M_CR_ERRS 0xFF000000 #define MPM$M_SR_EIE 0x2 #define MPM$M_SR_SS 0x2000 #define MPM$M_SR_IDL 0x4000 #define MPM$M_SR_IT 0x8000 #define MPM$M_SR_AGP 0x10000000 #define MPM$M_SR_XDF 0x20000000 #define MPM$M_SR_MXF 0x40000000 #define MPM$M_SR_ACA 0x80000000 #define MPM$M_INV_ID 0xFFFF #define MPM$M_INV_MEMSZ 0x70000 #define MPM$M_INV_STADR 0x7FF00000 #define MPM$M_INV_CACHF 0x80000000 #define MPM$M_ERR_ELR 0x10000000 #define MPM$M_ERR_HI 0x20000000 #define MPM$M_ERR_ICRD 0x40000000 #define MPM$M_ERR_IMP 0x80000000 #define MPM$M_CSR1_MIA 0x400 #define MPM$S_MPMDEF 40 /* Old size name - synonym */ typedef struct _mpm { __union { unsigned int mpm$l_csr; /*CONFIGURATION STATUS REGISTER */ __struct { unsigned mpm$v_csr_port : 2; /* PORT NUMBER */ unsigned mpm$v_fill_0_ : 6; } mpm$r_csr_bits0; __struct { unsigned mpm$v_csr_adcod : 8; /* ADAPTER CODE FIELD */ unsigned mpmdef$$_fill_1 : 14; /* RESERVED BITS */ unsigned mpm$v_csr_pu : 1; /* ADAPTER POWER UP */ unsigned mpm$v_csr_pd : 1; /* ADAPTER POWER DOWN */ unsigned mpmdef$$_fill_2 : 2; /* RESERVED BITS */ unsigned mpm$v_csr_xmflt : 1; /* TRANSMITTER FAULT */ unsigned mpm$v_csr_mt : 1; /* MULTIPLE TRANSMITTERS */ unsigned mpm$v_csr_is : 1; /* INTERLOCK SEQUENCE */ unsigned mpmdef$$_fill_3 : 1; /* RESERVED BIT */ unsigned mpm$v_csr_ws : 1; /* WRITE SEQUENCE DATA */ unsigned mpm$v_csr_pe : 1; /* SBI PARITY ERROR */ } mpm$r_csr_bits1; } mpm$r_csr_overlay; __union { unsigned int mpm$l_cr; /*CONTROL REGISTER */ __struct { unsigned mpm$v_cr_mie : 1; /* MASTER INTERRUPT ENABLE */ unsigned mpm$v_cr_eie : 1; /* ERROR INTERRUPT ENABLE */ unsigned mpmdef$$_fill_4 : 22; /* */ unsigned mpm$v_cr_errs : 8; /* PORT INTERFACE ERRORS */ } mpm$r_cr_bits; } mpm$r_cr_overlay; __union { unsigned int mpm$l_sr; /*STATUS REGISTER */ __struct { unsigned mpmdef$$_fill_5 : 1; /* (UNUSED) */ unsigned mpm$v_sr_eie : 1; /* ERROR INTERRUPT ENABLE */ unsigned mpmdef$$_fill_6 : 11; /* */ unsigned mpm$v_sr_ss : 1; /* SINGLE STEP */ unsigned mpm$v_sr_idl : 1; /* INVALIDATE DATA LOST IN MPC */ unsigned mpm$v_sr_it : 1; /* INTERLOCK TIMEOUT */ unsigned mpmdef$$_fill_7 : 12; /* */ unsigned mpm$v_sr_agp : 1; /* ADMI GRANT PARITY ERROR */ unsigned mpm$v_sr_xdf : 1; /* XMIT DURING FAULT */ unsigned mpm$v_sr_mxf : 1; /* MULTIPLE XMITTER FAULT */ unsigned mpm$v_sr_aca : 1; /* ADMI COMMAND ABORT */ } mpm$r_sr_bits; } mpm$r_sr_overlay; __union { unsigned int mpm$l_inv; /*INVALIDATION CONTROL REGISTER */ __struct { unsigned mpm$v_inv_id : 16; /* CACHED DEVICE NEXUS ID'S */ unsigned mpm$v_inv_memsz : 3; /* MEMORY SIZE (256KB BOARDS) */ unsigned mpmdef$$_fill_8 : 1; /* (UNUSED) */ unsigned mpm$v_inv_stadr : 11; /* STARTING SBI ADDR OF MEMORY */ unsigned mpm$v_inv_cachf : 1; /* CACHED FORCE (IGNORE ID'S) */ } mpm$r_inv_bits; } mpm$r_inv_overlay; __union { unsigned int mpm$l_err; /*ARRAY ERROR REGISTER */ __struct { unsigned mpmdef$$_fill_9 : 28; /* */ unsigned mpm$v_err_elr : 1; /* ERROR LOG REQUEST */ unsigned mpm$v_err_hi : 1; /* HIGH ERROR RATE */ unsigned mpm$v_err_icrd : 1; /* INHIBIT CRD ERRORS */ unsigned mpm$v_err_imp : 1; /* INVALIDATE MAP PARITY ERROR */ } mpm$r_err_bits; } mpm$r_err_overlay; __union { unsigned int mpm$l_csr0; /*CONFIGURATION STATUS REGISTER 0 */ __struct { unsigned mpmdef$$_fill_10 : 4; /* */ unsigned mpm$v_csr0_pow : 4; /* PER PORT POWER STATUS */ unsigned mpm$v_csr0_err : 4; /* PER PORT ERROR STATUS */ unsigned mpm$v_csr0_onl : 4; /* PER PORT ONLINE STATUS */ } mpm$r_csr0_bits; } mpm$r_csr0_overlay; __union { unsigned int mpm$l_csr1; /*CONFIGURATION STATUS REGISTER 1 */ __struct { unsigned mpmdef$$_fill_11 : 10; /* */ unsigned mpm$v_csr1_mia : 1; /* MULTIPLE INTERLOCK ACCEPTED */ unsigned mpm$v_fill_1_ : 5; } mpm$r_csr1_bits; } mpm$r_csr1_overlay; __union { unsigned int mpm$l_mr; /*MAINTENANCE REGISTER */ __struct { unsigned mpmdef$$_fill_12 : 14; /* (ERROR BITS) */ unsigned mpm$v_mr_unit : 2; /* MEMORY UNIT NUMBER */ } mpm$r_mr_bits; } mpm$r_mr_overlay; __union { unsigned int mpm$l_iir; /*INTERPORT INTERRUPT REQUEST REGISTER */ __struct { unsigned mpm$v_iir_sts : 16; /* STATUS BITS (WRITE TO CLEAR) */ unsigned mpm$v_iir_ctl : 16; /* CONTROL BITS (WRITE TO SET STATUS BITS) */ } mpm$r_iir_bits; } mpm$r_iir_overlay; __union { unsigned int mpm$l_iie; /*INTERPORT INTERRUPT ENABLE REGISTER */ __struct { unsigned mpm$v_iie_sts : 16; /* CONTROL BITS (WRITE TO CLEAR) */ unsigned mpm$v_iie_ctl : 16; /* STATUS BITS (WRITE TO SET STATUS BITS) */ } mpm$r_iie_bits; } mpm$r_iie_overlay; } MPM; #if !defined(__VAXC) #define mpm$l_csr mpm$r_csr_overlay.mpm$l_csr #define mpm$v_csr_port mpm$r_csr_overlay.mpm$r_csr_bits0.mpm$v_csr_port #define mpm$v_csr_adcod mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_adcod #define mpm$v_csr_pu mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_pu #define mpm$v_csr_pd mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_pd #define mpm$v_csr_xmflt mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_xmflt #define mpm$v_csr_mt mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_mt #define mpm$v_csr_is mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_is #define mpm$v_csr_ws mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_ws #define mpm$v_csr_pe mpm$r_csr_overlay.mpm$r_csr_bits1.mpm$v_csr_pe #define mpm$l_cr mpm$r_cr_overlay.mpm$l_cr #define mpm$v_cr_mie mpm$r_cr_overlay.mpm$r_cr_bits.mpm$v_cr_mie #define mpm$v_cr_eie mpm$r_cr_overlay.mpm$r_cr_bits.mpm$v_cr_eie #define mpm$v_cr_errs mpm$r_cr_overlay.mpm$r_cr_bits.mpm$v_cr_errs #define mpm$l_sr mpm$r_sr_overlay.mpm$l_sr #define mpm$v_sr_eie mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_eie #define mpm$v_sr_ss mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_ss #define mpm$v_sr_idl mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_idl #define mpm$v_sr_it mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_it #define mpm$v_sr_agp mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_agp #define mpm$v_sr_xdf mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_xdf #define mpm$v_sr_mxf mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_mxf #define mpm$v_sr_aca mpm$r_sr_overlay.mpm$r_sr_bits.mpm$v_sr_aca #define mpm$l_inv mpm$r_inv_overlay.mpm$l_inv #define mpm$v_inv_id mpm$r_inv_overlay.mpm$r_inv_bits.mpm$v_inv_id #define mpm$v_inv_memsz mpm$r_inv_overlay.mpm$r_inv_bits.mpm$v_inv_memsz #define mpm$v_inv_stadr mpm$r_inv_overlay.mpm$r_inv_bits.mpm$v_inv_stadr #define mpm$v_inv_cachf mpm$r_inv_overlay.mpm$r_inv_bits.mpm$v_inv_cachf #define mpm$l_err mpm$r_err_overlay.mpm$l_err #define mpm$v_err_elr mpm$r_err_overlay.mpm$r_err_bits.mpm$v_err_elr #define mpm$v_err_hi mpm$r_err_overlay.mpm$r_err_bits.mpm$v_err_hi #define mpm$v_err_icrd mpm$r_err_overlay.mpm$r_err_bits.mpm$v_err_icrd #define mpm$v_err_imp mpm$r_err_overlay.mpm$r_err_bits.mpm$v_err_imp #define mpm$l_csr0 mpm$r_csr0_overlay.mpm$l_csr0 #define mpm$v_csr0_pow mpm$r_csr0_overlay.mpm$r_csr0_bits.mpm$v_csr0_pow #define mpm$v_csr0_err mpm$r_csr0_overlay.mpm$r_csr0_bits.mpm$v_csr0_err #define mpm$v_csr0_onl mpm$r_csr0_overlay.mpm$r_csr0_bits.mpm$v_csr0_onl #define mpm$l_csr1 mpm$r_csr1_overlay.mpm$l_csr1 #define mpm$v_csr1_mia mpm$r_csr1_overlay.mpm$r_csr1_bits.mpm$v_csr1_mia #define mpm$l_mr mpm$r_mr_overlay.mpm$l_mr #define mpm$v_mr_unit mpm$r_mr_overlay.mpm$r_mr_bits.mpm$v_mr_unit #define mpm$l_iir mpm$r_iir_overlay.mpm$l_iir #define mpm$v_iir_sts mpm$r_iir_overlay.mpm$r_iir_bits.mpm$v_iir_sts #define mpm$v_iir_ctl mpm$r_iir_overlay.mpm$r_iir_bits.mpm$v_iir_ctl #define mpm$l_iie mpm$r_iie_overlay.mpm$l_iie #define mpm$v_iie_sts mpm$r_iie_overlay.mpm$r_iie_bits.mpm$v_iie_sts #define mpm$v_iie_ctl mpm$r_iie_overlay.mpm$r_iie_bits.mpm$v_iie_ctl #endif /* #if !defined(__VAXC) */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __MPMDEF_LOADED */