/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:27:08 by OpenVMS SDL EV3-3 */ /* Source: 11-MAY-1993 14:33:46 $1$DGA7274:[LIB_H.SRC]KDZDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $KDZDEF ***/ #ifndef __KDZDEF_LOADED #define __KDZDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* KDZ11 Offset Definitions for Registers Accessible Through BI Node Private */ /* Space. Note that in making these registers available in virtual space, */ /* we have only mapped real registers. Therefore these virtual offsets are */ /* different than the hardware physical offsets. */ /*- */ #define KDZ$M_PCNTL_RSTRT 0x1 #define KDZ$M_PCNTL_PHYLOG 0x2 #define KDZ$M_PCNTL_SECENB 0x4 #define KDZ$M_PCNTL_STINIT 0x8 #define KDZ$M_PCNTL_STFAST 0x10 #define KDZ$M_PCNTL_ENBAPT 0x20 #define KDZ$M_PCNTL_STPASS 0x40 #define KDZ$M_PCNTL_RUN 0x80 #define KDZ$M_PCNTL_CLREVL 0x200 #define KDZ$M_PCNTL_WRMEM 0x400 #define KDZ$M_PCNTL_EV4 0x800 #define KDZ$M_PCNTL_EV3 0x1000 #define KDZ$M_PCNTL_EV2 0x2000 #define KDZ$M_PCNTL_EV1 0x4000 #define KDZ$M_PCNTL_EV0 0x8000 #define KDZ$M_PCNTL_WWPO 0x10000 #define KDZ$M_PCNTL_NIDIS 0x80000 #define KDZ$M_PCNTL_CNSLIE 0x100000 #define KDZ$M_PCNTL_CNSLCL 0x200000 #define KDZ$M_PCNTL_CNSLIN 0x400000 #define KDZ$M_PCNTL_WWPE 0x800000 #define KDZ$M_PCNTL_RXDONE 0x1000000 #define KDZ$M_PCNTL_RXSTAT 0x2000000 #define KDZ$M_PCNTL_CLRIPI 0x4000000 #define KDZ$M_PCNTL_IPINTR 0x8000000 #define KDZ$M_PCNTL_CRDIE 0x10000000 #define KDZ$M_PCNTL_CLRCRD 0x20000000 #define KDZ$M_PCNTL_CRDINT 0x40000000 #define KDZ$S_KDZDEF 44032 /* Old size name - synonym */ typedef struct _kdz { /* */ /* BIIC registers - here we reserve space for the 256 bytes that these */ /* registers occupy and we also fill out the virtual page to */ /* 512 bytes so that other items appear on page boundaries. */ /* Being able to address the BIIC via these virtual addresses */ /* allows a Scorpio CPU to determine its own node number. */ /* That is, a reference here is via node private space and */ /* always addresses a nodes own registers via a loop back */ /* request. */ /* */ unsigned char kdz$b_biicbase; /*BIIC register Base */ char kdzdef$$_fill_1 [511]; /* Fill out to page. */ /* */ /* Port Control CSR register */ /* */ __union { unsigned int kdz$l_pcntl; /*Port Control CSR Register */ __struct { /* Port Controller CSR */ unsigned kdz$v_pcntl_rstrt : 1; /* (RO) Front Panel Switch */ /* selecting RSTRT/HALT */ unsigned kdz$v_pcntl_phylog : 1; /* (RO) Backplane Bit */ /* selecting PHYS/LOG Console */ unsigned kdz$v_pcntl_secenb : 1; /* (RO) Front Panel Switch */ /* to lock out console input */ unsigned kdz$v_pcntl_stinit : 1; /* Self-Test INIT. */ unsigned kdz$v_pcntl_stfast : 1; /* (RO) Backplane bit to */ /* select Fast Self-Test. */ unsigned kdz$v_pcntl_enbapt : 1; /* Enable APT. */ unsigned kdz$v_pcntl_stpass : 1; /* Self-Test Pass. */ unsigned kdz$v_pcntl_run : 1; /* 1=>Program mode,0=>Console */ unsigned kdz$$_fill_2 : 1; /* */ unsigned kdz$v_pcntl_clrevl : 1; /* Clear Event Lock */ unsigned kdz$v_pcntl_wrmem : 1; /* Write Memory Bit */ unsigned kdz$v_pcntl_ev4 : 1; /* Event Bits - These */ unsigned kdz$v_pcntl_ev3 : 1; /* RO bits are event */ unsigned kdz$v_pcntl_ev2 : 1; /* codes from BIIC to */ unsigned kdz$v_pcntl_ev1 : 1; /* allow CPU to monitor */ unsigned kdz$v_pcntl_ev0 : 1; /* BI status */ unsigned kdz$v_pcntl_wwpo : 1; /* Write Wrong Parity Odd */ unsigned kdz$$_fill_3 : 2; /*bitfield mask; /* Disable RX50 */ unsigned kdz$v_pcntl_nidis : 1; /* Disable NI Lance */ unsigned kdz$v_pcntl_cnslie : 1; /* Console Interrupt Enable */ unsigned kdz$v_pcntl_cnslcl : 1; /* Clear Console Interrupt */ unsigned kdz$v_pcntl_cnslin : 1; /* Console Interrupt RCVD */ unsigned kdz$v_pcntl_wwpe : 1; /* Write Wrong Parity Even */ unsigned kdz$v_pcntl_rxdone : 1; /* RX Done Interrupt */ unsigned kdz$v_pcntl_rxstat : 1; /* RX Status Interrupt */ unsigned kdz$v_pcntl_clripi : 1; /* Clear IP Interrupt */ unsigned kdz$v_pcntl_ipintr : 1; /* IP Interrupt RCVD */ unsigned kdz$v_pcntl_crdie : 1; /* CRD Interrupt Enable */ unsigned kdz$v_pcntl_clrcrd : 1; /* Clear CRD Interrupt */ unsigned kdz$v_pcntl_crdint : 1; /* CRD Interrupt RCVD */ unsigned kdz$v_fill_0_ : 1; } kdz$r_pcntl_bits; } kdz$r_pcntl_overlay; char kdzdef$$_fill_4 [508]; /* Fill out page */ /* */ /* NI Packet Buffer */ /* */ unsigned char kdz$b_nibuf; /*NI Packet Buffer Base */ char kdzdef$$_fill_5 [32767]; /* Fill out to 32KB */ /* */ /* EEPROM */ /* */ unsigned char kdz$b_eeprom; /*EEPROM Base */ char kdzdef$$_fill_6 [8191]; /* Fill out to 8KB */ /* */ /* NI Data Register */ /* */ unsigned int kdz$l_nidata; /* NI Data Register */ char kdzdef$$_fill_7 [508]; /* Fill out page */ /* */ /* NI Address Register */ /* */ void *kdz$l_niaddr; /* NI Address Register */ char kdzdef$$_fill_8 [508]; /* Fill out page */ /* */ /* RCX50 Registers */ /* */ unsigned char kdz$b_rcx50; /* RCX50 Registers */ char kdzdef$$_fill_9 [511]; /* Fill out page */ /* */ /* Watch Chip Registers */ /* */ unsigned char kdz$b_watch; /* Watch Chip Registers */ char kdzdef$$_fill_10 [511]; /* Fill out page */ } KDZ; #if !defined(__VAXC) #define kdz$l_pcntl kdz$r_pcntl_overlay.kdz$l_pcntl #define kdz$v_pcntl_rstrt kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_rstrt #define kdz$v_pcntl_phylog kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_phylog #define kdz$v_pcntl_secenb kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_secenb #define kdz$v_pcntl_stinit kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_stinit #define kdz$v_pcntl_stfast kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_stfast #define kdz$v_pcntl_enbapt kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_enbapt #define kdz$v_pcntl_stpass kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_stpass #define kdz$v_pcntl_run kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_run #define kdz$v_pcntl_clrevl kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_clrevl #define kdz$v_pcntl_wrmem kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_wrmem #define kdz$v_pcntl_ev4 kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_ev4 #define kdz$v_pcntl_ev3 kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_ev3 #define kdz$v_pcntl_ev2 kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_ev2 #define kdz$v_pcntl_ev1 kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_ev1 #define kdz$v_pcntl_ev0 kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_ev0 #define kdz$v_pcntl_wwpo kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_wwpo #define kdz$v_pcntl_nidis kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_nidis #define kdz$v_pcntl_cnslie kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_cnslie #define kdz$v_pcntl_cnslcl kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_cnslcl #define kdz$v_pcntl_cnslin kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_cnslin #define kdz$v_pcntl_wwpe kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_wwpe #define kdz$v_pcntl_rxdone kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_rxdone #define kdz$v_pcntl_rxstat kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_rxstat #define kdz$v_pcntl_clripi kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_clripi #define kdz$v_pcntl_ipintr kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_ipintr #define kdz$v_pcntl_crdie kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_crdie #define kdz$v_pcntl_clrcrd kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_clrcrd #define kdz$v_pcntl_crdint kdz$r_pcntl_overlay.kdz$r_pcntl_bits.kdz$v_pcntl_crdint #endif /* #if !defined(__VAXC) */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __KDZDEF_LOADED */