/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:27:05 by OpenVMS SDL EV3-3 */ /* Source: 10-MAR-1995 16:55:05 $1$DGA7274:[LIB_H.SRC]KA0902DEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $KA0902DEF ***/ #ifndef __KA0902DEF_LOADED #define __KA0902DEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif #define KA0902$K_MAX_CPU_MODULES 4 #define KA0902$K_MAX_MEMORY_MODULES 4 #define KA0902$K_OPDRIVER_RCV_ISR 6 #define KA0902$K_OPDRIVER_XMT_ISR 15 #define KA0902_IIO$M_IOCSR_EN_LDEN 0x1 #define KA0902_IIO$M_IOCSR_EL 0x2 #define KA0902_IIO$M_IOCSR_ESMV 0x4 #define KA0902_IIO$M_IOCSR_PDBP 0x8 #define KA0902_IIO$M_IOCSR_PCIPRST0 0x10 #define KA0902_IIO$M_IOCSR_PCIPRST1 0x20 #define KA0902_IIO$M_IOCSR_INT 0x40 #define KA0902_IIO$M_IOCSR_TLBEE 0x80 #define KA0902_IIO$M_IOCSR_CXACK 0x100 #define KA0902_IIO$M_IOCSR_FILL2 0x200 #define KA0902_IIO$M_IOCSR_EXEX 0x400 #define KA0902_IIO$M_IOCSR_FILL3 0x800 #define KA0902_IIO$M_IOCSR_CAWWP0 0x1000 #define KA0902_IIO$M_IOCSR_CAWWP2 0x2000 #define KA0902_IIO$M_IOCSR_DWWPE 0x4000 #define KA0902_IIO$M_IOCSR_MBA5 0x8000 #define KA0902_IIO$M_IOCSR_MBA6 0x10000 #define KA0902_IIO$M_IOCSR_MBA7 0x20000 #define KA0902_IIO$M_IOCSR_PCIPRST3 0x40000 #define KA0902_IIO$M_IOCSR_PCIPRST4 0x80000 #define KA0902_IIO$M_IOCSR_PDWWP1 0x100000 #define KA0902_IIO$M_IOCSR_PDWWP0 0x200000 #define KA0902_IIO$M_IOCSR_PBR 0x400000 #define KA0902_IIO$M_IOCSR_PIR 0x800000 #define KA0902_IIO$M_IOCSR_ENCOI 0x1000000 #define KA0902_IIO$M_IOCSR_EPMS 0x2000000 #define KA0902_IIO$M_IOCSR_ETLB 0x4000000 #define KA0902_IIO$M_IOCSR_EACC 0x8000000 #define KA0902_IIO$M_IOCSR_FTLB 0x10000000 #define KA0902_IIO$M_IOCSR_ECPC 0x20000000 #define KA0902_IIO$M_IOCSR_CIR 0x40000000 #define KA0902_IIO$M_IOCSR_EPL 0x80000000 #define KA0902_IIO$M_IOCSR_CBBCE 0x1 #define KA0902_IIO$M_IOCSR_TRN 0xE #define KA0902_IIO$M_IOCSR_SMVL 0x70 #define KA0902_IIO$M_IOCSR_MBA4 0x80 #define KA0902_IIO$M_IOCSR_EPR 0x100 #define KA0902_IIO$M_IOCSR_RDPE64 0x200 #define KA0902_IIO$M_IOCSR_ADPE64 0x400 #define KA0902_IIO$M_IOCSR_WDPE64 0x800 #define KA0902_IIO$M_IOCSR_CAWWP1 0x1000 #define KA0902_IIO$M_IOCSR_CAWWP3 0x2000 #define KA0902_IIO$M_IOCSR_DWWPO 0x4000 #define KA0902_IIO$M_IOCSR_T24ST 0x8000 #define KA0902_IIO$M_IOCSR_PPC1 0x10000 #define KA0902_IIO$M_IOCSR_PPC2 0x20000 #define KA0902_IIO$M_IOCSR_STALL 0x40000 #define KA0902_IIO$M_IOCSR_FILL4 0x80000 #define KA0902_IIO$M_IOCSR_PRM 0x100000 #define KA0902_IIO$M_IOCSR_PWM 0x200000 #define KA0902_IIO$M_IOCSR_FPRDPED 0x400000 #define KA0902_IIO$M_IOCSR_FPADPED 0x800000 #define KA0902_IIO$M_IOCSR_FPWDPED 0x1000000 #define KA0902_IIO$M_IOCSR_EPNMI 0x2000000 #define KA0902_IIO$M_IOCSR_EPDTI 0x4000000 #define KA0902_IIO$M_IOCSR_EPSEI 0x8000000 #define KA0902_IIO$M_IOCSR_EPPEI 0x10000000 #define KA0902_IIO$M_IOCSR_ERDPC 0x20000000 #define KA0902_IIO$M_IOCSR_EPADPC 0x40000000 #define KA0902_IIO$M_IOCSR_EWDPC 0x80000000 #define KA0902_IIO$M_CERR1_URE 0x1 #define KA0902_IIO$M_CERR1_NAE 0x2 #define KA0902_IIO$M_CERR1_CAPE 0x4 #define KA0902_IIO$M_CERR1_MCAPE 0x8 #define KA0902_IIO$M_CERR1_RWDPE 0x10 #define KA0902_IIO$M_CERR1_MWRPE 0x20 #define KA0902_IIO$M_CERR1_RDPE 0x40 #define KA0902_IIO$M_CERR1_MRDPE 0x80 #define KA0902_IIO$M_CERR1_CAPE0 0x100 #define KA0902_IIO$M_CERR1_CAPE2 0x200 #define KA0902_IIO$M_CERR1_DPE0 0x400 #define KA0902_IIO$M_CERR1_DPE2 0x800 #define KA0902_IIO$M_CERR1_DPE4 0x1000 #define KA0902_IIO$M_CERR1_DPE6 0x2000 #define KA0902_IIO$M_CERR1_CWDP 0x10000 #define KA0902_IIO$M_CERR1_BSE 0x20000 #define KA0902_IIO$M_CERR1_IPFNE 0x40000 #define KA0902_IIO$M_CERR1_CAPE1 0x100 #define KA0902_IIO$M_CERR1_CAPE3 0x200 #define KA0902_IIO$M_CERR1_DPE1 0x400 #define KA0902_IIO$M_CERR1_DPE3 0x800 #define KA0902_IIO$M_CERR1_DPE5 0x1000 #define KA0902_IIO$M_CERR1_DPE7 0x2000 #define KA0902_IIO$M_CERR3_L 0xFFFFFFFF #define KA0902_IIO$M_CERR3_H 0xFFFFFFFF00000000 #define KA0902_IIO$M_PERR1_PWDPE 0x1 #define KA0902_IIO$M_PERR1_PAPE 0x2 #define KA0902_IIO$M_PERR1_PRDPE 0x4 #define KA0902_IIO$M_PERR1_PPE 0x8 #define KA0902_IIO$M_PERR1_PSE 0x10 #define KA0902_IIO$M_PERR1_PDTE 0x20 #define KA0902_IIO$M_PERR1_NMI 0x40 #define KA0902_IIO$M_PERR1_PPCSE 0x80 #define KA0902_IIO$M_PERR1_WDPE64 0x100 #define KA0902_IIO$M_PERR1_ADPE64 0x200 #define KA0902_IIO$M_PERR1_RDPE64 0x400 #define KA0902_IIO$M_PERR1_TA 0x800 #define KA0902_IIO$M_PERR1_PRDPE64 0x10000 #define KA0902_IIO$M_PERR1_PADPE64 0x20000 #define KA0902_IIO$M_PERR1_PWDPE64 0x40000 #define KA0902_IIO$M_PERR1_PTA 0x80000 #define KA0902_IIO$M_PSCM_L 0xFFFFFFFF #define KA0902_IIO$M_PSCM_H 0xFFFFFFFF00000000 #define KA0902_IIO$M_HAE1_PUA_BIT26 0x20 #define KA0902_IIO$M_HBASE_PHE1 0x2000 #define KA0902_IIO$M_HBASE_PHE2 0x4000 #define KA0902_IIO$M_HBASE_R0_ENA 0x1000000 #define KA0902_IIO$M_HBASE_R1_ENA 0x2000000 #define KA0902_IIO$M_HBASE_R2_ENA 0x4000000 #define KA0902_IIO$M_HBASE_R3_ENA 0x8000000 #define KA0902_IIO$M_HBASE_R4_ENA 0x10000000 #define KA0902_IIO$M_HBASE_R5_ENA 0x20000000 #define KA0902_IIO$M_HBASE_R6_ENA 0x40000000 #define KA0902_IIO$M_HBASE_R7_ENA 0x80000000 #define KA0902_IIO$M_HBASE_R8_ENA 0x1 #define KA0902_IIO$M_HBASE_R9_ENA 0x2 #define KA0902_IIO$M_HBASE_R10_ENA 0x4 #define KA0902_IIO$M_HBASE_R11_ENA 0x8 #define KA0902_IIO$M_HBASE_R12_ENA 0x10 #define KA0902_IIO$M_HBASE_R13_ENA 0x20 #define KA0902_IIO$M_HBASE_R14_ENA 0x40 #define KA0902_IIO$M_WBASE1_PPE 0x20000 #define KA0902_IIO$M_WBASE1_SGE 0x40000 #define KA0902_IIO$M_WBASE1_PWE 0x80000 #define KA0902_IIO$M_WBASE2_PPE 0x20000 #define KA0902_IIO$M_WBASE2_SGE 0x40000 #define KA0902_IIO$M_WBASE2_PWE 0x80000 #define KA0902_IIO$M_TLBBR_TLBBV 0x1 #define KA0902_IIO$M_TLBBR_TLBBD 0x7FFFE #define KA0902_IIO$M_IVRPR_PRVECT 0xFF #define KA0902_IIO$M_IVRPR_IA 0x3FFFF #define KA0902_IIO$M_HAE3_CFG_TYPE 0xC0000000 #define KA0902_IIO$M_WBASE3_PPE 0x1000 #define KA0902_IIO$M_WBASE3_SGE 0x40000 #define KA0902_IIO$M_WBASE3_PWE 0x80000 #define KA0902_IIO$M_TDR0_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR0_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR0_TLBV0 0x1 #define KA0902_IIO$M_TDR0_TLBPFN 0x7FFFE #define KA0902_IIO$M_TDR1_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR1_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR1_TLBV1 0x1 #define KA0902_IIO$M_TDR1_TLBPFN 0x7FFFE #define KA0902_IIO$M_TDR2_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR2_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR2_TLBV2 0x1 #define KA0902_IIO$M_TDR2_TLBPFN 0x7FFFE #define KA0902_IIO$M_TDR3_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR3_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR3_TLBV3 0x1 #define KA0902_IIO$M_TDR3_TLBPFN 0x7FFFE #define KA0902_IIO$M_TDR4_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR4_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR4_TLBV4 0x1 #define KA0902_IIO$M_TDR4_TLBPFN 0x7FFFE #define KA0902_IIO$M_TDR5_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR5_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR5_TLBV5 0x1 #define KA0902_IIO$M_TDR5_TLBPFN 0x7FFFE #define KA0902_IIO$M_TDR6_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR6_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR6_TLBV6 0x1 #define KA0902_IIO$M_TDR6_TLBPFN 0x7FFFE #define KA0902_IIO$M_TDR7_TLBTD0 0x3FFFF #define KA0902_IIO$M_TDR7_TLBTD1 0x3FFC0000 #define KA0902_IIO$M_TDR7_TLBV7 0x1 #define KA0902_IIO$M_TDR7_TLBPFN 0x7FFFE #define KA0902_IIO$M_WBASE4_PPE 0x1000 #define KA0902_IIO$M_WBASE4_SGE 0x40000 #define KA0902_IIO$M_WBASE4_PWE 0x80000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _ka0902_iio { /* I/O control/status register */ #pragma __nomember_alignment __union { __int64 ka0902_iio$q_iocsr; __struct { __union { unsigned int ka0902_iio$l_iocsr_l; __struct { unsigned ka0902_iio$v_iocsr_en_lden : 1; /* dense hole enable */ unsigned ka0902_iio$v_iocsr_el : 1; /* Enable loopback */ unsigned ka0902_iio$v_iocsr_esmv : 1; /* State Machine Visibility */ unsigned ka0902_iio$v_iocsr_pdbp : 1; /* Drive PCI bad parity */ unsigned ka0902_iio$v_iocsr_pciprst0 : 1; /* PCI slot 0 present */ unsigned ka0902_iio$v_iocsr_pciprst1 : 1; /* PCI slot 1 present */ unsigned ka0902_iio$v_iocsr_int : 1; /* external interrupt pin sts */ unsigned ka0902_iio$v_iocsr_tlbee : 1; /* TLB error enable */ unsigned ka0902_iio$v_iocsr_cxack : 1; /* log cxack errors */ unsigned ka0902_iio$v_iocsr_fill2 : 1; /* */ unsigned ka0902_iio$v_iocsr_exex : 1; /* Exclusive Exchange cmd */ unsigned ka0902_iio$v_iocsr_fill3 : 1; /* */ unsigned ka0902_iio$v_iocsr_cawwp0 : 1; /* Write CBUS C/A bad parity */ unsigned ka0902_iio$v_iocsr_cawwp2 : 1; /* Write CBUS C/A bad parity */ unsigned ka0902_iio$v_iocsr_dwwpe : 1; /* Write CBUS even bad parity */ unsigned ka0902_iio$v_iocsr_mba5 : 1; /* external MBA5 status */ unsigned ka0902_iio$v_iocsr_mba6 : 1; /* external MBA6 status */ unsigned ka0902_iio$v_iocsr_mba7 : 1; /* external MBA7 status */ unsigned ka0902_iio$v_iocsr_pciprst3 : 1; /* slot 4 present1 */ unsigned ka0902_iio$v_iocsr_pciprst4 : 1; /* slot 4 present2 */ unsigned ka0902_iio$v_iocsr_pdwwp1 : 1; /* Write CBUS DMA bad parity */ unsigned ka0902_iio$v_iocsr_pdwwp0 : 1; /* Write CBUS DMA bad parity */ unsigned ka0902_iio$v_iocsr_pbr : 1; /* PCI bus reset */ unsigned ka0902_iio$v_iocsr_pir : 1; /* PCI interface reset */ unsigned ka0902_iio$v_iocsr_encoi : 1; /* Enable NOACK,CUCERR,SYNC */ unsigned ka0902_iio$v_iocsr_epms : 1; /* Enable PCI memory space */ unsigned ka0902_iio$v_iocsr_etlb : 1; /* Enable Translation buffer */ unsigned ka0902_iio$v_iocsr_eacc : 1; /* Enable atomic CBUS cycles */ unsigned ka0902_iio$v_iocsr_ftlb : 1; /* Flush Translation buffer */ unsigned ka0902_iio$v_iocsr_ecpc : 1; /* Enable CBUS parity check */ unsigned ka0902_iio$v_iocsr_cir : 1; /* CBUS interface reset */ unsigned ka0902_iio$v_iocsr_epl : 1; /* Enable PCI lock */ } ka0902_iio$r_iocsr_l_bits; } ka0902_iio$r_iocsr_fields_l_ol; __union { unsigned int ka0902_iio$l_iocsr_h; __struct { unsigned ka0902_iio$v_iocsr_cbbce : 1; /* Enable CBUS back-to-back */ unsigned ka0902_iio$v_iocsr_trn : 3; /* T2 revision number */ unsigned ka0902_iio$v_iocsr_smvl : 3; /* State machine select */ unsigned ka0902_iio$v_iocsr_mba4 : 1; /* external MBA4 status */ unsigned ka0902_iio$v_iocsr_epr : 1; /* Enable passive release */ unsigned ka0902_iio$v_iocsr_rdpe64 : 1; /* T4 parity: master read */ unsigned ka0902_iio$v_iocsr_adpe64 : 1; /* T4 parity: target rcv */ unsigned ka0902_iio$v_iocsr_wdpe64 : 1; /* T4 parity: target write */ unsigned ka0902_iio$v_iocsr_cawwp1 : 1; /* CBUS C/A bad parity 1 */ unsigned ka0902_iio$v_iocsr_cawwp3 : 1; /* CBUS C/A bad parity 3 */ unsigned ka0902_iio$v_iocsr_dwwpo : 1; /* CBUS data parity odd */ unsigned ka0902_iio$v_iocsr_t24st : 1; /* clear: T2 compatability mode */ unsigned ka0902_iio$v_iocsr_ppc1 : 1; /* 2nd PIO buf is PPC buf */ unsigned ka0902_iio$v_iocsr_ppc2 : 1; /* 3rd PIO buf is PPC buf */ unsigned ka0902_iio$v_iocsr_stall : 1; /* enable DMA stall mode */ unsigned ka0902_iio$v_iocsr_fill4 : 1; unsigned ka0902_iio$v_iocsr_prm : 1; /* PCI read multiple */ unsigned ka0902_iio$v_iocsr_pwm : 1; /* PCI write multiple */ unsigned ka0902_iio$v_iocsr_fprdped : 1; /* PCI Force RDPE detect */ unsigned ka0902_iio$v_iocsr_fpadped : 1; /* PCI Force APE detect */ unsigned ka0902_iio$v_iocsr_fpwdped : 1; /* PCI Force RWPE detect */ unsigned ka0902_iio$v_iocsr_epnmi : 1; /* PCI enable NMI */ unsigned ka0902_iio$v_iocsr_epdti : 1; /* PCI enable DTI */ unsigned ka0902_iio$v_iocsr_epsei : 1; /* PCI enable SERR interrupt */ unsigned ka0902_iio$v_iocsr_eppei : 1; /* PCI enable PERR interrupt */ unsigned ka0902_iio$v_iocsr_erdpc : 1; /* PCI enable RDPE interrupt */ unsigned ka0902_iio$v_iocsr_epadpc : 1; /* PCI enable addr parity int. */ unsigned ka0902_iio$v_iocsr_ewdpc : 1; /* PCI enable WD parity int. */ } ka0902_iio$r_iocsr_h_bits; } ka0902_iio$r_iocsr_fields_h_ol; } ka0902_iio$r_iocsr_fields; } ka0902_iio$r_iocsr_ol; char ka0902_iio$b_fill1 [24]; /* Cbus error register 1 */ __union { __int64 ka0902_iio$q_cerr1; __struct { __union { unsigned int ka0902_iio$l_cerr1_l; __struct { unsigned ka0902_iio$v_cerr1_ure : 1; /* Uncorrectable read error */ unsigned ka0902_iio$v_cerr1_nae : 1; /* No acknowledge error */ unsigned ka0902_iio$v_cerr1_cape : 1; /* Command address parity error even */ unsigned ka0902_iio$v_cerr1_mcape : 1; /* Missed command address parity error even */ unsigned ka0902_iio$v_cerr1_rwdpe : 1; /* Write data parity error even */ unsigned ka0902_iio$v_cerr1_mwrpe : 1; /* Missed write data parity error even */ unsigned ka0902_iio$v_cerr1_rdpe : 1; /* Read data parity error even */ unsigned ka0902_iio$v_cerr1_mrdpe : 1; /* Missed read data parity error even */ unsigned ka0902_iio$v_cerr1_cape0 : 1; /* C/A parity error longword 0 */ unsigned ka0902_iio$v_cerr1_cape2 : 1; /* C/A parity error longword 2 */ unsigned ka0902_iio$v_cerr1_dpe0 : 1; /* Data parity error longword 0 */ unsigned ka0902_iio$v_cerr1_dpe2 : 1; /* Data parity error longword 2 */ unsigned ka0902_iio$v_cerr1_dpe4 : 1; /* Data parity error longword 4 */ unsigned ka0902_iio$v_cerr1_dpe6 : 1; /* Data parity error longword 6 */ unsigned ka0902_iio$v_cerr1_fill1 : 2; unsigned ka0902_iio$v_cerr1_cwdp : 1; /* Command WDPE */ unsigned ka0902_iio$v_cerr1_bse : 1; /* Bus sync error */ unsigned ka0902_iio$v_cerr1_ipfne : 1; /* Invalid PFN */ unsigned ka0902_iio$v_cerr1_fill2 : 13; } ka0902_iio$r_cerr1_l_bits; } ka0902_iio$r_cerr1_fields_l_ol; __union { unsigned int ka0902_iio$l_cerr1_h; __struct { unsigned ka0902_iio$v_cerr1_fill3 : 8; unsigned ka0902_iio$v_cerr1_cape1 : 1; /* C/A parity error LW1 */ unsigned ka0902_iio$v_cerr1_cape3 : 1; /* C/A parity error LW3 */ unsigned ka0902_iio$v_cerr1_dpe1 : 1; /* Data parity error LW1 */ unsigned ka0902_iio$v_cerr1_dpe3 : 1; /* Data parity error LW3 */ unsigned ka0902_iio$v_cerr1_dpe5 : 1; /* Data parity error LW5 */ unsigned ka0902_iio$v_cerr1_dpe7 : 1; /* Data parity error LW7 */ unsigned ka0902_iio$v_cerr1_fill4 : 18; } ka0902_iio$r_cerr1_h_bits; } ka0902_iio$r_cerr1_fields_h_ol; } ka0902_iio$r_cerr1_fields; } ka0902_iio$r_cerr1_ol; char ka0902_iio$b_fill2 [24]; /* Cbus error register 2 */ __union { unsigned __int64 ka0902_iio$q_cerr2; __struct { unsigned int ka0902_iio$l_cerr2_l; unsigned int ka0902_iio$l_cerr2_h; } ka0902_iio$r_cerr2_bits; } ka0902_iio$r_cerr2_overlay; char ka0902_iio$b_fill3 [24]; /* Cbus error register 3 */ __union { unsigned __int64 ka0902_iio$q_cerr3; __struct { unsigned ka0902_iio$v_cerr3_l : 32; unsigned ka0902_iio$v_cerr3_h : 32; } ka0902_iio$r_cerr3_bits; } ka0902_iio$r_cerr3_overlay; char ka0902_iio$b_fill4 [24]; /* PCI error register 1 */ __union { __int64 ka0902_iio$q_perr1; __struct { __union { unsigned int ka0902_iio$l_perr1_l; __struct { unsigned ka0902_iio$v_perr1_pwdpe : 1; /* PCI write data parity error */ unsigned ka0902_iio$v_perr1_pape : 1; /* PCI address parity error */ unsigned ka0902_iio$v_perr1_prdpe : 1; /* PCI read data parity error */ unsigned ka0902_iio$v_perr1_ppe : 1; /* PCI parity error */ unsigned ka0902_iio$v_perr1_pse : 1; /* PCI system error */ unsigned ka0902_iio$v_perr1_pdte : 1; /* PCI device timeout error */ unsigned ka0902_iio$v_perr1_nmi : 1; /* Non-maskable interrupt */ unsigned ka0902_iio$v_perr1_ppcse : 1; /* Bad size on PPC xfer */ unsigned ka0902_iio$v_perr1_wdpe64 : 1; /* Parity: write data,T4 target */ unsigned ka0902_iio$v_perr1_adpe64 : 1; /* Parity: address, T4 target */ unsigned ka0902_iio$v_perr1_rdpe64 : 1; /* Parity: read data, T4 master */ unsigned ka0902_iio$v_perr1_ta : 1; /* Target abort */ unsigned ka0902_iio$v_perr1_fill1 : 4; unsigned ka0902_iio$v_perr1_prdpe64 : 1; /* enable logging rdpe */ unsigned ka0902_iio$v_perr1_padpe64 : 1; /* enable logging adpe */ unsigned ka0902_iio$v_perr1_pwdpe64 : 1; /* enable logging wdpe */ unsigned ka0902_iio$v_perr1_pta : 1; /* enable loggine TA */ unsigned ka0902_iio$v_perr1_fill2 : 12; } ka0902_iio$r_perr1_l_bits; } ka0902_iio$r_perr1_fields_l_ol; __union { unsigned int ka0902_iio$l_perr1_h; __struct { unsigned ka0902_iio$v_perr1_fill3 : 32; } ka0902_iio$r_perr1_h_bits; } ka0902_iio$r_perr1_fields_h_ol; } ka0902_iio$r_perr1_fields; } ka0902_iio$r_perr1_ol; char ka0902_iio$b_fill5 [24]; /* PCI error register 2 */ __union { __int64 ka0902_iio$q_perr2; __struct { __union { unsigned int ka0902_iio$l_perr2_l; __struct { unsigned ka0902_iio$v_perr2_pea : 32; /* PCI error address */ } ka0902_iio$r_perr2_l_bits; } ka0902_iio$r_perr2_fields_l_ol; __union { unsigned int ka0902_iio$l_perr2_h; __struct { unsigned ka0902_iio$v_perr2_pec : 5; /* PCI error command */ unsigned ka0902_iio$v_perr2_fill1 : 27; } ka0902_iio$r_perr2_h_bits; } ka0902_iio$r_perr2_fields_h_ol; } ka0902_iio$r_perr2_fields; } ka0902_iio$r_perr2_ol; char ka0902_iio$b_fill6 [24]; /* PCI special cycle register */ __union { unsigned __int64 ka0902_iio$q_pscm; __struct { unsigned ka0902_iio$v_pscm_l : 32; unsigned ka0902_iio$v_pscm_h : 32; } ka0902_iio$r_pscm_bits; } ka0902_iio$r_pscm_overlay; char ka0902_iio$b_fill7 [24]; /* High Address Extension register 1 */ /* Note extra bit for T4 */ /* */ __union { __int64 ka0902_iio$q_hae1; __struct { __union { unsigned int ka0902_iio$l_hae1_l; __struct { unsigned ka0902_iio$v_hae1_pua1 : 5; /* PCI upper address (T2) */ unsigned ka0902_iio$v_hae1_pua_bit26 : 1; /* extra addr bit for T4 only */ unsigned ka0902_iio$v_hae1_fill1 : 26; } ka0902_iio$r_hae1_l_bits; } ka0902_iio$r_hae1_fields_l_ol; __union { unsigned int ka0902_iio$l_hae1_h; __struct { unsigned ka0902_iio$v_hae1_fill2 : 32; } ka0902_iio$r_hae1_h_bits; } ka0902_iio$r_hae1_fields_h_ol; } ka0902_iio$r_hae1_fields; } ka0902_iio$r_hae1_ol; char ka0902_iio$b_fill8 [24]; /* High Address Extension register 2 */ /* Note 1 less bit for T4 */ __union { __int64 ka0902_iio$q_hae2; __struct { __union { unsigned int ka0902_iio$l_hae2_l; __struct { unsigned ka0902_iio$v_hae2_pua2 : 8; /* PCI upper address */ unsigned ka0902_iio$v_hae2_pua1 : 1; /* and 1 more for T2 */ unsigned ka0902_iio$v_hae2_fill1 : 23; } ka0902_iio$r_hae2_l_bits; } ka0902_iio$r_hae2_fields_l_ol; __union { unsigned int ka0902_iio$l_hae2_h; __struct { unsigned ka0902_iio$v_hae2_fill2 : 32; } ka0902_iio$r_hae2_h_bits; } ka0902_iio$r_hae2_fields_h_ol; } ka0902_iio$r_hae2_fields; } ka0902_iio$r_hae2_ol; char ka0902_iio$b_fill9 [24]; /* PCI Hole base register */ __union { __int64 ka0902_iio$q_hbase; __struct { __union { unsigned int ka0902_iio$l_hbase_l; __struct { unsigned ka0902_iio$v_hbase_phea : 9; /* PCI hole end address */ unsigned ka0902_iio$v_hbase_fill1 : 4; unsigned ka0902_iio$v_hbase_phe1 : 1; /* PCI fixed hole enable 1 */ /* Note that although at first glance this seems */ /* incompatible with T2, the sense is the same - T4 */ /* merely allows subsets of 512-1mb */ unsigned ka0902_iio$v_hbase_phe2 : 1; /* PCI programmable hole enable */ unsigned ka0902_iio$v_hbase_phsa : 9; /* PCI hole start address */ unsigned ka0902_iio$v_hbase_r0_ena : 1; /* enable region 0 */ unsigned ka0902_iio$v_hbase_r1_ena : 1; /* enable region 1 */ unsigned ka0902_iio$v_hbase_r2_ena : 1; /* enable region 2 */ unsigned ka0902_iio$v_hbase_r3_ena : 1; /* enable region 3 */ unsigned ka0902_iio$v_hbase_r4_ena : 1; /* enable region 4 */ unsigned ka0902_iio$v_hbase_r5_ena : 1; /* enable region 5 */ unsigned ka0902_iio$v_hbase_r6_ena : 1; /* enable region 6 */ unsigned ka0902_iio$v_hbase_r7_ena : 1; /* enable region 7 */ } ka0902_iio$r_hbase_l_bits; } ka0902_iio$r_hbase_fields_l_ol; __union { unsigned int ka0902_iio$l_hbase_h; __struct { unsigned ka0902_iio$v_hbase_r8_ena : 1; /* enable region 8 */ unsigned ka0902_iio$v_hbase_r9_ena : 1; /* enable region 9 */ unsigned ka0902_iio$v_hbase_r10_ena : 1; /* enable region 10 */ unsigned ka0902_iio$v_hbase_r11_ena : 1; /* enable region 11 */ unsigned ka0902_iio$v_hbase_r12_ena : 1; /* enable region 12 */ unsigned ka0902_iio$v_hbase_r13_ena : 1; /* enable region 13 */ unsigned ka0902_iio$v_hbase_r14_ena : 1; /* enable region 14 */ unsigned ka0902_iio$v_hbase_fill2 : 25; } ka0902_iio$r_hbase_h_bits; } ka0902_iio$r_hbase_fields_h_ol; } ka0902_iio$r_hbase_fields; } ka0902_iio$r_hbase_ol; char ka0902_iio$b_fill10 [24]; /* PCI Window base register 1 */ __union { __int64 ka0902_iio$q_wbase1; __struct { __union { unsigned int ka0902_iio$l_wbase1_l; __struct { unsigned ka0902_iio$v_wbase1_pwea : 12; /* PCI window end address */ unsigned ka0902_iio$v_wbase1_fill1 : 5; unsigned ka0902_iio$v_wbase1_ppe : 1; /* PCI peer-to-peer enabled */ unsigned ka0902_iio$v_wbase1_sge : 1; /* PCI Scatter-Gather enabled */ unsigned ka0902_iio$v_wbase1_pwe : 1; /* PCI window enable */ unsigned ka0902_iio$v_wbase1_pwsa : 12; /* PCI window start address */ } ka0902_iio$r_wbase1_l_bits; } ka0902_iio$r_wbase1_fields_l_ol; __union { unsigned int ka0902_iio$l_wbase1_h; __struct { unsigned ka0902_iio$v_wbase1_fill3 : 32; } ka0902_iio$r_wbase1_h_bits; } ka0902_iio$r_wbase1_fields_h_ol; } ka0902_iio$r_wbase1_fields; } ka0902_iio$r_wbase1_ol; char ka0902_iio$b_fill11 [24]; /* PCI Window mask register 1 */ __union { __int64 ka0902_iio$q_wmask1; __struct { __union { unsigned int ka0902_iio$l_wmask1_l; __struct { unsigned ka0902_iio$v_wmask1_fill1 : 20; unsigned ka0902_iio$v_wmask1_pwm : 11; /* PCI window mask */ unsigned ka0902_iio$v_wmask1_fill2 : 1; } ka0902_iio$r_wmask1_l_bits; } ka0902_iio$r_wmask1_fields_l_ol; __union { unsigned int ka0902_iio$l_wmask1_h; __struct { unsigned ka0902_iio$v_wmask1_fill3 : 32; } ka0902_iio$r_wmask1_h_bits; } ka0902_iio$r_wmask1_fields_h_ol; } ka0902_iio$r_wmask1_fields; } ka0902_iio$r_wmask1_ol; char ka0902_iio$b_fill12 [24]; /* PCI Translated Base register 1 */ __union { __int64 ka0902_iio$q_tbase1; __struct { __union { unsigned int ka0902_iio$l_tbase1_l; __struct { unsigned ka0902_iio$v_tbase1_fill1 : 9; unsigned ka0902_iio$v_tbase1_tba : 22; /* PCI Translated Base */ unsigned ka0902_iio$v_tbase1_fill2 : 1; } ka0902_iio$r_tbase1_l_bits; } ka0902_iio$r_tbase1_fields_l_ol; __union { unsigned int ka0902_iio$l_tbase1_h; __struct { unsigned ka0902_iio$v_tbase1_fill3 : 32; } ka0902_iio$r_tbase1_h_bits; } ka0902_iio$r_tbase1_fields_h_ol; } ka0902_iio$r_tbase1_fields; } ka0902_iio$r_tbase1_ol; char ka0902_iio$b_fill13 [24]; /* PCI Window base register 2 */ __union { __int64 ka0902_iio$q_wbase2; __struct { __union { unsigned int ka0902_iio$l_wbase2_l; __struct { unsigned ka0902_iio$v_wbase2_pwea : 12; /* PCI window end address */ unsigned ka0902_iio$v_wbase2_fill1 : 5; unsigned ka0902_iio$v_wbase2_ppe : 1; /* PCI peer-to-peer enabled */ unsigned ka0902_iio$v_wbase2_sge : 1; /* PCI Scatter-Gather enabled */ unsigned ka0902_iio$v_wbase2_pwe : 1; /* PCI window enable */ unsigned ka0902_iio$v_wbase2_pwsa : 12; /* PCI window start address */ } ka0902_iio$r_wbase2_l_bits; } ka0902_iio$r_wbase2_fields_l_ol; __union { unsigned int ka0902_iio$l_wbase2_h; __struct { unsigned ka0902_iio$v_wbase2_fill3 : 32; } ka0902_iio$r_wbase2_h_bits; } ka0902_iio$r_wbase2_fields_h_ol; } ka0902_iio$r_wbase2_fields; } ka0902_iio$r_wbase2_ol; char ka0902_iio$b_fill14 [24]; /* PCI Window mask register 2 */ __union { __int64 ka0902_iio$q_wmask2; __struct { __union { unsigned int ka0902_iio$l_wmask2_l; __struct { unsigned ka0902_iio$v_wmask2_fill1 : 20; unsigned ka0902_iio$v_wmask2_pwm : 11; /* PCI window mask */ unsigned ka0902_iio$v_wmask2_fill2 : 1; } ka0902_iio$r_wmask2_l_bits; } ka0902_iio$r_wmask2_fields_l_ol; __union { unsigned int ka0902_iio$l_wmask2_h; __struct { unsigned ka0902_iio$v_wmask2_fill3 : 32; } ka0902_iio$r_wmask2_h_bits; } ka0902_iio$r_wmask2_fields_h_ol; } ka0902_iio$r_wmask2_fields; } ka0902_iio$r_wmask2_ol; char ka0902_iio$b_fill15 [24]; /* PCI Translated Base register 2 */ __union { __int64 ka0902_iio$q_tbase2; __struct { __union { unsigned int ka0902_iio$l_tbase2_l; __struct { unsigned ka0902_iio$v_tbase2_fill1 : 9; unsigned ka0902_iio$v_tbase2_tba : 22; /* PCI Translated Base */ unsigned ka0902_iio$v_tbase2_fill2 : 1; } ka0902_iio$r_tbase2_l_bits; } ka0902_iio$r_tbase2_fields_l_ol; __union { unsigned int ka0902_iio$l_tbase2_h; __struct { unsigned ka0902_iio$v_tbase2_fill3 : 32; } ka0902_iio$r_tbase2_h_bits; } ka0902_iio$r_tbase2_fields_h_ol; } ka0902_iio$r_tbase2_fields; } ka0902_iio$r_tbase2_ol; char ka0902_iio$b_fill16 [24]; /* PCI TLB by-pass register */ __union { __int64 ka0902_iio$q_tlbbr; __struct { __union { unsigned int ka0902_iio$l_tlbbr_l; __struct { unsigned ka0902_iio$v_tlbbr_tlbbv : 1; /* TLB by-pass valid */ unsigned ka0902_iio$v_tlbbr_tlbbd : 18; /* TLB by-pass data */ unsigned ka0902_iio$v_tlbbr_fill1 : 13; } ka0902_iio$r_tlbbr_l_bits; } ka0902_iio$r_tlbbr_fields_l_ol; __union { unsigned int ka0902_iio$l_tlbbr_h; __struct { unsigned ka0902_iio$v_tlbbr_fill2 : 32; } ka0902_iio$r_tlbbr_h_bits; } ka0902_iio$r_tlbbr_fields_h_ol; } ka0902_iio$r_tlbbr_fields; } ka0902_iio$r_tlbbr_ol; char ka0902_iio$b_fill17 [24]; /* PCI Invalid Passive Release register */ /* for late T2 and T4, contains both IVR and passive release vector fields */ __union { __int64 ka0902_iio$q_ivrpr; __struct { __union { unsigned int ka0902_iio$l_ivrpr_l; __struct { unsigned ka0902_iio$v_ivrpr_prvect : 8; /* Passive release vec */ unsigned ka0902_iio$v_ivrpr_fill1 : 24; } ka0902_iio$r_ivrpr_l_bits; } ka0902_iio$r_ivrpr_fields_l_ol; __union { unsigned int ka0902_iio$l_ivrpr_h; __struct { unsigned ka0902_iio$v_ivrpr_ia : 18; /* Interrupt address */ unsigned ka0902_iio$v_ivrpr_fill2 : 14; } ka0902_iio$r_ivrpr_h_bits; } ka0902_iio$r_ivrpr_fields_h_ol; } ka0902_iio$r_ivrpr_fields; } ka0902_iio$r_ivrpr_ol; char ka0902_iio$b_fill18 [24]; /* High Address Extension register 3 */ __union { __int64 ka0902_iio$q_hae3; __struct { __union { unsigned int ka0902_iio$l_hae3_l; __struct { unsigned ka0902_iio$v_hae3_fill1 : 30; unsigned ka0902_iio$v_hae3_cfg_type : 2; } ka0902_iio$r_hae3_l_bits; } ka0902_iio$r_hae3_fields_l_ol; __union { unsigned int ka0902_iio$l_hae3_h; __struct { unsigned ka0902_iio$v_hae3_fill2 : 32; } ka0902_iio$r_hae3_h_bits; } ka0902_iio$r_hae3_fields_h_ol; } ka0902_iio$r_hae3_fields; } ka0902_iio$r_hae3_ol; char ka0902_iio$b_fill180 [24]; /* High Address Extension register 4 */ __union { __int64 ka0902_iio$q_hae4; __struct { __union { unsigned int ka0902_iio$l_hae4_l; __struct { unsigned ka0902_iio$v_hae4_pua : 2; /* PCI upper address */ unsigned ka0902_iio$v_hae4_fill1 : 30; } ka0902_iio$r_hae4_l_bits; } ka0902_iio$r_hae4_fields_l_ol; __union { unsigned int ka0902_iio$l_hae4_h; __struct { unsigned ka0902_iio$v_hae4_fill2 : 32; } ka0902_iio$r_hae4_h_bits; } ka0902_iio$r_hae4_fields_h_ol; } ka0902_iio$r_hae4_fields; } ka0902_iio$r_hae4_ol; char ka0902_iio$b_fill181 [24]; /* PCI Window base register 3 */ /* added for T4 */ __union { __int64 ka0902_iio$q_wbase3; __struct { __union { unsigned int ka0902_iio$l_wbase3_l; __struct { unsigned ka0902_iio$v_wbase3_pwea : 12; /* PCI window end address */ unsigned ka0902_iio$v_wbase3_ppe : 1; /* PCI peer-to-peer enable */ unsigned ka0902_iio$v_wbase3_fill1 : 5; unsigned ka0902_iio$v_wbase3_sge : 1; /* PCI Scatter-Gather enabled */ unsigned ka0902_iio$v_wbase3_pwe : 1; /* PCI window enable */ unsigned ka0902_iio$v_wbase3_pwsa : 12; /* PCI window start address */ } ka0902_iio$r_wbase3_l_bits; } ka0902_iio$r_wbase3_fields_l_ol; __union { unsigned int ka0902_iio$l_wbase3_h; __struct { unsigned ka0902_iio$v_wbase3_fill3 : 32; } ka0902_iio$r_wbase3_h_bits; } ka0902_iio$r_wbase3_fields_h_ol; } ka0902_iio$r_wbase3_fields; } ka0902_iio$r_wbase3_ol; char ka0902_iio$b_fill182 [24]; /* PCI Window mask register 3 */ /* added for T4 */ __union { __int64 ka0902_iio$q_wmask3; __struct { __union { unsigned int ka0902_iio$l_wmask3_l; __struct { unsigned ka0902_iio$v_wmask3_fill1 : 20; unsigned ka0902_iio$v_wmask3_pwm : 11; /* PCI window mask */ unsigned ka0902_iio$v_wmask3_fill2 : 1; } ka0902_iio$r_wmask3_l_bits; } ka0902_iio$r_wmask3_fields_l_ol; __union { unsigned int ka0902_iio$l_wmask3_h; __struct { unsigned ka0902_iio$v_wmask3_fill3 : 32; } ka0902_iio$r_wmask3_h_bits; } ka0902_iio$r_wmask3_fields_h_ol; } ka0902_iio$r_wmask3_fields; } ka0902_iio$r_wmask3_ol; char ka0902_iio$b_fill183 [24]; /* PCI Translated Base register 3 */ /* added for T4 */ __union { __int64 ka0902_iio$q_tbase3; __struct { __union { unsigned int ka0902_iio$l_tbase3_l; __struct { unsigned ka0902_iio$v_tbase3_fill1 : 9; unsigned ka0902_iio$v_tbase3_tba : 22; /* PCI Translated Base */ unsigned ka0902_iio$v_tbase3_fill2 : 1; } ka0902_iio$r_tbase3_l_bits; } ka0902_iio$r_tbase3_fields_l_ol; __union { unsigned int ka0902_iio$l_tbase3_h; __struct { unsigned ka0902_iio$v_tbase3_fill3 : 32; } ka0902_iio$r_tbase3_h_bits; } ka0902_iio$r_tbase3_fields_h_ol; } ka0902_iio$r_tbase3_fields; } ka0902_iio$r_tbase3_ol; char ka0902_iio$b_fill184 [56]; /* TLB data register 0 */ __union { __int64 ka0902_iio$q_tdr0; __struct { __union { unsigned int ka0902_iio$l_tdr0_l; __struct { unsigned ka0902_iio$v_tdr0_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr0_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr0_fill1 : 2; } ka0902_iio$r_tdr0_l_bits; } ka0902_iio$r_tdr0_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr0_h; __struct { unsigned ka0902_iio$v_tdr0_tlbv0 : 1; /* Valid tag for TLB 0 */ unsigned ka0902_iio$v_tdr0_tlbpfn : 18; /* PFN for TLB 0 */ unsigned ka0902_iio$v_tdr0_fill2 : 13; } ka0902_iio$r_tdr0_h_bits; } ka0902_iio$r_tdr0_fields_h_ol; } ka0902_iio$r_tdr0_fields; } ka0902_iio$r_tdr0_ol; char ka0902_iio$b_fill19 [24]; /* TLB data register 1 */ __union { __int64 ka0902_iio$q_tdr1; __struct { __union { unsigned int ka0902_iio$l_tdr1_l; __struct { unsigned ka0902_iio$v_tdr1_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr1_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr1_fill1 : 2; } ka0902_iio$r_tdr1_l_bits; } ka0902_iio$r_tdr1_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr1_h; __struct { unsigned ka0902_iio$v_tdr1_tlbv1 : 1; /* Valid tag for TLB 1 */ unsigned ka0902_iio$v_tdr1_tlbpfn : 18; /* PFN for TLB 1 */ unsigned ka0902_iio$v_tdr1_fill2 : 13; } ka0902_iio$r_tdr1_h_bits; } ka0902_iio$r_tdr1_fields_h_ol; } ka0902_iio$r_tdr1_fields; } ka0902_iio$r_tdr1_ol; char ka0902_iio$b_fill20 [24]; /* TLB data register 2 */ __union { __int64 ka0902_iio$q_tdr2; __struct { __union { unsigned int ka0902_iio$l_tdr2_l; __struct { unsigned ka0902_iio$v_tdr2_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr2_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr2_fill1 : 2; } ka0902_iio$r_tdr2_l_bits; } ka0902_iio$r_tdr2_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr2_h; __struct { unsigned ka0902_iio$v_tdr2_tlbv2 : 1; /* Valid tag for TLB 2 */ unsigned ka0902_iio$v_tdr2_tlbpfn : 18; /* PFN for TLB 2 */ unsigned ka0902_iio$v_tdr2_fill2 : 13; } ka0902_iio$r_tdr2_h_bits; } ka0902_iio$r_tdr2_fields_h_ol; } ka0902_iio$r_tdr2_fields; } ka0902_iio$r_tdr2_ol; char ka0902_iio$b_fill21 [24]; /* TLB data register 3 */ __union { __int64 ka0902_iio$q_tdr3; __struct { __union { unsigned int ka0902_iio$l_tdr3_l; __struct { unsigned ka0902_iio$v_tdr3_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr3_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr3_fill1 : 2; } ka0902_iio$r_tdr3_l_bits; } ka0902_iio$r_tdr3_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr3_h; __struct { unsigned ka0902_iio$v_tdr3_tlbv3 : 1; /* Valid tag for TLB 3 */ unsigned ka0902_iio$v_tdr3_tlbpfn : 18; /* PFN for TLB 3 */ unsigned ka0902_iio$v_tdr3_fill2 : 13; } ka0902_iio$r_tdr3_h_bits; } ka0902_iio$r_tdr3_fields_h_ol; } ka0902_iio$r_tdr3_fields; } ka0902_iio$r_tdr3_ol; char ka0902_iio$b_fill22 [24]; /* TLB data register 4 */ __union { __int64 ka0902_iio$q_tdr4; __struct { __union { unsigned int ka0902_iio$l_tdr4_l; __struct { unsigned ka0902_iio$v_tdr4_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr4_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr4_fill1 : 2; } ka0902_iio$r_tdr4_l_bits; } ka0902_iio$r_tdr4_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr4_h; __struct { unsigned ka0902_iio$v_tdr4_tlbv4 : 1; /* Valid tag for TLB 4 */ unsigned ka0902_iio$v_tdr4_tlbpfn : 18; /* PFN for TLB 4 */ unsigned ka0902_iio$v_tdr4_fill2 : 13; } ka0902_iio$r_tdr4_h_bits; } ka0902_iio$r_tdr4_fields_h_ol; } ka0902_iio$r_tdr4_fields; } ka0902_iio$r_tdr4_ol; char ka0902_iio$b_fill23 [24]; /* TLB data register 5 */ __union { __int64 ka0902_iio$q_tdr5; __struct { __union { unsigned int ka0902_iio$l_tdr5_l; __struct { unsigned ka0902_iio$v_tdr5_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr5_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr5_fill1 : 2; } ka0902_iio$r_tdr5_l_bits; } ka0902_iio$r_tdr5_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr5_h; __struct { unsigned ka0902_iio$v_tdr5_tlbv5 : 1; /* Valid tag for TLB 5 */ unsigned ka0902_iio$v_tdr5_tlbpfn : 18; /* PFN for TLB 5 */ unsigned ka0902_iio$v_tdr5_fill2 : 13; } ka0902_iio$r_tdr5_h_bits; } ka0902_iio$r_tdr5_fields_h_ol; } ka0902_iio$r_tdr5_fields; } ka0902_iio$r_tdr5_ol; char ka0902_iio$b_fill24 [24]; /* TLB data register 6 */ __union { __int64 ka0902_iio$q_tdr6; __struct { __union { unsigned int ka0902_iio$l_tdr6_l; __struct { unsigned ka0902_iio$v_tdr6_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr6_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr6_fill1 : 2; } ka0902_iio$r_tdr6_l_bits; } ka0902_iio$r_tdr6_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr6_h; __struct { unsigned ka0902_iio$v_tdr6_tlbv6 : 1; /* Valid tag for TLB 6 */ unsigned ka0902_iio$v_tdr6_tlbpfn : 18; /* PFN for TLB 6 */ unsigned ka0902_iio$v_tdr6_fill2 : 13; } ka0902_iio$r_tdr6_h_bits; } ka0902_iio$r_tdr6_fields_h_ol; } ka0902_iio$r_tdr6_fields; } ka0902_iio$r_tdr6_ol; char ka0902_iio$b_fill25 [24]; /* TLB data register 7 */ __union { __int64 ka0902_iio$q_tdr7; __struct { __union { unsigned int ka0902_iio$l_tdr7_l; __struct { unsigned ka0902_iio$v_tdr7_tlbtd0 : 18; /* Tag for TLB entry 0 */ unsigned ka0902_iio$v_tdr7_tlbtd1 : 12; /* Extended for T4 */ unsigned ka0902_iio$v_tdr7_fill1 : 2; } ka0902_iio$r_tdr7_l_bits; } ka0902_iio$r_tdr7_fields_l_ol; __union { unsigned int ka0902_iio$l_tdr7_h; __struct { unsigned ka0902_iio$v_tdr7_tlbv7 : 1; /* Valid tag for TLB 7 */ unsigned ka0902_iio$v_tdr7_tlbpfn : 18; /* PFN for TLB 7 */ unsigned ka0902_iio$v_tdr7_fill2 : 13; } ka0902_iio$r_tdr7_h_bits; } ka0902_iio$r_tdr7_fields_h_ol; } ka0902_iio$r_tdr7_fields; } ka0902_iio$r_tdr7_ol; char ka0902_iio$b_fill26 [24]; /* PCI Window base register 4 */ /* added for T4 */ __union { __int64 ka0902_iio$q_wbase4; __struct { __union { unsigned int ka0902_iio$l_wbase4_l; __struct { unsigned ka0902_iio$v_wbase4_pwea : 12; /* PCI window end address */ unsigned ka0902_iio$v_wbase4_ppe : 1; /* PCI peer-to-peer enable */ unsigned ka0902_iio$v_wbase4_fill1 : 5; unsigned ka0902_iio$v_wbase4_sge : 1; /* PCI Scatter-Gather enabled */ unsigned ka0902_iio$v_wbase4_pwe : 1; /* PCI window enable */ unsigned ka0902_iio$v_wbase4_pwsa : 12; /* PCI window start address */ } ka0902_iio$r_wbase4_l_bits; } ka0902_iio$r_wbase4_fields_l_ol; __union { unsigned int ka0902_iio$l_wbase4_h; __struct { unsigned ka0902_iio$v_wbase4_fill3 : 32; } ka0902_iio$r_wbase4_h_bits; } ka0902_iio$r_wbase4_fields_h_ol; } ka0902_iio$r_wbase4_fields; } ka0902_iio$r_wbase4_ol; char ka0902_iio$b_fill261 [24]; /* PCI Window mask register 4 */ /* added for T4 */ __union { __int64 ka0902_iio$q_wmask4; __struct { __union { unsigned int ka0902_iio$l_wmask4_l; __struct { unsigned ka0902_iio$v_wmask4_fill1 : 20; unsigned ka0902_iio$v_wmask4_pwm : 11; /* PCI window mask */ unsigned ka0902_iio$v_wmask4_fill2 : 1; } ka0902_iio$r_wmask4_l_bits; } ka0902_iio$r_wmask4_fields_l_ol; __union { unsigned int ka0902_iio$l_wmask4_h; __struct { unsigned ka0902_iio$v_wmask4_fill3 : 32; } ka0902_iio$r_wmask4_h_bits; } ka0902_iio$r_wmask4_fields_h_ol; } ka0902_iio$r_wmask4_fields; } ka0902_iio$r_wmask4_ol; char ka0902_iio$b_fill262 [24]; /* PCI Translated Base register 4 */ /* added for T4 */ __union { __int64 ka0902_iio$q_tbase4; __struct { __union { unsigned int ka0902_iio$l_tbase4_l; __struct { unsigned ka0902_iio$v_tbase4_fill1 : 9; unsigned ka0902_iio$v_tbase4_tba : 22; /* PCI Translated Base */ unsigned ka0902_iio$v_tbase4_fill2 : 1; } ka0902_iio$r_tbase4_l_bits; } ka0902_iio$r_tbase4_fields_l_ol; __union { unsigned int ka0902_iio$l_tbase4_h; __struct { unsigned ka0902_iio$v_tbase4_fill3 : 32; } ka0902_iio$r_tbase4_h_bits; } ka0902_iio$r_tbase4_fields_h_ol; } ka0902_iio$r_tbase4_fields; } ka0902_iio$r_tbase4_ol; char ka0902_iio$b_fill263 [24]; /* PCI IC Interrupt Controller Address Indirection Register */ /* Load with offset of desired configuration register */ /* See ICIC spec for definition */ __union { __int64 ka0902_iio$q_air; __struct { __union { unsigned int ka0902_iio$l_air_l; __struct { unsigned ka0902_iio$v_air_fill2 : 32; } ka0902_iio$r_air_l_bits; } ka0902_iio$r_air_fields_l_ol; __union { unsigned int ka0902_iio$l_air_h; __struct { unsigned ka0902_iio$v_air_fill3 : 32; } ka0902_iio$r_air_h_bits; } ka0902_iio$r_air_fields_h_ol; } ka0902_iio$r_air_fields; } ka0902_iio$r_air_ol; char ka0902_iio$b_fill264 [24]; /* PCI IC Interrupt Controller Vector Register */ /* Read to obtain the 8-bit interrupt vector. */ /* Write to cause an SEOI to the vector indicated by the low 6 bits. */ __union { __int64 ka0902_iio$q_vector; __struct { __union { unsigned int ka0902_iio$l_vector_l; __struct { unsigned ka0902_iio$v_vector_fill2 : 32; } ka0902_iio$r_vector_l_bits; } ka0902_iio$r_vector_fields_l_ol; __union { unsigned int ka0902_iio$l_vector_h; __struct { unsigned ka0902_iio$v_vector_fill3 : 32; } ka0902_iio$r_vector_h_bits; } ka0902_iio$r_vector_fields_h_ol; } ka0902_iio$r_vector_fields; } ka0902_iio$r_vector_ol; char ka0902_iio$b_fill265 [24]; /* PCI IC Interrupt Controller Data Indirection Register */ /* Read or write DIR to access configuration register */ /* identified by AIR. See ICIC spec for details. */ __union { __int64 ka0902_iio$q_dir; __struct { __union { unsigned int ka0902_iio$l_dir_l; __struct { unsigned ka0902_iio$v_dir_fill2 : 32; } ka0902_iio$r_dir_l_bits; } ka0902_iio$r_dir_fields_l_ol; __union { unsigned int ka0902_iio$l_dir_h; __struct { unsigned ka0902_iio$v_dir_fill3 : 32; } ka0902_iio$r_dir_h_bits; } ka0902_iio$r_dir_fields_h_ol; } ka0902_iio$r_dir_fields; } ka0902_iio$r_dir_ol; char ka0902_iio$b_fill266 [24]; /* PCI IC Interrupt Controller setup register */ /* added for T3 and T4 */ /* See ICIC spec for definition */ __union { __int64 ka0902_iio$q_icic; __struct { __union { unsigned int ka0902_iio$l_icic_l; __struct { unsigned ka0902_iio$v_icic_flush_addr : 24; /* EISA flush address */ unsigned ka0902_iio$v_icic_enable : 1; /* Enable ICIC */ unsigned ka0902_iio$v_icic_clock : 1; /* Fast/slow clock */ unsigned ka0902_iio$v_icic_fill2 : 6; } ka0902_iio$r_icic_l_bits; } ka0902_iio$r_icic_fields_l_ol; __union { unsigned int ka0902_iio$l_icic_h; __struct { unsigned ka0902_iio$v_icic_fill3 : 32; } ka0902_iio$r_icic_h_bits; } ka0902_iio$r_icic_fields_h_ol; } ka0902_iio$r_icic_fields; } ka0902_iio$r_icic_ol; char ka0902_iio$b_fill267 [24]; } KA0902_IIO; #if !defined(__VAXC) #define ka0902_iio$q_iocsr ka0902_iio$r_iocsr_ol.ka0902_iio$q_iocsr #define ka0902_iio$l_iocsr_l ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$l_iocsr_l #define ka0902_iio$v_iocsr_en_lden ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocs\ r_l_bits.ka0902_iio$v_iocsr_en_lden #define ka0902_iio$v_iocsr_el ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l_b\ its.ka0902_iio$v_iocsr_el #define ka0902_iio$v_iocsr_esmv ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_esmv #define ka0902_iio$v_iocsr_pdbp ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_pdbp #define ka0902_iio$v_iocsr_pciprst0 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_ioc\ sr_l_bits.ka0902_iio$v_iocsr_pciprst0 #define ka0902_iio$v_iocsr_pciprst1 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_ioc\ sr_l_bits.ka0902_iio$v_iocsr_pciprst1 #define ka0902_iio$v_iocsr_int ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l_\ bits.ka0902_iio$v_iocsr_int #define ka0902_iio$v_iocsr_tlbee ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_\ l_bits.ka0902_iio$v_iocsr_tlbee #define ka0902_iio$v_iocsr_cxack ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_\ l_bits.ka0902_iio$v_iocsr_cxack #define ka0902_iio$v_iocsr_fill2 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_\ l_bits.ka0902_iio$v_iocsr_fill2 #define ka0902_iio$v_iocsr_exex ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_exex #define ka0902_iio$v_iocsr_fill3 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_\ l_bits.ka0902_iio$v_iocsr_fill3 #define ka0902_iio$v_iocsr_cawwp0 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr\ _l_bits.ka0902_iio$v_iocsr_cawwp0 #define ka0902_iio$v_iocsr_cawwp2 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr\ _l_bits.ka0902_iio$v_iocsr_cawwp2 #define ka0902_iio$v_iocsr_dwwpe ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_\ l_bits.ka0902_iio$v_iocsr_dwwpe #define ka0902_iio$v_iocsr_mba5 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_mba5 #define ka0902_iio$v_iocsr_mba6 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_mba6 #define ka0902_iio$v_iocsr_mba7 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_mba7 #define ka0902_iio$v_iocsr_pciprst3 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_ioc\ sr_l_bits.ka0902_iio$v_iocsr_pciprst3 #define ka0902_iio$v_iocsr_pciprst4 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_ioc\ sr_l_bits.ka0902_iio$v_iocsr_pciprst4 #define ka0902_iio$v_iocsr_pdwwp1 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr\ _l_bits.ka0902_iio$v_iocsr_pdwwp1 #define ka0902_iio$v_iocsr_pdwwp0 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr\ _l_bits.ka0902_iio$v_iocsr_pdwwp0 #define ka0902_iio$v_iocsr_pbr ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l_\ bits.ka0902_iio$v_iocsr_pbr #define ka0902_iio$v_iocsr_pir ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l_\ bits.ka0902_iio$v_iocsr_pir #define ka0902_iio$v_iocsr_encoi ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_\ l_bits.ka0902_iio$v_iocsr_encoi #define ka0902_iio$v_iocsr_epms ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_epms #define ka0902_iio$v_iocsr_etlb ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_etlb #define ka0902_iio$v_iocsr_eacc ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_eacc #define ka0902_iio$v_iocsr_ftlb ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_ftlb #define ka0902_iio$v_iocsr_ecpc ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l\ _bits.ka0902_iio$v_iocsr_ecpc #define ka0902_iio$v_iocsr_cir ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l_\ bits.ka0902_iio$v_iocsr_cir #define ka0902_iio$v_iocsr_epl ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_l_ol.ka0902_iio$r_iocsr_l_\ bits.ka0902_iio$v_iocsr_epl #define ka0902_iio$l_iocsr_h ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$l_iocsr_h #define ka0902_iio$v_iocsr_cbbce ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_cbbce #define ka0902_iio$v_iocsr_trn ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h_\ bits.ka0902_iio$v_iocsr_trn #define ka0902_iio$v_iocsr_smvl ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h\ _bits.ka0902_iio$v_iocsr_smvl #define ka0902_iio$v_iocsr_mba4 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h\ _bits.ka0902_iio$v_iocsr_mba4 #define ka0902_iio$v_iocsr_epr ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h_\ bits.ka0902_iio$v_iocsr_epr #define ka0902_iio$v_iocsr_rdpe64 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr\ _h_bits.ka0902_iio$v_iocsr_rdpe64 #define ka0902_iio$v_iocsr_adpe64 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr\ _h_bits.ka0902_iio$v_iocsr_adpe64 #define ka0902_iio$v_iocsr_wdpe64 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr\ _h_bits.ka0902_iio$v_iocsr_wdpe64 #define ka0902_iio$v_iocsr_cawwp1 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr\ _h_bits.ka0902_iio$v_iocsr_cawwp1 #define ka0902_iio$v_iocsr_cawwp3 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr\ _h_bits.ka0902_iio$v_iocsr_cawwp3 #define ka0902_iio$v_iocsr_dwwpo ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_dwwpo #define ka0902_iio$v_iocsr_t24st ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_t24st #define ka0902_iio$v_iocsr_ppc1 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h\ _bits.ka0902_iio$v_iocsr_ppc1 #define ka0902_iio$v_iocsr_ppc2 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h\ _bits.ka0902_iio$v_iocsr_ppc2 #define ka0902_iio$v_iocsr_stall ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_stall #define ka0902_iio$v_iocsr_fill4 ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_fill4 #define ka0902_iio$v_iocsr_prm ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h_\ bits.ka0902_iio$v_iocsr_prm #define ka0902_iio$v_iocsr_pwm ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_h_\ bits.ka0902_iio$v_iocsr_pwm #define ka0902_iio$v_iocsr_fprdped ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocs\ r_h_bits.ka0902_iio$v_iocsr_fprdped #define ka0902_iio$v_iocsr_fpadped ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocs\ r_h_bits.ka0902_iio$v_iocsr_fpadped #define ka0902_iio$v_iocsr_fpwdped ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocs\ r_h_bits.ka0902_iio$v_iocsr_fpwdped #define ka0902_iio$v_iocsr_epnmi ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_epnmi #define ka0902_iio$v_iocsr_epdti ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_epdti #define ka0902_iio$v_iocsr_epsei ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_epsei #define ka0902_iio$v_iocsr_eppei ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_eppei #define ka0902_iio$v_iocsr_erdpc ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_erdpc #define ka0902_iio$v_iocsr_epadpc ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr\ _h_bits.ka0902_iio$v_iocsr_epadpc #define ka0902_iio$v_iocsr_ewdpc ka0902_iio$r_iocsr_ol.ka0902_iio$r_iocsr_fields.ka0902_iio$r_iocsr_fields_h_ol.ka0902_iio$r_iocsr_\ h_bits.ka0902_iio$v_iocsr_ewdpc #define ka0902_iio$q_cerr1 ka0902_iio$r_cerr1_ol.ka0902_iio$q_cerr1 #define ka0902_iio$l_cerr1_l ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$l_cerr1_l #define ka0902_iio$v_cerr1_ure ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l_\ bits.ka0902_iio$v_cerr1_ure #define ka0902_iio$v_cerr1_nae ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l_\ bits.ka0902_iio$v_cerr1_nae #define ka0902_iio$v_cerr1_cape ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l\ _bits.ka0902_iio$v_cerr1_cape #define ka0902_iio$v_cerr1_mcape ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_\ l_bits.ka0902_iio$v_cerr1_mcape #define ka0902_iio$v_cerr1_rwdpe ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_\ l_bits.ka0902_iio$v_cerr1_rwdpe #define ka0902_iio$v_cerr1_mwrpe ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_\ l_bits.ka0902_iio$v_cerr1_mwrpe #define ka0902_iio$v_cerr1_rdpe ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l\ _bits.ka0902_iio$v_cerr1_rdpe #define ka0902_iio$v_cerr1_mrdpe ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_\ l_bits.ka0902_iio$v_cerr1_mrdpe #define ka0902_iio$v_cerr1_cape0 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_\ l_bits.ka0902_iio$v_cerr1_cape0 #define ka0902_iio$v_cerr1_cape2 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_\ l_bits.ka0902_iio$v_cerr1_cape2 #define ka0902_iio$v_cerr1_dpe0 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l\ _bits.ka0902_iio$v_cerr1_dpe0 #define ka0902_iio$v_cerr1_dpe2 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l\ _bits.ka0902_iio$v_cerr1_dpe2 #define ka0902_iio$v_cerr1_dpe4 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l\ _bits.ka0902_iio$v_cerr1_dpe4 #define ka0902_iio$v_cerr1_dpe6 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l\ _bits.ka0902_iio$v_cerr1_dpe6 #define ka0902_iio$v_cerr1_cwdp ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l\ _bits.ka0902_iio$v_cerr1_cwdp #define ka0902_iio$v_cerr1_bse ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_l_\ bits.ka0902_iio$v_cerr1_bse #define ka0902_iio$v_cerr1_ipfne ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_l_ol.ka0902_iio$r_cerr1_\ l_bits.ka0902_iio$v_cerr1_ipfne #define ka0902_iio$l_cerr1_h ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_h_ol.ka0902_iio$l_cerr1_h #define ka0902_iio$v_cerr1_cape1 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_h_ol.ka0902_iio$r_cerr1_\ h_bits.ka0902_iio$v_cerr1_cape1 #define ka0902_iio$v_cerr1_cape3 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_h_ol.ka0902_iio$r_cerr1_\ h_bits.ka0902_iio$v_cerr1_cape3 #define ka0902_iio$v_cerr1_dpe1 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_h_ol.ka0902_iio$r_cerr1_h\ _bits.ka0902_iio$v_cerr1_dpe1 #define ka0902_iio$v_cerr1_dpe3 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_h_ol.ka0902_iio$r_cerr1_h\ _bits.ka0902_iio$v_cerr1_dpe3 #define ka0902_iio$v_cerr1_dpe5 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_h_ol.ka0902_iio$r_cerr1_h\ _bits.ka0902_iio$v_cerr1_dpe5 #define ka0902_iio$v_cerr1_dpe7 ka0902_iio$r_cerr1_ol.ka0902_iio$r_cerr1_fields.ka0902_iio$r_cerr1_fields_h_ol.ka0902_iio$r_cerr1_h\ _bits.ka0902_iio$v_cerr1_dpe7 #define ka0902_iio$q_cerr2 ka0902_iio$r_cerr2_overlay.ka0902_iio$q_cerr2 #define ka0902_iio$l_cerr2_l ka0902_iio$r_cerr2_overlay.ka0902_iio$r_cerr2_bits.ka0902_iio$l_cerr2_l #define ka0902_iio$l_cerr2_h ka0902_iio$r_cerr2_overlay.ka0902_iio$r_cerr2_bits.ka0902_iio$l_cerr2_h #define ka0902_iio$q_cerr3 ka0902_iio$r_cerr3_overlay.ka0902_iio$q_cerr3 #define ka0902_iio$v_cerr3_l ka0902_iio$r_cerr3_overlay.ka0902_iio$r_cerr3_bits.ka0902_iio$v_cerr3_l #define ka0902_iio$v_cerr3_h ka0902_iio$r_cerr3_overlay.ka0902_iio$r_cerr3_bits.ka0902_iio$v_cerr3_h #define ka0902_iio$q_perr1 ka0902_iio$r_perr1_ol.ka0902_iio$q_perr1 #define ka0902_iio$l_perr1_l ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$l_perr1_l #define ka0902_iio$v_perr1_pwdpe ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_\ l_bits.ka0902_iio$v_perr1_pwdpe #define ka0902_iio$v_perr1_pape ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_l\ _bits.ka0902_iio$v_perr1_pape #define ka0902_iio$v_perr1_prdpe ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_\ l_bits.ka0902_iio$v_perr1_prdpe #define ka0902_iio$v_perr1_ppe ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_l_\ bits.ka0902_iio$v_perr1_ppe #define ka0902_iio$v_perr1_pse ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_l_\ bits.ka0902_iio$v_perr1_pse #define ka0902_iio$v_perr1_pdte ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_l\ _bits.ka0902_iio$v_perr1_pdte #define ka0902_iio$v_perr1_nmi ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_l_\ bits.ka0902_iio$v_perr1_nmi #define ka0902_iio$v_perr1_ppcse ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_\ l_bits.ka0902_iio$v_perr1_ppcse #define ka0902_iio$v_perr1_wdpe64 ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1\ _l_bits.ka0902_iio$v_perr1_wdpe64 #define ka0902_iio$v_perr1_adpe64 ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1\ _l_bits.ka0902_iio$v_perr1_adpe64 #define ka0902_iio$v_perr1_rdpe64 ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1\ _l_bits.ka0902_iio$v_perr1_rdpe64 #define ka0902_iio$v_perr1_ta ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_l_b\ its.ka0902_iio$v_perr1_ta #define ka0902_iio$v_perr1_prdpe64 ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr\ 1_l_bits.ka0902_iio$v_perr1_prdpe64 #define ka0902_iio$v_perr1_padpe64 ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr\ 1_l_bits.ka0902_iio$v_perr1_padpe64 #define ka0902_iio$v_perr1_pwdpe64 ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr\ 1_l_bits.ka0902_iio$v_perr1_pwdpe64 #define ka0902_iio$v_perr1_pta ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_l_ol.ka0902_iio$r_perr1_l_\ bits.ka0902_iio$v_perr1_pta #define ka0902_iio$l_perr1_h ka0902_iio$r_perr1_ol.ka0902_iio$r_perr1_fields.ka0902_iio$r_perr1_fields_h_ol.ka0902_iio$l_perr1_h #define ka0902_iio$q_perr2 ka0902_iio$r_perr2_ol.ka0902_iio$q_perr2 #define ka0902_iio$l_perr2_l ka0902_iio$r_perr2_ol.ka0902_iio$r_perr2_fields.ka0902_iio$r_perr2_fields_l_ol.ka0902_iio$l_perr2_l #define ka0902_iio$v_perr2_pea ka0902_iio$r_perr2_ol.ka0902_iio$r_perr2_fields.ka0902_iio$r_perr2_fields_l_ol.ka0902_iio$r_perr2_l_\ bits.ka0902_iio$v_perr2_pea #define ka0902_iio$l_perr2_h ka0902_iio$r_perr2_ol.ka0902_iio$r_perr2_fields.ka0902_iio$r_perr2_fields_h_ol.ka0902_iio$l_perr2_h #define ka0902_iio$v_perr2_pec ka0902_iio$r_perr2_ol.ka0902_iio$r_perr2_fields.ka0902_iio$r_perr2_fields_h_ol.ka0902_iio$r_perr2_h_\ bits.ka0902_iio$v_perr2_pec #define ka0902_iio$q_pscm ka0902_iio$r_pscm_overlay.ka0902_iio$q_pscm #define ka0902_iio$v_pscm_l ka0902_iio$r_pscm_overlay.ka0902_iio$r_pscm_bits.ka0902_iio$v_pscm_l #define ka0902_iio$v_pscm_h ka0902_iio$r_pscm_overlay.ka0902_iio$r_pscm_bits.ka0902_iio$v_pscm_h #define ka0902_iio$q_hae1 ka0902_iio$r_hae1_ol.ka0902_iio$q_hae1 #define ka0902_iio$l_hae1_l ka0902_iio$r_hae1_ol.ka0902_iio$r_hae1_fields.ka0902_iio$r_hae1_fields_l_ol.ka0902_iio$l_hae1_l #define ka0902_iio$v_hae1_pua1 ka0902_iio$r_hae1_ol.ka0902_iio$r_hae1_fields.ka0902_iio$r_hae1_fields_l_ol.ka0902_iio$r_hae1_l_bits\ .ka0902_iio$v_hae1_pua1 #define ka0902_iio$v_hae1_pua_bit26 ka0902_iio$r_hae1_ol.ka0902_iio$r_hae1_fields.ka0902_iio$r_hae1_fields_l_ol.ka0902_iio$r_hae1_l\ _bits.ka0902_iio$v_hae1_pua_bit26 #define ka0902_iio$l_hae1_h ka0902_iio$r_hae1_ol.ka0902_iio$r_hae1_fields.ka0902_iio$r_hae1_fields_h_ol.ka0902_iio$l_hae1_h #define ka0902_iio$q_hae2 ka0902_iio$r_hae2_ol.ka0902_iio$q_hae2 #define ka0902_iio$l_hae2_l ka0902_iio$r_hae2_ol.ka0902_iio$r_hae2_fields.ka0902_iio$r_hae2_fields_l_ol.ka0902_iio$l_hae2_l #define ka0902_iio$v_hae2_pua2 ka0902_iio$r_hae2_ol.ka0902_iio$r_hae2_fields.ka0902_iio$r_hae2_fields_l_ol.ka0902_iio$r_hae2_l_bits\ .ka0902_iio$v_hae2_pua2 #define ka0902_iio$v_hae2_pua1 ka0902_iio$r_hae2_ol.ka0902_iio$r_hae2_fields.ka0902_iio$r_hae2_fields_l_ol.ka0902_iio$r_hae2_l_bits\ .ka0902_iio$v_hae2_pua1 #define ka0902_iio$l_hae2_h ka0902_iio$r_hae2_ol.ka0902_iio$r_hae2_fields.ka0902_iio$r_hae2_fields_h_ol.ka0902_iio$l_hae2_h #define ka0902_iio$q_hbase ka0902_iio$r_hbase_ol.ka0902_iio$q_hbase #define ka0902_iio$l_hbase_l ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$l_hbase_l #define ka0902_iio$v_hbase_phea ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase_l\ _bits.ka0902_iio$v_hbase_phea #define ka0902_iio$v_hbase_phe1 ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase_l\ _bits.ka0902_iio$v_hbase_phe1 #define ka0902_iio$v_hbase_phe2 ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase_l\ _bits.ka0902_iio$v_hbase_phe2 #define ka0902_iio$v_hbase_phsa ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase_l\ _bits.ka0902_iio$v_hbase_phsa #define ka0902_iio$v_hbase_r0_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r0_ena #define ka0902_iio$v_hbase_r1_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r1_ena #define ka0902_iio$v_hbase_r2_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r2_ena #define ka0902_iio$v_hbase_r3_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r3_ena #define ka0902_iio$v_hbase_r4_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r4_ena #define ka0902_iio$v_hbase_r5_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r5_ena #define ka0902_iio$v_hbase_r6_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r6_ena #define ka0902_iio$v_hbase_r7_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_l_ol.ka0902_iio$r_hbase\ _l_bits.ka0902_iio$v_hbase_r7_ena #define ka0902_iio$l_hbase_h ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$l_hbase_h #define ka0902_iio$v_hbase_r8_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$r_hbase\ _h_bits.ka0902_iio$v_hbase_r8_ena #define ka0902_iio$v_hbase_r9_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$r_hbase\ _h_bits.ka0902_iio$v_hbase_r9_ena #define ka0902_iio$v_hbase_r10_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$r_hbas\ e_h_bits.ka0902_iio$v_hbase_r10_ena #define ka0902_iio$v_hbase_r11_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$r_hbas\ e_h_bits.ka0902_iio$v_hbase_r11_ena #define ka0902_iio$v_hbase_r12_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$r_hbas\ e_h_bits.ka0902_iio$v_hbase_r12_ena #define ka0902_iio$v_hbase_r13_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$r_hbas\ e_h_bits.ka0902_iio$v_hbase_r13_ena #define ka0902_iio$v_hbase_r14_ena ka0902_iio$r_hbase_ol.ka0902_iio$r_hbase_fields.ka0902_iio$r_hbase_fields_h_ol.ka0902_iio$r_hbas\ e_h_bits.ka0902_iio$v_hbase_r14_ena #define ka0902_iio$q_wbase1 ka0902_iio$r_wbase1_ol.ka0902_iio$q_wbase1 #define ka0902_iio$l_wbase1_l ka0902_iio$r_wbase1_ol.ka0902_iio$r_wbase1_fields.ka0902_iio$r_wbase1_fields_l_ol.ka0902_iio$l_wbase1\ _l #define ka0902_iio$v_wbase1_pwea ka0902_iio$r_wbase1_ol.ka0902_iio$r_wbase1_fields.ka0902_iio$r_wbase1_fields_l_ol.ka0902_iio$r_wba\ se1_l_bits.ka0902_iio$v_wbase1_pwea #define ka0902_iio$v_wbase1_ppe ka0902_iio$r_wbase1_ol.ka0902_iio$r_wbase1_fields.ka0902_iio$r_wbase1_fields_l_ol.ka0902_iio$r_wbas\ e1_l_bits.ka0902_iio$v_wbase1_ppe #define ka0902_iio$v_wbase1_sge ka0902_iio$r_wbase1_ol.ka0902_iio$r_wbase1_fields.ka0902_iio$r_wbase1_fields_l_ol.ka0902_iio$r_wbas\ e1_l_bits.ka0902_iio$v_wbase1_sge #define ka0902_iio$v_wbase1_pwe ka0902_iio$r_wbase1_ol.ka0902_iio$r_wbase1_fields.ka0902_iio$r_wbase1_fields_l_ol.ka0902_iio$r_wbas\ e1_l_bits.ka0902_iio$v_wbase1_pwe #define ka0902_iio$v_wbase1_pwsa ka0902_iio$r_wbase1_ol.ka0902_iio$r_wbase1_fields.ka0902_iio$r_wbase1_fields_l_ol.ka0902_iio$r_wba\ se1_l_bits.ka0902_iio$v_wbase1_pwsa #define ka0902_iio$l_wbase1_h ka0902_iio$r_wbase1_ol.ka0902_iio$r_wbase1_fields.ka0902_iio$r_wbase1_fields_h_ol.ka0902_iio$l_wbase1\ _h #define ka0902_iio$q_wmask1 ka0902_iio$r_wmask1_ol.ka0902_iio$q_wmask1 #define ka0902_iio$l_wmask1_l ka0902_iio$r_wmask1_ol.ka0902_iio$r_wmask1_fields.ka0902_iio$r_wmask1_fields_l_ol.ka0902_iio$l_wmask1\ _l #define ka0902_iio$v_wmask1_pwm ka0902_iio$r_wmask1_ol.ka0902_iio$r_wmask1_fields.ka0902_iio$r_wmask1_fields_l_ol.ka0902_iio$r_wmas\ k1_l_bits.ka0902_iio$v_wmask1_pwm #define ka0902_iio$l_wmask1_h ka0902_iio$r_wmask1_ol.ka0902_iio$r_wmask1_fields.ka0902_iio$r_wmask1_fields_h_ol.ka0902_iio$l_wmask1\ _h #define ka0902_iio$q_tbase1 ka0902_iio$r_tbase1_ol.ka0902_iio$q_tbase1 #define ka0902_iio$l_tbase1_l ka0902_iio$r_tbase1_ol.ka0902_iio$r_tbase1_fields.ka0902_iio$r_tbase1_fields_l_ol.ka0902_iio$l_tbase1\ _l #define ka0902_iio$v_tbase1_tba ka0902_iio$r_tbase1_ol.ka0902_iio$r_tbase1_fields.ka0902_iio$r_tbase1_fields_l_ol.ka0902_iio$r_tbas\ e1_l_bits.ka0902_iio$v_tbase1_tba #define ka0902_iio$l_tbase1_h ka0902_iio$r_tbase1_ol.ka0902_iio$r_tbase1_fields.ka0902_iio$r_tbase1_fields_h_ol.ka0902_iio$l_tbase1\ _h #define ka0902_iio$q_wbase2 ka0902_iio$r_wbase2_ol.ka0902_iio$q_wbase2 #define ka0902_iio$l_wbase2_l ka0902_iio$r_wbase2_ol.ka0902_iio$r_wbase2_fields.ka0902_iio$r_wbase2_fields_l_ol.ka0902_iio$l_wbase2\ _l #define ka0902_iio$v_wbase2_pwea ka0902_iio$r_wbase2_ol.ka0902_iio$r_wbase2_fields.ka0902_iio$r_wbase2_fields_l_ol.ka0902_iio$r_wba\ se2_l_bits.ka0902_iio$v_wbase2_pwea #define ka0902_iio$v_wbase2_ppe ka0902_iio$r_wbase2_ol.ka0902_iio$r_wbase2_fields.ka0902_iio$r_wbase2_fields_l_ol.ka0902_iio$r_wbas\ e2_l_bits.ka0902_iio$v_wbase2_ppe #define ka0902_iio$v_wbase2_sge ka0902_iio$r_wbase2_ol.ka0902_iio$r_wbase2_fields.ka0902_iio$r_wbase2_fields_l_ol.ka0902_iio$r_wbas\ e2_l_bits.ka0902_iio$v_wbase2_sge #define ka0902_iio$v_wbase2_pwe ka0902_iio$r_wbase2_ol.ka0902_iio$r_wbase2_fields.ka0902_iio$r_wbase2_fields_l_ol.ka0902_iio$r_wbas\ e2_l_bits.ka0902_iio$v_wbase2_pwe #define ka0902_iio$v_wbase2_pwsa ka0902_iio$r_wbase2_ol.ka0902_iio$r_wbase2_fields.ka0902_iio$r_wbase2_fields_l_ol.ka0902_iio$r_wba\ se2_l_bits.ka0902_iio$v_wbase2_pwsa #define ka0902_iio$l_wbase2_h ka0902_iio$r_wbase2_ol.ka0902_iio$r_wbase2_fields.ka0902_iio$r_wbase2_fields_h_ol.ka0902_iio$l_wbase2\ _h #define ka0902_iio$q_wmask2 ka0902_iio$r_wmask2_ol.ka0902_iio$q_wmask2 #define ka0902_iio$l_wmask2_l ka0902_iio$r_wmask2_ol.ka0902_iio$r_wmask2_fields.ka0902_iio$r_wmask2_fields_l_ol.ka0902_iio$l_wmask2\ _l #define ka0902_iio$v_wmask2_pwm ka0902_iio$r_wmask2_ol.ka0902_iio$r_wmask2_fields.ka0902_iio$r_wmask2_fields_l_ol.ka0902_iio$r_wmas\ k2_l_bits.ka0902_iio$v_wmask2_pwm #define ka0902_iio$l_wmask2_h ka0902_iio$r_wmask2_ol.ka0902_iio$r_wmask2_fields.ka0902_iio$r_wmask2_fields_h_ol.ka0902_iio$l_wmask2\ _h #define ka0902_iio$q_tbase2 ka0902_iio$r_tbase2_ol.ka0902_iio$q_tbase2 #define ka0902_iio$l_tbase2_l ka0902_iio$r_tbase2_ol.ka0902_iio$r_tbase2_fields.ka0902_iio$r_tbase2_fields_l_ol.ka0902_iio$l_tbase2\ _l #define ka0902_iio$v_tbase2_tba ka0902_iio$r_tbase2_ol.ka0902_iio$r_tbase2_fields.ka0902_iio$r_tbase2_fields_l_ol.ka0902_iio$r_tbas\ e2_l_bits.ka0902_iio$v_tbase2_tba #define ka0902_iio$l_tbase2_h ka0902_iio$r_tbase2_ol.ka0902_iio$r_tbase2_fields.ka0902_iio$r_tbase2_fields_h_ol.ka0902_iio$l_tbase2\ _h #define ka0902_iio$q_tlbbr ka0902_iio$r_tlbbr_ol.ka0902_iio$q_tlbbr #define ka0902_iio$l_tlbbr_l ka0902_iio$r_tlbbr_ol.ka0902_iio$r_tlbbr_fields.ka0902_iio$r_tlbbr_fields_l_ol.ka0902_iio$l_tlbbr_l #define ka0902_iio$v_tlbbr_tlbbv ka0902_iio$r_tlbbr_ol.ka0902_iio$r_tlbbr_fields.ka0902_iio$r_tlbbr_fields_l_ol.ka0902_iio$r_tlbbr_\ l_bits.ka0902_iio$v_tlbbr_tlbbv #define ka0902_iio$v_tlbbr_tlbbd ka0902_iio$r_tlbbr_ol.ka0902_iio$r_tlbbr_fields.ka0902_iio$r_tlbbr_fields_l_ol.ka0902_iio$r_tlbbr_\ l_bits.ka0902_iio$v_tlbbr_tlbbd #define ka0902_iio$l_tlbbr_h ka0902_iio$r_tlbbr_ol.ka0902_iio$r_tlbbr_fields.ka0902_iio$r_tlbbr_fields_h_ol.ka0902_iio$l_tlbbr_h #define ka0902_iio$q_ivrpr ka0902_iio$r_ivrpr_ol.ka0902_iio$q_ivrpr #define ka0902_iio$l_ivrpr_l ka0902_iio$r_ivrpr_ol.ka0902_iio$r_ivrpr_fields.ka0902_iio$r_ivrpr_fields_l_ol.ka0902_iio$l_ivrpr_l #define ka0902_iio$v_ivrpr_prvect ka0902_iio$r_ivrpr_ol.ka0902_iio$r_ivrpr_fields.ka0902_iio$r_ivrpr_fields_l_ol.ka0902_iio$r_ivrpr\ _l_bits.ka0902_iio$v_ivrpr_prvect #define ka0902_iio$l_ivrpr_h ka0902_iio$r_ivrpr_ol.ka0902_iio$r_ivrpr_fields.ka0902_iio$r_ivrpr_fields_h_ol.ka0902_iio$l_ivrpr_h #define ka0902_iio$v_ivrpr_ia ka0902_iio$r_ivrpr_ol.ka0902_iio$r_ivrpr_fields.ka0902_iio$r_ivrpr_fields_h_ol.ka0902_iio$r_ivrpr_h_b\ its.ka0902_iio$v_ivrpr_ia #define ka0902_iio$q_hae3 ka0902_iio$r_hae3_ol.ka0902_iio$q_hae3 #define ka0902_iio$l_hae3_l ka0902_iio$r_hae3_ol.ka0902_iio$r_hae3_fields.ka0902_iio$r_hae3_fields_l_ol.ka0902_iio$l_hae3_l #define ka0902_iio$v_hae3_cfg_type ka0902_iio$r_hae3_ol.ka0902_iio$r_hae3_fields.ka0902_iio$r_hae3_fields_l_ol.ka0902_iio$r_hae3_l_\ bits.ka0902_iio$v_hae3_cfg_type #define ka0902_iio$l_hae3_h ka0902_iio$r_hae3_ol.ka0902_iio$r_hae3_fields.ka0902_iio$r_hae3_fields_h_ol.ka0902_iio$l_hae3_h #define ka0902_iio$q_hae4 ka0902_iio$r_hae4_ol.ka0902_iio$q_hae4 #define ka0902_iio$l_hae4_l ka0902_iio$r_hae4_ol.ka0902_iio$r_hae4_fields.ka0902_iio$r_hae4_fields_l_ol.ka0902_iio$l_hae4_l #define ka0902_iio$v_hae4_pua ka0902_iio$r_hae4_ol.ka0902_iio$r_hae4_fields.ka0902_iio$r_hae4_fields_l_ol.ka0902_iio$r_hae4_l_bits.\ ka0902_iio$v_hae4_pua #define ka0902_iio$l_hae4_h ka0902_iio$r_hae4_ol.ka0902_iio$r_hae4_fields.ka0902_iio$r_hae4_fields_h_ol.ka0902_iio$l_hae4_h #define ka0902_iio$q_wbase3 ka0902_iio$r_wbase3_ol.ka0902_iio$q_wbase3 #define ka0902_iio$l_wbase3_l ka0902_iio$r_wbase3_ol.ka0902_iio$r_wbase3_fields.ka0902_iio$r_wbase3_fields_l_ol.ka0902_iio$l_wbase3\ _l #define ka0902_iio$v_wbase3_pwea ka0902_iio$r_wbase3_ol.ka0902_iio$r_wbase3_fields.ka0902_iio$r_wbase3_fields_l_ol.ka0902_iio$r_wba\ se3_l_bits.ka0902_iio$v_wbase3_pwea #define ka0902_iio$v_wbase3_ppe ka0902_iio$r_wbase3_ol.ka0902_iio$r_wbase3_fields.ka0902_iio$r_wbase3_fields_l_ol.ka0902_iio$r_wbas\ e3_l_bits.ka0902_iio$v_wbase3_ppe #define ka0902_iio$v_wbase3_sge ka0902_iio$r_wbase3_ol.ka0902_iio$r_wbase3_fields.ka0902_iio$r_wbase3_fields_l_ol.ka0902_iio$r_wbas\ e3_l_bits.ka0902_iio$v_wbase3_sge #define ka0902_iio$v_wbase3_pwe ka0902_iio$r_wbase3_ol.ka0902_iio$r_wbase3_fields.ka0902_iio$r_wbase3_fields_l_ol.ka0902_iio$r_wbas\ e3_l_bits.ka0902_iio$v_wbase3_pwe #define ka0902_iio$v_wbase3_pwsa ka0902_iio$r_wbase3_ol.ka0902_iio$r_wbase3_fields.ka0902_iio$r_wbase3_fields_l_ol.ka0902_iio$r_wba\ se3_l_bits.ka0902_iio$v_wbase3_pwsa #define ka0902_iio$l_wbase3_h ka0902_iio$r_wbase3_ol.ka0902_iio$r_wbase3_fields.ka0902_iio$r_wbase3_fields_h_ol.ka0902_iio$l_wbase3\ _h #define ka0902_iio$q_wmask3 ka0902_iio$r_wmask3_ol.ka0902_iio$q_wmask3 #define ka0902_iio$l_wmask3_l ka0902_iio$r_wmask3_ol.ka0902_iio$r_wmask3_fields.ka0902_iio$r_wmask3_fields_l_ol.ka0902_iio$l_wmask3\ _l #define ka0902_iio$v_wmask3_pwm ka0902_iio$r_wmask3_ol.ka0902_iio$r_wmask3_fields.ka0902_iio$r_wmask3_fields_l_ol.ka0902_iio$r_wmas\ k3_l_bits.ka0902_iio$v_wmask3_pwm #define ka0902_iio$l_wmask3_h ka0902_iio$r_wmask3_ol.ka0902_iio$r_wmask3_fields.ka0902_iio$r_wmask3_fields_h_ol.ka0902_iio$l_wmask3\ _h #define ka0902_iio$q_tbase3 ka0902_iio$r_tbase3_ol.ka0902_iio$q_tbase3 #define ka0902_iio$l_tbase3_l ka0902_iio$r_tbase3_ol.ka0902_iio$r_tbase3_fields.ka0902_iio$r_tbase3_fields_l_ol.ka0902_iio$l_tbase3\ _l #define ka0902_iio$v_tbase3_tba ka0902_iio$r_tbase3_ol.ka0902_iio$r_tbase3_fields.ka0902_iio$r_tbase3_fields_l_ol.ka0902_iio$r_tbas\ e3_l_bits.ka0902_iio$v_tbase3_tba #define ka0902_iio$l_tbase3_h ka0902_iio$r_tbase3_ol.ka0902_iio$r_tbase3_fields.ka0902_iio$r_tbase3_fields_h_ol.ka0902_iio$l_tbase3\ _h #define ka0902_iio$q_tdr0 ka0902_iio$r_tdr0_ol.ka0902_iio$q_tdr0 #define ka0902_iio$l_tdr0_l ka0902_iio$r_tdr0_ol.ka0902_iio$r_tdr0_fields.ka0902_iio$r_tdr0_fields_l_ol.ka0902_iio$l_tdr0_l #define ka0902_iio$v_tdr0_tlbtd0 ka0902_iio$r_tdr0_ol.ka0902_iio$r_tdr0_fields.ka0902_iio$r_tdr0_fields_l_ol.ka0902_iio$r_tdr0_l_bi\ ts.ka0902_iio$v_tdr0_tlbtd0 #define ka0902_iio$v_tdr0_tlbtd1 ka0902_iio$r_tdr0_ol.ka0902_iio$r_tdr0_fields.ka0902_iio$r_tdr0_fields_l_ol.ka0902_iio$r_tdr0_l_bi\ ts.ka0902_iio$v_tdr0_tlbtd1 #define ka0902_iio$l_tdr0_h ka0902_iio$r_tdr0_ol.ka0902_iio$r_tdr0_fields.ka0902_iio$r_tdr0_fields_h_ol.ka0902_iio$l_tdr0_h #define ka0902_iio$v_tdr0_tlbv0 ka0902_iio$r_tdr0_ol.ka0902_iio$r_tdr0_fields.ka0902_iio$r_tdr0_fields_h_ol.ka0902_iio$r_tdr0_h_bit\ s.ka0902_iio$v_tdr0_tlbv0 #define ka0902_iio$v_tdr0_tlbpfn ka0902_iio$r_tdr0_ol.ka0902_iio$r_tdr0_fields.ka0902_iio$r_tdr0_fields_h_ol.ka0902_iio$r_tdr0_h_bi\ ts.ka0902_iio$v_tdr0_tlbpfn #define ka0902_iio$q_tdr1 ka0902_iio$r_tdr1_ol.ka0902_iio$q_tdr1 #define ka0902_iio$l_tdr1_l ka0902_iio$r_tdr1_ol.ka0902_iio$r_tdr1_fields.ka0902_iio$r_tdr1_fields_l_ol.ka0902_iio$l_tdr1_l #define ka0902_iio$v_tdr1_tlbtd0 ka0902_iio$r_tdr1_ol.ka0902_iio$r_tdr1_fields.ka0902_iio$r_tdr1_fields_l_ol.ka0902_iio$r_tdr1_l_bi\ ts.ka0902_iio$v_tdr1_tlbtd0 #define ka0902_iio$v_tdr1_tlbtd1 ka0902_iio$r_tdr1_ol.ka0902_iio$r_tdr1_fields.ka0902_iio$r_tdr1_fields_l_ol.ka0902_iio$r_tdr1_l_bi\ ts.ka0902_iio$v_tdr1_tlbtd1 #define ka0902_iio$l_tdr1_h ka0902_iio$r_tdr1_ol.ka0902_iio$r_tdr1_fields.ka0902_iio$r_tdr1_fields_h_ol.ka0902_iio$l_tdr1_h #define ka0902_iio$v_tdr1_tlbv1 ka0902_iio$r_tdr1_ol.ka0902_iio$r_tdr1_fields.ka0902_iio$r_tdr1_fields_h_ol.ka0902_iio$r_tdr1_h_bit\ s.ka0902_iio$v_tdr1_tlbv1 #define ka0902_iio$v_tdr1_tlbpfn ka0902_iio$r_tdr1_ol.ka0902_iio$r_tdr1_fields.ka0902_iio$r_tdr1_fields_h_ol.ka0902_iio$r_tdr1_h_bi\ ts.ka0902_iio$v_tdr1_tlbpfn #define ka0902_iio$q_tdr2 ka0902_iio$r_tdr2_ol.ka0902_iio$q_tdr2 #define ka0902_iio$l_tdr2_l ka0902_iio$r_tdr2_ol.ka0902_iio$r_tdr2_fields.ka0902_iio$r_tdr2_fields_l_ol.ka0902_iio$l_tdr2_l #define ka0902_iio$v_tdr2_tlbtd0 ka0902_iio$r_tdr2_ol.ka0902_iio$r_tdr2_fields.ka0902_iio$r_tdr2_fields_l_ol.ka0902_iio$r_tdr2_l_bi\ ts.ka0902_iio$v_tdr2_tlbtd0 #define ka0902_iio$v_tdr2_tlbtd1 ka0902_iio$r_tdr2_ol.ka0902_iio$r_tdr2_fields.ka0902_iio$r_tdr2_fields_l_ol.ka0902_iio$r_tdr2_l_bi\ ts.ka0902_iio$v_tdr2_tlbtd1 #define ka0902_iio$l_tdr2_h ka0902_iio$r_tdr2_ol.ka0902_iio$r_tdr2_fields.ka0902_iio$r_tdr2_fields_h_ol.ka0902_iio$l_tdr2_h #define ka0902_iio$v_tdr2_tlbv2 ka0902_iio$r_tdr2_ol.ka0902_iio$r_tdr2_fields.ka0902_iio$r_tdr2_fields_h_ol.ka0902_iio$r_tdr2_h_bit\ s.ka0902_iio$v_tdr2_tlbv2 #define ka0902_iio$v_tdr2_tlbpfn ka0902_iio$r_tdr2_ol.ka0902_iio$r_tdr2_fields.ka0902_iio$r_tdr2_fields_h_ol.ka0902_iio$r_tdr2_h_bi\ ts.ka0902_iio$v_tdr2_tlbpfn #define ka0902_iio$q_tdr3 ka0902_iio$r_tdr3_ol.ka0902_iio$q_tdr3 #define ka0902_iio$l_tdr3_l ka0902_iio$r_tdr3_ol.ka0902_iio$r_tdr3_fields.ka0902_iio$r_tdr3_fields_l_ol.ka0902_iio$l_tdr3_l #define ka0902_iio$v_tdr3_tlbtd0 ka0902_iio$r_tdr3_ol.ka0902_iio$r_tdr3_fields.ka0902_iio$r_tdr3_fields_l_ol.ka0902_iio$r_tdr3_l_bi\ ts.ka0902_iio$v_tdr3_tlbtd0 #define ka0902_iio$v_tdr3_tlbtd1 ka0902_iio$r_tdr3_ol.ka0902_iio$r_tdr3_fields.ka0902_iio$r_tdr3_fields_l_ol.ka0902_iio$r_tdr3_l_bi\ ts.ka0902_iio$v_tdr3_tlbtd1 #define ka0902_iio$l_tdr3_h ka0902_iio$r_tdr3_ol.ka0902_iio$r_tdr3_fields.ka0902_iio$r_tdr3_fields_h_ol.ka0902_iio$l_tdr3_h #define ka0902_iio$v_tdr3_tlbv3 ka0902_iio$r_tdr3_ol.ka0902_iio$r_tdr3_fields.ka0902_iio$r_tdr3_fields_h_ol.ka0902_iio$r_tdr3_h_bit\ s.ka0902_iio$v_tdr3_tlbv3 #define ka0902_iio$v_tdr3_tlbpfn ka0902_iio$r_tdr3_ol.ka0902_iio$r_tdr3_fields.ka0902_iio$r_tdr3_fields_h_ol.ka0902_iio$r_tdr3_h_bi\ ts.ka0902_iio$v_tdr3_tlbpfn #define ka0902_iio$q_tdr4 ka0902_iio$r_tdr4_ol.ka0902_iio$q_tdr4 #define ka0902_iio$l_tdr4_l ka0902_iio$r_tdr4_ol.ka0902_iio$r_tdr4_fields.ka0902_iio$r_tdr4_fields_l_ol.ka0902_iio$l_tdr4_l #define ka0902_iio$v_tdr4_tlbtd0 ka0902_iio$r_tdr4_ol.ka0902_iio$r_tdr4_fields.ka0902_iio$r_tdr4_fields_l_ol.ka0902_iio$r_tdr4_l_bi\ ts.ka0902_iio$v_tdr4_tlbtd0 #define ka0902_iio$v_tdr4_tlbtd1 ka0902_iio$r_tdr4_ol.ka0902_iio$r_tdr4_fields.ka0902_iio$r_tdr4_fields_l_ol.ka0902_iio$r_tdr4_l_bi\ ts.ka0902_iio$v_tdr4_tlbtd1 #define ka0902_iio$l_tdr4_h ka0902_iio$r_tdr4_ol.ka0902_iio$r_tdr4_fields.ka0902_iio$r_tdr4_fields_h_ol.ka0902_iio$l_tdr4_h #define ka0902_iio$v_tdr4_tlbv4 ka0902_iio$r_tdr4_ol.ka0902_iio$r_tdr4_fields.ka0902_iio$r_tdr4_fields_h_ol.ka0902_iio$r_tdr4_h_bit\ s.ka0902_iio$v_tdr4_tlbv4 #define ka0902_iio$v_tdr4_tlbpfn ka0902_iio$r_tdr4_ol.ka0902_iio$r_tdr4_fields.ka0902_iio$r_tdr4_fields_h_ol.ka0902_iio$r_tdr4_h_bi\ ts.ka0902_iio$v_tdr4_tlbpfn #define ka0902_iio$q_tdr5 ka0902_iio$r_tdr5_ol.ka0902_iio$q_tdr5 #define ka0902_iio$l_tdr5_l ka0902_iio$r_tdr5_ol.ka0902_iio$r_tdr5_fields.ka0902_iio$r_tdr5_fields_l_ol.ka0902_iio$l_tdr5_l #define ka0902_iio$v_tdr5_tlbtd0 ka0902_iio$r_tdr5_ol.ka0902_iio$r_tdr5_fields.ka0902_iio$r_tdr5_fields_l_ol.ka0902_iio$r_tdr5_l_bi\ ts.ka0902_iio$v_tdr5_tlbtd0 #define ka0902_iio$v_tdr5_tlbtd1 ka0902_iio$r_tdr5_ol.ka0902_iio$r_tdr5_fields.ka0902_iio$r_tdr5_fields_l_ol.ka0902_iio$r_tdr5_l_bi\ ts.ka0902_iio$v_tdr5_tlbtd1 #define ka0902_iio$l_tdr5_h ka0902_iio$r_tdr5_ol.ka0902_iio$r_tdr5_fields.ka0902_iio$r_tdr5_fields_h_ol.ka0902_iio$l_tdr5_h #define ka0902_iio$v_tdr5_tlbv5 ka0902_iio$r_tdr5_ol.ka0902_iio$r_tdr5_fields.ka0902_iio$r_tdr5_fields_h_ol.ka0902_iio$r_tdr5_h_bit\ s.ka0902_iio$v_tdr5_tlbv5 #define ka0902_iio$v_tdr5_tlbpfn ka0902_iio$r_tdr5_ol.ka0902_iio$r_tdr5_fields.ka0902_iio$r_tdr5_fields_h_ol.ka0902_iio$r_tdr5_h_bi\ ts.ka0902_iio$v_tdr5_tlbpfn #define ka0902_iio$q_tdr6 ka0902_iio$r_tdr6_ol.ka0902_iio$q_tdr6 #define ka0902_iio$l_tdr6_l ka0902_iio$r_tdr6_ol.ka0902_iio$r_tdr6_fields.ka0902_iio$r_tdr6_fields_l_ol.ka0902_iio$l_tdr6_l #define ka0902_iio$v_tdr6_tlbtd0 ka0902_iio$r_tdr6_ol.ka0902_iio$r_tdr6_fields.ka0902_iio$r_tdr6_fields_l_ol.ka0902_iio$r_tdr6_l_bi\ ts.ka0902_iio$v_tdr6_tlbtd0 #define ka0902_iio$v_tdr6_tlbtd1 ka0902_iio$r_tdr6_ol.ka0902_iio$r_tdr6_fields.ka0902_iio$r_tdr6_fields_l_ol.ka0902_iio$r_tdr6_l_bi\ ts.ka0902_iio$v_tdr6_tlbtd1 #define ka0902_iio$l_tdr6_h ka0902_iio$r_tdr6_ol.ka0902_iio$r_tdr6_fields.ka0902_iio$r_tdr6_fields_h_ol.ka0902_iio$l_tdr6_h #define ka0902_iio$v_tdr6_tlbv6 ka0902_iio$r_tdr6_ol.ka0902_iio$r_tdr6_fields.ka0902_iio$r_tdr6_fields_h_ol.ka0902_iio$r_tdr6_h_bit\ s.ka0902_iio$v_tdr6_tlbv6 #define ka0902_iio$v_tdr6_tlbpfn ka0902_iio$r_tdr6_ol.ka0902_iio$r_tdr6_fields.ka0902_iio$r_tdr6_fields_h_ol.ka0902_iio$r_tdr6_h_bi\ ts.ka0902_iio$v_tdr6_tlbpfn #define ka0902_iio$q_tdr7 ka0902_iio$r_tdr7_ol.ka0902_iio$q_tdr7 #define ka0902_iio$l_tdr7_l ka0902_iio$r_tdr7_ol.ka0902_iio$r_tdr7_fields.ka0902_iio$r_tdr7_fields_l_ol.ka0902_iio$l_tdr7_l #define ka0902_iio$v_tdr7_tlbtd0 ka0902_iio$r_tdr7_ol.ka0902_iio$r_tdr7_fields.ka0902_iio$r_tdr7_fields_l_ol.ka0902_iio$r_tdr7_l_bi\ ts.ka0902_iio$v_tdr7_tlbtd0 #define ka0902_iio$v_tdr7_tlbtd1 ka0902_iio$r_tdr7_ol.ka0902_iio$r_tdr7_fields.ka0902_iio$r_tdr7_fields_l_ol.ka0902_iio$r_tdr7_l_bi\ ts.ka0902_iio$v_tdr7_tlbtd1 #define ka0902_iio$l_tdr7_h ka0902_iio$r_tdr7_ol.ka0902_iio$r_tdr7_fields.ka0902_iio$r_tdr7_fields_h_ol.ka0902_iio$l_tdr7_h #define ka0902_iio$v_tdr7_tlbv7 ka0902_iio$r_tdr7_ol.ka0902_iio$r_tdr7_fields.ka0902_iio$r_tdr7_fields_h_ol.ka0902_iio$r_tdr7_h_bit\ s.ka0902_iio$v_tdr7_tlbv7 #define ka0902_iio$v_tdr7_tlbpfn ka0902_iio$r_tdr7_ol.ka0902_iio$r_tdr7_fields.ka0902_iio$r_tdr7_fields_h_ol.ka0902_iio$r_tdr7_h_bi\ ts.ka0902_iio$v_tdr7_tlbpfn #define ka0902_iio$q_wbase4 ka0902_iio$r_wbase4_ol.ka0902_iio$q_wbase4 #define ka0902_iio$l_wbase4_l ka0902_iio$r_wbase4_ol.ka0902_iio$r_wbase4_fields.ka0902_iio$r_wbase4_fields_l_ol.ka0902_iio$l_wbase4\ _l #define ka0902_iio$v_wbase4_pwea ka0902_iio$r_wbase4_ol.ka0902_iio$r_wbase4_fields.ka0902_iio$r_wbase4_fields_l_ol.ka0902_iio$r_wba\ se4_l_bits.ka0902_iio$v_wbase4_pwea #define ka0902_iio$v_wbase4_ppe ka0902_iio$r_wbase4_ol.ka0902_iio$r_wbase4_fields.ka0902_iio$r_wbase4_fields_l_ol.ka0902_iio$r_wbas\ e4_l_bits.ka0902_iio$v_wbase4_ppe #define ka0902_iio$v_wbase4_sge ka0902_iio$r_wbase4_ol.ka0902_iio$r_wbase4_fields.ka0902_iio$r_wbase4_fields_l_ol.ka0902_iio$r_wbas\ e4_l_bits.ka0902_iio$v_wbase4_sge #define ka0902_iio$v_wbase4_pwe ka0902_iio$r_wbase4_ol.ka0902_iio$r_wbase4_fields.ka0902_iio$r_wbase4_fields_l_ol.ka0902_iio$r_wbas\ e4_l_bits.ka0902_iio$v_wbase4_pwe #define ka0902_iio$v_wbase4_pwsa ka0902_iio$r_wbase4_ol.ka0902_iio$r_wbase4_fields.ka0902_iio$r_wbase4_fields_l_ol.ka0902_iio$r_wba\ se4_l_bits.ka0902_iio$v_wbase4_pwsa #define ka0902_iio$l_wbase4_h ka0902_iio$r_wbase4_ol.ka0902_iio$r_wbase4_fields.ka0902_iio$r_wbase4_fields_h_ol.ka0902_iio$l_wbase4\ _h #define ka0902_iio$q_wmask4 ka0902_iio$r_wmask4_ol.ka0902_iio$q_wmask4 #define ka0902_iio$l_wmask4_l ka0902_iio$r_wmask4_ol.ka0902_iio$r_wmask4_fields.ka0902_iio$r_wmask4_fields_l_ol.ka0902_iio$l_wmask4\ _l #define ka0902_iio$v_wmask4_pwm ka0902_iio$r_wmask4_ol.ka0902_iio$r_wmask4_fields.ka0902_iio$r_wmask4_fields_l_ol.ka0902_iio$r_wmas\ k4_l_bits.ka0902_iio$v_wmask4_pwm #define ka0902_iio$l_wmask4_h ka0902_iio$r_wmask4_ol.ka0902_iio$r_wmask4_fields.ka0902_iio$r_wmask4_fields_h_ol.ka0902_iio$l_wmask4\ _h #define ka0902_iio$q_tbase4 ka0902_iio$r_tbase4_ol.ka0902_iio$q_tbase4 #define ka0902_iio$l_tbase4_l ka0902_iio$r_tbase4_ol.ka0902_iio$r_tbase4_fields.ka0902_iio$r_tbase4_fields_l_ol.ka0902_iio$l_tbase4\ _l #define ka0902_iio$v_tbase4_tba ka0902_iio$r_tbase4_ol.ka0902_iio$r_tbase4_fields.ka0902_iio$r_tbase4_fields_l_ol.ka0902_iio$r_tbas\ e4_l_bits.ka0902_iio$v_tbase4_tba #define ka0902_iio$l_tbase4_h ka0902_iio$r_tbase4_ol.ka0902_iio$r_tbase4_fields.ka0902_iio$r_tbase4_fields_h_ol.ka0902_iio$l_tbase4\ _h #define ka0902_iio$q_air ka0902_iio$r_air_ol.ka0902_iio$q_air #define ka0902_iio$l_air_l ka0902_iio$r_air_ol.ka0902_iio$r_air_fields.ka0902_iio$r_air_fields_l_ol.ka0902_iio$l_air_l #define ka0902_iio$l_air_h ka0902_iio$r_air_ol.ka0902_iio$r_air_fields.ka0902_iio$r_air_fields_h_ol.ka0902_iio$l_air_h #define ka0902_iio$q_vector ka0902_iio$r_vector_ol.ka0902_iio$q_vector #define ka0902_iio$l_vector_l ka0902_iio$r_vector_ol.ka0902_iio$r_vector_fields.ka0902_iio$r_vector_fields_l_ol.ka0902_iio$l_vector\ _l #define ka0902_iio$l_vector_h ka0902_iio$r_vector_ol.ka0902_iio$r_vector_fields.ka0902_iio$r_vector_fields_h_ol.ka0902_iio$l_vector\ _h #define ka0902_iio$q_dir ka0902_iio$r_dir_ol.ka0902_iio$q_dir #define ka0902_iio$l_dir_l ka0902_iio$r_dir_ol.ka0902_iio$r_dir_fields.ka0902_iio$r_dir_fields_l_ol.ka0902_iio$l_dir_l #define ka0902_iio$l_dir_h ka0902_iio$r_dir_ol.ka0902_iio$r_dir_fields.ka0902_iio$r_dir_fields_h_ol.ka0902_iio$l_dir_h #define ka0902_iio$q_icic ka0902_iio$r_icic_ol.ka0902_iio$q_icic #define ka0902_iio$l_icic_l ka0902_iio$r_icic_ol.ka0902_iio$r_icic_fields.ka0902_iio$r_icic_fields_l_ol.ka0902_iio$l_icic_l #define ka0902_iio$v_icic_flush_addr ka0902_iio$r_icic_ol.ka0902_iio$r_icic_fields.ka0902_iio$r_icic_fields_l_ol.ka0902_iio$r_icic_\ l_bits.ka0902_iio$v_icic_flush_addr #define ka0902_iio$v_icic_enable ka0902_iio$r_icic_ol.ka0902_iio$r_icic_fields.ka0902_iio$r_icic_fields_l_ol.ka0902_iio$r_icic_l_bi\ ts.ka0902_iio$v_icic_enable #define ka0902_iio$v_icic_clock ka0902_iio$r_icic_ol.ka0902_iio$r_icic_fields.ka0902_iio$r_icic_fields_l_ol.ka0902_iio$r_icic_l_bit\ s.ka0902_iio$v_icic_clock #define ka0902_iio$l_icic_h ka0902_iio$r_icic_ol.ka0902_iio$r_icic_fields.ka0902_iio$r_icic_fields_h_ol.ka0902_iio$l_icic_h #endif /* #if !defined(__VAXC) */ #define KA0902_IIO$K_LENGTH 1248 /* New for T4 and Lynx (T3), the IC Interrupt Controller. */ /* ICIC register definitions. To access these registers, write the offset */ /* into the AIR register, then read the DIR register or write your data */ /* to the DIR register. */ /* */ #define KA0902_ICIC$K_MASK 64 /* ICIC interrupt mask register */ #define KA0902_ICIC$K_ELCR 80 /* ICIC edge level register */ #define KA0902_ICIC$K_EISA 96 /* ICIC device is behind EISA bridge */ #define KA0902_ICIC$K_MODE 112 /* Bit 0: priority or round robin */ /* */ /* Sable CPU register definitions */ /* */ #define KA0902_CPU$M_BCC_ENB_ALLOC_L 0x1 #define KA0902_CPU$M_BCC_FRC_FILL_SH_L 0x2 #define KA0902_CPU$M_BCC_ENB_TPC_L 0x4 #define KA0902_CPU$M_BCC_FILL_WTP_L 0x8 #define KA0902_CPU$M_BCC_FILL_WCP_L 0x10 #define KA0902_CPU$M_BCC_FILL_WDTP_L 0x20 #define KA0902_CPU$M_BCC_ENB_CEI_L 0x40 #define KA0902_CPU$M_BCC_ENB_EDCC_L 0x80 #define KA0902_CPU$M_BCC_ENB_EDC_CHK_L 0x100 #define KA0902_CPU$M_BCC_ENB_BC_CIO_L 0x200 #define KA0902_CPU$M_BCC_DIS_BLK_W_L 0x400 #define KA0902_CPU$M_BCC_ENB_BC_INIT_L 0x800 #define KA0902_CPU$M_BCC_FOR_EDCC_L 0x1000 #define KA0902_CPU$M_BCC_SH_D_V_L 0xE000 #define KA0902_CPU$M_BCC_EDC_L 0x3FFF0000 #define KA0902_CPU$M_BCC_CACHE_SIZE_L 0xC0000000 #define KA0902_CPU$M_BCC_ENB_ALLOC_H 0x1 #define KA0902_CPU$M_BCC_FRC_FILL_SH_H 0x2 #define KA0902_CPU$M_BCC_ENB_TPC_H 0x4 #define KA0902_CPU$M_BCC_FILL_WTP_H 0x8 #define KA0902_CPU$M_BCC_FILL_WCP_H 0x10 #define KA0902_CPU$M_BCC_FILL_WDTP_H 0x20 #define KA0902_CPU$M_BCC_ENB_CEI_H 0x40 #define KA0902_CPU$M_BCC_ENB_EDCC_H 0x80 #define KA0902_CPU$M_BCC_ENB_EDC_CHK_H 0x100 #define KA0902_CPU$M_BCC_ENB_BC_CIO_H 0x200 #define KA0902_CPU$M_BCC_DIS_BLK_W_H 0x400 #define KA0902_CPU$M_BCC_ENB_BC_INIT_H 0x800 #define KA0902_CPU$M_BCC_FOR_EDCC_H 0x1000 #define KA0902_CPU$M_BCC_SH_D_V_H 0xE000 #define KA0902_CPU$M_BCC_EDC_L_H 0x3FFF0000 #define KA0902_CPU$M_BCC_CACHE_SIZE_H 0xC0000000 #define KA0902_BCC$K_RESERVED 0 /* Reserved */ #define KA0902_BCC$K_CACHE_SIZE_1MB 1 /* Cache size is 1Mb */ #define KA0902_BCC$K_CACHE_SIZE_4MB 2 /* Cache size is 4Mb */ #define KA0902_CPU$M_BCCE_MCE_L 0x4 #define KA0902_CPU$M_BCCE_CE_L 0x8 #define KA0902_CPU$M_BCCE_CNTRL_PAR_L 0x100 #define KA0902_CPU$M_BCCE_SH_L 0x200 #define KA0902_CPU$M_BCCE_DIRTY_L 0x400 #define KA0902_CPU$M_BCCE_VALID_L 0x800 #define KA0902_CPU$M_BCCE_BC_EDC_L 0x20000 #define KA0902_CPU$M_BCCE_EDC_SYND_0 0x1FC0000 #define KA0902_CPU$M_BCCE_EDC_SYND_2 0xFE000000 #define KA0902_CPU$M_BCCE_MCE_H 0x4 #define KA0902_CPU$M_BCCE_CE_H 0x8 #define KA0902_CPU$M_BCCE_READ_ONLY 0x1FFF0 #define KA0902_CPU$M_BCCE_BC_EDC_H 0x20000 #define KA0902_CPU$M_BCCE_EDC_SYND_1 0x1FC0000 #define KA0902_CPU$M_BCCE_EDC_SYND_3 0xFE000000 #define KA0902_CPU$M_BCCEA_BCMAP_OFF_L 0x1FFFF #define KA0902_CPU$M_BCCEA_TAG_PAR_L 0x40000 #define KA0902_CPU$M_BCCEA_TAG_VALUE_L 0x7FF80000 #define KA0902_CPU$M_BCCEA_BCMAP_OFF_H 0x1FFFF #define KA0902_CPU$M_BCCEA_TAG_PAR_H 0x40000 #define KA0902_CPU$M_BCCEA_TAG_VALUE_H 0x7FF80000 #define KA0902_CPU$M_BCUE_MPE_L 0x1 #define KA0902_CPU$M_BCUE_PE_L 0x2 #define KA0902_CPU$M_BCUE_MUNCE_L 0x4 #define KA0902_CPU$M_BCUE_UNCE_L 0x8 #define KA0902_CPU$M_BCUE_CTRL_PAR_L 0x100 #define KA0902_CPU$M_BCUE_SH_L 0x200 #define KA0902_CPU$M_BCUE_DIRTY_L 0x400 #define KA0902_CPU$M_BCUE_VALID_L 0x800 #define KA0902_CPU$M_BCUE_BC_EDC_L 0x20000 #define KA0902_CPU$M_BCUE_EDC_SYND_0 0x1FC0000 #define KA0902_CPU$M_BCUE_EDC_SYND_2 0xFE000000 #define KA0902_CPU$M_BCUE_MPE_H 0x1 #define KA0902_CPU$M_BCUE_PE_H 0x2 #define KA0902_CPU$M_BCUE_MUNCE_H 0x4 #define KA0902_CPU$M_BCUE_UNCE_H 0x8 #define KA0902_CPU$M_BCUE_BC_EDC_H 0x20000 #define KA0902_CPU$M_BCUE_EDC_SYND_1 0x1FC0000 #define KA0902_CPU$M_BCUE_EDC_SYND_3 0xFE000000 #define KA0902_CPU$M_BCUEA_BCMAP_OFF_L 0x1FFFF #define KA0902_CPU$M_BCUEA_PTP_L 0x20000 #define KA0902_CPU$M_BCUEA_TP_L 0x40000 #define KA0902_CPU$M_BCUEA_TV_L 0x7FF80000 #define KA0902_CPU$M_BCUEA_FILL1_L 0x80000000 #define KA0902_CPU$M_BCUEA_BCMAP_OFF_H 0x1FFFF #define KA0902_CPU$M_BCUEA_PTP_H 0x20000 #define KA0902_CPU$M_BCUEA_TP_H 0x40000 #define KA0902_CPU$M_BCUEA_TV_H 0x7FF80000 #define KA0902_CPU$M_BCUEA_FILL1_H 0x80000000 #define KA0902_CPU$M_DTER_MDTER_L 0x1 #define KA0902_CPU$M_DTER_DTER_L 0x2 #define KA0902_CPU$M_DTER_TOFF_L 0x3FC #define KA0902_CPU$M_DTER_BANK0_TAG_L 0x7FC00 #define KA0902_CPU$M_DTER_BANK0_PAR_L 0x80000 #define KA0902_CPU$M_DTER_BANK1_TAG_L 0x1FF00000 #define KA0902_CPU$M_DTER_BANK1_PAR_L 0x20000000 #define KA0902_CPU$M_DTER_MDTER_H 0x1 #define KA0902_CPU$M_DTER_DTER_H 0x2 #define KA0902_CPU$M_DTER_TOFF_H 0x3FC #define KA0902_CPU$M_DTER_BANK0_TAG_H 0x7FC00 #define KA0902_CPU$M_DTER_BANK0_PAR_H 0x80000 #define KA0902_CPU$M_DTER_BANK1_TAG_H 0x1FF00000 #define KA0902_CPU$M_DTER_BANK1_PAR_H 0x20000000 #define KA0902_CPU$M_CBCTL_DWP_L 0x1 #define KA0902_CPU$M_CBCTL_CAWP_L 0x6 #define KA0902_CPU$M_CBCTL_EPC_L 0x8 #define KA0902_CPU$M_CBCTL_FRC_SH_L 0x10 #define KA0902_CPU$M_CBCTL_CMDER_ID_L 0xE0 #define KA0902_CPU$M_CBCTL_ACM_L 0x700 #define KA0902_CPU$M_CBCTL_ENB_CI_L 0x800 #define KA0902_CPU$M_CBCTL_RD_L 0x1000 #define KA0902_CPU$M_CBCTL_QW_2_SEL_L 0x2000 #define KA0902_CPU$M_CBCTL_SEL_DRACK_L 0x4000 #define KA0902_CPU$M_CBCTL_DWP_H 0x1 #define KA0902_CPU$M_CBCTL_CAWP_H 0x6 #define KA0902_CPU$M_CBCTL_EPC_H 0x8 #define KA0902_CPU$M_CBCTL_FRC_SH_H 0x10 #define KA0902_CPU$M_CBCTL_CMDER_ID_H 0xE0 #define KA0902_CPU$M_CBCTL_ACM_H 0x700 #define KA0902_CPU$M_CBCTL_ENB_CI_H 0x800 #define KA0902_CPU$M_CBCTL_RD_H 0x1000 #define KA0902_CPU$M_CBCTL_QW_2_SEL_H 0x2000 #define KA0902_CPU$M_CBCTL_SEL_DRACK_H 0x4000 #define KA0902_CPU$M_CBE_DIAG_L 0x2 #define KA0902_CPU$M_CBE_CAP_L 0x4 #define KA0902_CPU$M_CBE_MCAP_L 0x8 #define KA0902_CPU$M_CBE_PE_WRD_L 0x10 #define KA0902_CPU$M_CBE_MPE_WRD_L 0x20 #define KA0902_CPU$M_CBE_PE_RD_L 0x40 #define KA0902_CPU$M_CBE_MPE_RD_L 0x80 #define KA0902_CPU$M_CBE_CA_PE_LW0 0x100 #define KA0902_CPU$M_CBE_CA_PE_LW2 0x200 #define KA0902_CPU$M_CBE_D_PE_LW0 0x400 #define KA0902_CPU$M_CBE_D_PE_LW2 0x800 #define KA0902_CPU$M_CBE_D_PE_LW4 0x1000 #define KA0902_CPU$M_CBE_D_PE_LW6 0x2000 #define KA0902_CPU$M_CBE_CA_NACK_L 0x4000 #define KA0902_CPU$M_CBE_WR_DATA_NACK_L 0x8000 #define KA0902_CPU$M_CBE_MCOUNT_L 0x3F000000 #define KA0902_CPU$M_CBE_MADR_VALID_L 0x40000000 #define KA0902_CPU$M_CBE_DIAG_H 0x2 #define KA0902_CPU$M_CBE_CAP_H 0x4 #define KA0902_CPU$M_CBE_MCAP_H 0x8 #define KA0902_CPU$M_CBE_PE_WRD_H 0x10 #define KA0902_CPU$M_CBE_MPE_WRD_H 0x20 #define KA0902_CPU$M_CBE_PE_RD_H 0x40 #define KA0902_CPU$M_CBE_MPE_RD_H 0x80 #define KA0902_CPU$M_CBE_CA_PE_LW1 0x100 #define KA0902_CPU$M_CBE_CA_PE_LW3 0x200 #define KA0902_CPU$M_CBE_D_PE_LW1 0x400 #define KA0902_CPU$M_CBE_D_PE_LW3 0x800 #define KA0902_CPU$M_CBE_D_PE_LW5 0x1000 #define KA0902_CPU$M_CBE_D_PE_LW7 0x2000 #define KA0902_CPU$M_CBE_UNDEFINED 0x4000 #define KA0902_CPU$M_CBE_UNDEFINED2 0x8000 #define KA0902_CPU$M_CBE_MCOUNT_H 0x3F000000 #define KA0902_CPU$M_CBE_MADR_VALID_H 0x40000000 #define KA0902_CPU$M_CBEAL_SBO_L 0x3 #define KA0902_CPU$M_CBEAL_ADDR_CAD_L 0xFFFFFFFC #define KA0902_CPU$M_CBEAL_SBO_H 0x3 #define KA0902_CPU$M_CBEAL_ADDR_CAD_H 0xFFFFFFFC #define KA0902_CPU$M_CBEAH_SB0_L 0x3 #define KA0902_CPU$M_CBEAH_EA_L 0x3FFFC #define KA0902_CPU$M_CBEAH_T_TYPE_L 0x1C0000 #define KA0902_CPU$M_CBEAH_CMDR_ID_L 0xE00000 #define KA0902_CPU$M_CBEAH_SB1_L 0xFF000000 #define KA0902_CPU$M_CBEAH_SB0_H 0x3 #define KA0902_CPU$M_CBEAH_EA_H 0x3FFFC #define KA0902_CPU$M_CBEAH_T_TYPE_H 0x1C0000 #define KA0902_CPU$M_CBEAH_CMDR_ID_H 0xE00000 #define KA0902_CPU$M_CBEAH_SB1_H 0xFF000000 #define KA0902_CPU$M_PMBX_FILL1_L 0xFFFFFFFF #define KA0902_CPU$M_PMBX_FILL1_H 0xFFFFFFFF #define KA0902_CPU$M_IPIR_UNDEFINED 0x1 #define KA0902_CPU$M_IPIR_REQ_INT_CPU 0x1 #define KA0902_CPU$M_IPIR_REQ_NODE_HALT 0x8 #define KA0902_CPU$M_SIC_UNDEFINED0 0x1 #define KA0902_CPU$M_SIC_UNDEFINED1 0x2 #define KA0902_CPU$M_SIC_EIC 0x4 #define KA0902_CPU$M_SIC_UNDEFINED2 0x8 #define KA0902_CPU$M_SIC_IT_ICLEAR 0x1 #define KA0902_CPU$M_SIC_SYS_EVT_CLR 0x2 #define KA0902_CPU$M_SIC_UNDEFINED3 0x4 #define KA0902_CPU$M_SIC_NODE_HALT_CLR 0x8 #define KA0902_CPU$M_ADLK_LA_V_L 0x1 #define KA0902_CPU$M_ADLK_LA_L 0xFFFFFFF8 #define KA0902_CPU$M_ADLK_LA_V_H 0x1 #define KA0902_CPU$M_ADLK_LA_H 0xFFFFFFF8 #define KA0902_CPU$M_MADRL_VALID_L 0x1 #define KA0902_CPU$M_MADRL_T_TYPE_L 0x2 #define KA0902_CPU$M_MADRL_ADDRESS_L 0xFFFFFFFC #define KA0902_CPU$M_MADRL_VALID_H 0x1 #define KA0902_CPU$M_MADRL_T_TYPE_H 0x2 #define KA0902_CPU$M_MADRL_ADDRESS_H 0xFFFFFFFC #define KA0902_CPU$M_CRREVS_REV_L 0xF #define KA0902_CPU$M_CRREVS_CPU_MODE_L 0x10 #define KA0902_CPU$M_CRREVS_C3_SPEED_L 0xFE0 #define KA0902_CPU$M_CRREVS_SB0_L 0x1000 #define KA0902_CPU$M_CRREVS_FILL1_L 0x2000 #define KA0902_CPU$M_CRREVS_IO_RETRY_L 0x4000 #define KA0902_CPU$M_CRREVS_PCH_INV_L 0x200000 #define KA0902_CPU$M_CRREVS_REV_H 0xF #define KA0902_CPU$M_CRREVS_CPU_MODE_H 0x10 #define KA0902_CPU$M_CRREVS_C3_SPEED_H 0xFE0 #define KA0902_CPU$M_CRREVS_SB0_H 0x1000 #define KA0902_CPU$M_CRREVS_FILL1_H 0x2000 #define KA0902_CPU$M_CRREVS_IO_RETRY_H 0x4000 #define KA0902_CPU$M_CRREVS_PCH_INV_H 0x200000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _ka0902_cpu { /* B-Cache Control Register 0 */ #pragma __nomember_alignment __union { __int64 ka0902_cpu$q_bcc; __struct { __union { unsigned int ka0902_cpu$l_bcc_l; __struct { unsigned ka0902_cpu$v_bcc_enb_alloc_l : 1; unsigned ka0902_cpu$v_bcc_frc_fill_sh_l : 1; unsigned ka0902_cpu$v_bcc_enb_tpc_l : 1; unsigned ka0902_cpu$v_bcc_fill_wtp_l : 1; unsigned ka0902_cpu$v_bcc_fill_wcp_l : 1; unsigned ka0902_cpu$v_bcc_fill_wdtp_l : 1; unsigned ka0902_cpu$v_bcc_enb_cei_l : 1; unsigned ka0902_cpu$v_bcc_enb_edcc_l : 1; unsigned ka0902_cpu$v_bcc_enb_edc_chk_l : 1; unsigned ka0902_cpu$v_bcc_enb_bc_cio_l : 1; unsigned ka0902_cpu$v_bcc_dis_blk_w_l : 1; unsigned ka0902_cpu$v_bcc_enb_bc_init_l : 1; unsigned ka0902_cpu$v_bcc_for_edcc_l : 1; unsigned ka0902_cpu$v_bcc_sh_d_v_l : 3; unsigned ka0902_cpu$v_bcc_edc_l : 14; unsigned ka0902_cpu$v_bcc_cache_size_l : 2; } ka0902_cpu$r_bcc_l_bits; } ka0902_cpu$r_bcc_fields_l_ol; __union { unsigned int ka0902_cpu$l_bcc_h; __struct { unsigned ka0902_cpu$v_bcc_enb_alloc_h : 1; unsigned ka0902_cpu$v_bcc_frc_fill_sh_h : 1; unsigned ka0902_cpu$v_bcc_enb_tpc_h : 1; unsigned ka0902_cpu$v_bcc_fill_wtp_h : 1; unsigned ka0902_cpu$v_bcc_fill_wcp_h : 1; unsigned ka0902_cpu$v_bcc_fill_wdtp_h : 1; unsigned ka0902_cpu$v_bcc_enb_cei_h : 1; unsigned ka0902_cpu$v_bcc_enb_edcc_h : 1; unsigned ka0902_cpu$v_bcc_enb_edc_chk_h : 1; unsigned ka0902_cpu$v_bcc_enb_bc_cio_h : 1; unsigned ka0902_cpu$v_bcc_dis_blk_w_h : 1; unsigned ka0902_cpu$v_bcc_enb_bc_init_h : 1; unsigned ka0902_cpu$v_bcc_for_edcc_h : 1; unsigned ka0902_cpu$v_bcc_sh_d_v_h : 3; unsigned ka0902_cpu$v_bcc_edc_l_h : 14; unsigned ka0902_cpu$v_bcc_cache_size_h : 2; } ka0902_cpu$r_bcc_h_bits; } ka0902_cpu$r_bcc_fields_h_ol; } ka0902_cpu$r_bcc_fields; } ka0902_cpu$r_bcc_ol; char ka0902_cpu$b_fill27 [24]; /* B-Cache Correctable Error Register, BCCE */ __union { __int64 ka0902_cpu$q_bcce; __struct { __union { unsigned int ka0902_cpu$l_bcce_l; __struct { unsigned ka0902_cpu$v_bcce_fill1 : 2; unsigned ka0902_cpu$v_bcce_mce_l : 1; unsigned ka0902_cpu$v_bcce_ce_l : 1; unsigned ka0902_cpu$v_bcce_fill2 : 4; unsigned ka0902_cpu$v_bcce_cntrl_par_l : 1; unsigned ka0902_cpu$v_bcce_sh_l : 1; unsigned ka0902_cpu$v_bcce_dirty_l : 1; unsigned ka0902_cpu$v_bcce_valid_l : 1; unsigned ka0902_cpu$v_bcce_fill3 : 5; unsigned ka0902_cpu$v_bcce_bc_edc_l : 1; unsigned ka0902_cpu$v_bcce_edc_synd_0 : 7; unsigned ka0902_cpu$v_bcce_edc_synd_2 : 7; } ka0902_cpu$r_bcce_l_bits; } ka0902_cpu$r_bcce_fields_l_ol; __union { unsigned int ka0902_cpu$l_bcce_h; __struct { unsigned ka0902_cpu$v_bcce_fill4 : 2; unsigned ka0902_cpu$v_bcce_mce_h : 1; unsigned ka0902_cpu$v_bcce_ce_h : 1; unsigned ka0902_cpu$v_bcce_read_only : 13; unsigned ka0902_cpu$v_bcce_bc_edc_h : 1; unsigned ka0902_cpu$v_bcce_edc_synd_1 : 7; unsigned ka0902_cpu$v_bcce_edc_synd_3 : 7; } ka0902_cpu$r_bcce_h_bits; } ka0902_cpu$r_bcce_fields_h_ol; } ka0902_cpu$r_bcce_fields; } ka0902_cpu$r_bcce_ol; char ka0902_cpu$b_fill28 [24]; /* B-Cache Correctable Error Register, BCCEA */ __union { __int64 ka0902_cpu$q_bccea; __struct { __union { unsigned int ka0902_cpu$l_bccea_l; __struct { unsigned ka0902_cpu$v_bccea_bcmap_off_l : 17; unsigned ka0902_cpu$v_bccea_fill1 : 1; unsigned ka0902_cpu$v_bccea_tag_par_l : 1; unsigned ka0902_cpu$v_bccea_tag_value_l : 12; unsigned ka0902_cpu$v_bccea_fill2 : 1; } ka0902_cpu$r_bccea_l_bits; } ka0902_cpu$r_bccea_fields_l_ol; __union { unsigned int ka0902_cpu$l_bccea_h; __struct { unsigned ka0902_cpu$v_bccea_bcmap_off_h : 17; unsigned ka0902_cpu$v_bccea_fill1_h : 1; unsigned ka0902_cpu$v_bccea_tag_par_h : 1; unsigned ka0902_cpu$v_bccea_tag_value_h : 12; unsigned ka0902_cpu$v_bccea_fill2_h : 1; } ka0902_cpu$r_bccea_h_bits; } ka0902_cpu$r_bccea_fields_h_ol; } ka0902_cpu$r_bccea_fields; } ka0902_cpu$r_bccea_ol; char ka0902_cpu$b_fill29 [24]; /* B-Cache UNCRectable Error Register, BCUE */ __union { __int64 ka0902_cpu$q_bcue; __struct { __union { unsigned int ka0902_cpu$l_bcue_l; __struct { unsigned ka0902_cpu$v_bcue_mpe_l : 1; unsigned ka0902_cpu$v_bcue_pe_l : 1; unsigned ka0902_cpu$v_bcue_munce_l : 1; unsigned ka0902_cpu$v_bcue_unce_l : 1; unsigned ka0902_cpu$v_bcue_fill1 : 4; unsigned ka0902_cpu$v_bcue_ctrl_par_l : 1; unsigned ka0902_cpu$v_bcue_sh_l : 1; unsigned ka0902_cpu$v_bcue_dirty_l : 1; unsigned ka0902_cpu$v_bcue_valid_l : 1; unsigned ka0902_cpu$v_bcue_fill2 : 5; unsigned ka0902_cpu$v_bcue_bc_edc_l : 1; unsigned ka0902_cpu$v_bcue_edc_synd_0 : 7; unsigned ka0902_cpu$v_bcue_edc_synd_2 : 7; } ka0902_cpu$r_bcue_l_bits; } ka0902_cpu$r_bcue_fields_l_ol; __union { unsigned int ka0902_cpu$l_bcue_h; __struct { unsigned ka0902_cpu$v_bcue_mpe_h : 1; unsigned ka0902_cpu$v_bcue_pe_h : 1; unsigned ka0902_cpu$v_bcue_munce_h : 1; unsigned ka0902_cpu$v_bcue_unce_h : 1; unsigned ka0902_cpu$v_bcue_fill3 : 13; unsigned ka0902_cpu$v_bcue_bc_edc_h : 1; unsigned ka0902_cpu$v_bcue_edc_synd_1 : 7; unsigned ka0902_cpu$v_bcue_edc_synd_3 : 7; } ka0902_cpu$r_bcue_h_bits; } ka0902_cpu$r_bcue_fields_h_ol; } ka0902_cpu$r_bcue_fields; } ka0902_cpu$r_bcue_ol; char ka0902_cpu$b_fill30 [24]; /* B-Cache UNCRectable Error Address Register, BCUEA */ __union { __int64 ka0902_cpu$q_bcuea; __struct { __union { unsigned int ka0902_cpu$l_bcuea_l; __struct { unsigned ka0902_cpu$v_bcuea_bcmap_off_l : 17; unsigned ka0902_cpu$v_bcuea_ptp_l : 1; unsigned ka0902_cpu$v_bcuea_tp_l : 1; unsigned ka0902_cpu$v_bcuea_tv_l : 12; unsigned ka0902_cpu$v_bcuea_fill1_l : 1; } ka0902_cpu$r_bcuea_l_bits; } ka0902_cpu$r_bcuea_fields_l_ol; __union { unsigned int ka0902_cpu$l_bcuea_h; __struct { unsigned ka0902_cpu$v_bcuea_bcmap_off_h : 17; unsigned ka0902_cpu$v_bcuea_ptp_h : 1; unsigned ka0902_cpu$v_bcuea_tp_h : 1; unsigned ka0902_cpu$v_bcuea_tv_h : 12; unsigned ka0902_cpu$v_bcuea_fill1_h : 1; } ka0902_cpu$r_bcuea_h_bits; } ka0902_cpu$r_bcuea_fields_h_ol; } ka0902_cpu$r_bcuea_fields; } ka0902_cpu$r_bcuea_ol; char ka0902_cpu$b_fill31 [24]; /* Duplicate Tag Error Register DTER */ __union { __int64 ka0902_cpu$q_dter; __struct { __union { unsigned int ka0902_cpu$l_dter_l; __struct { unsigned ka0902_cpu$v_dter_mdter_l : 1; unsigned ka0902_cpu$v_dter_dter_l : 1; unsigned ka0902_cpu$v_dter_toff_l : 8; unsigned ka0902_cpu$v_dter_bank0_tag_l : 9; unsigned ka0902_cpu$v_dter_bank0_par_l : 1; unsigned ka0902_cpu$v_dter_bank1_tag_l : 9; unsigned ka0902_cpu$v_dter_bank1_par_l : 1; unsigned ka0902_cpu$v_dter_fill1_l : 2; } ka0902_cpu$r_dter_l_bits; } ka0902_cpu$r_dter_fields_l_ol; __union { unsigned int ka0902_cpu$l_dter_h; __struct { unsigned ka0902_cpu$v_dter_mdter_h : 1; unsigned ka0902_cpu$v_dter_dter_h : 1; unsigned ka0902_cpu$v_dter_toff_h : 8; unsigned ka0902_cpu$v_dter_bank0_tag_h : 9; unsigned ka0902_cpu$v_dter_bank0_par_h : 1; unsigned ka0902_cpu$v_dter_bank1_tag_h : 9; unsigned ka0902_cpu$v_dter_bank1_par_h : 1; unsigned ka0902_cpu$v_dter_fill1_h : 2; } ka0902_cpu$r_dter_h_bits; } ka0902_cpu$r_dter_fields_h_ol; } ka0902_cpu$r_dter_fields; } ka0902_cpu$r_dter_ol; char ka0902_cpu$b_fill32 [24]; /* Cobra bus Control Register - CBCTL */ __union { __int64 ka0902_cpu$q_cbctl; __struct { __union { unsigned int ka0902_cpu$l_cbctl_l; __struct { unsigned ka0902_cpu$v_cbctl_dwp_l : 1; unsigned ka0902_cpu$v_cbctl_cawp_l : 2; unsigned ka0902_cpu$v_cbctl_epc_l : 1; unsigned ka0902_cpu$v_cbctl_frc_sh_l : 1; unsigned ka0902_cpu$v_cbctl_cmder_id_l : 3; unsigned ka0902_cpu$v_cbctl_acm_l : 3; unsigned ka0902_cpu$v_cbctl_enb_ci_l : 1; unsigned ka0902_cpu$v_cbctl_rd_l : 1; unsigned ka0902_cpu$v_cbctl_qw_2_sel_l : 1; unsigned ka0902_cpu$v_cbctl_sel_drack_l : 1; unsigned ka0902_cpu$v_cbctl_fill1_l : 17; } ka0902_cpu$r_cbctl_l_bits; } ka0902_cpu$r_cbctl_fields_l_ol; __union { unsigned int ka0902_cpu$l_cbctl_h; __struct { unsigned ka0902_cpu$v_cbctl_dwp_h : 1; unsigned ka0902_cpu$v_cbctl_cawp_h : 2; unsigned ka0902_cpu$v_cbctl_epc_h : 1; unsigned ka0902_cpu$v_cbctl_frc_sh_h : 1; unsigned ka0902_cpu$v_cbctl_cmder_id_h : 3; unsigned ka0902_cpu$v_cbctl_acm_h : 3; unsigned ka0902_cpu$v_cbctl_enb_ci_h : 1; unsigned ka0902_cpu$v_cbctl_rd_h : 1; unsigned ka0902_cpu$v_cbctl_qw_2_sel_h : 1; unsigned ka0902_cpu$v_cbctl_sel_drack_h : 1; unsigned ka0902_cpu$v_cbctl_fill1_h : 17; } ka0902_cpu$r_cbctl_h_bits; } ka0902_cpu$r_cbctl_fields_h_ol; } ka0902_cpu$r_cbctl_fields; } ka0902_cpu$r_cbctl_ol; char ka0902_cpu$b_fill33 [24]; /* Cobra bus Error Register - CBE */ __union { __int64 ka0902_cpu$q_cbe; __struct { __union { unsigned int ka0902_cpu$l_cbe_l; __struct { unsigned ka0902_cpu$v_cbe_fill1_l : 1; unsigned ka0902_cpu$v_cbe_diag_l : 1; unsigned ka0902_cpu$v_cbe_cap_l : 1; unsigned ka0902_cpu$v_cbe_mcap_l : 1; unsigned ka0902_cpu$v_cbe_pe_wrd_l : 1; unsigned ka0902_cpu$v_cbe_mpe_wrd_l : 1; unsigned ka0902_cpu$v_cbe_pe_rd_l : 1; unsigned ka0902_cpu$v_cbe_mpe_rd_l : 1; unsigned ka0902_cpu$v_cbe_ca_pe_lw0 : 1; unsigned ka0902_cpu$v_cbe_ca_pe_lw2 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw0 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw2 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw4 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw6 : 1; unsigned ka0902_cpu$v_cbe_ca_nack_l : 1; unsigned ka0902_cpu$v_cbe_wr_data_nack_l : 1; unsigned ka0902_cpu$v_cbe_fill2 : 8; unsigned ka0902_cpu$v_cbe_mcount_l : 6; unsigned ka0902_cpu$v_cbe_madr_valid_l : 1; unsigned ka0902_cpu$v_fill_0_ : 1; } ka0902_cpu$r_cbe_l_bits; } ka0902_cpu$r_cbe_fields_l_ol; __union { unsigned int ka0902_cpu$l_cbe_h; __struct { unsigned ka0902_cpu$v_cbe_fill3 : 1; unsigned ka0902_cpu$v_cbe_diag_h : 1; unsigned ka0902_cpu$v_cbe_cap_h : 1; unsigned ka0902_cpu$v_cbe_mcap_h : 1; unsigned ka0902_cpu$v_cbe_pe_wrd_h : 1; unsigned ka0902_cpu$v_cbe_mpe_wrd_h : 1; unsigned ka0902_cpu$v_cbe_pe_rd_h : 1; unsigned ka0902_cpu$v_cbe_mpe_rd_h : 1; unsigned ka0902_cpu$v_cbe_ca_pe_lw1 : 1; unsigned ka0902_cpu$v_cbe_ca_pe_lw3 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw1 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw3 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw5 : 1; unsigned ka0902_cpu$v_cbe_d_pe_lw7 : 1; unsigned ka0902_cpu$v_cbe_undefined : 1; unsigned ka0902_cpu$v_cbe_undefined2 : 1; unsigned ka0902_cpu$v_cbe_fill2_h : 8; unsigned ka0902_cpu$v_cbe_mcount_h : 6; unsigned ka0902_cpu$v_cbe_madr_valid_h : 1; unsigned ka0902_cpu$v_fill_1_ : 1; } ka0902_cpu$r_cbe_h_bits; } ka0902_cpu$r_cbe_fields_h_ol; } ka0902_cpu$r_cbe_fields; } ka0902_cpu$r_cbe_ol; char ka0902_cpu$b_fill34 [24]; /* Cobra bus Error Address Low Register - CBEAL */ __union { __int64 ka0902_cpu$q_cbeal; __struct { __union { unsigned int ka0902_cpu$l_cbeal_l; __struct { unsigned ka0902_cpu$v_cbeal_sbo_l : 2; unsigned ka0902_cpu$v_cbeal_addr_cad_l : 30; } ka0902_cpu$r_cbeal_l_bits; } ka0902_cpu$r_cbeal_fields_l_ol; __union { unsigned int ka0902_cpu$l_cbeal_h; __struct { unsigned ka0902_cpu$v_cbeal_sbo_h : 2; unsigned ka0902_cpu$v_cbeal_addr_cad_h : 30; } ka0902_cpu$r_cbeal_h_bits; } ka0902_cpu$r_cbeal_fields_h_ol; } ka0902_cpu$r_cbeal_fields; } ka0902_cpu$r_cbeal_ol; char ka0902_cpu$b_fill35 [24]; /* Cobra bus Error Address High Register - CBEAH */ __union { __int64 ka0902_cpu$q_cbeah; __struct { __union { unsigned int ka0902_cpu$l_cbeah_l; __struct { unsigned ka0902_cpu$v_cbeah_sb0_l : 2; unsigned ka0902_cpu$v_cbeah_ea_l : 16; unsigned ka0902_cpu$v_cbeah_t_type_l : 3; unsigned ka0902_cpu$v_cbeah_cmdr_id_l : 3; unsigned ka0902_cpu$v_cbeah_sb1_l : 8; } ka0902_cpu$r_cbeah_l_bits; } ka0902_cpu$r_cbeah_fields_l_ol; __union { unsigned int ka0902_cpu$l_cbeah_h; __struct { unsigned ka0902_cpu$v_cbeah_sb0_h : 2; unsigned ka0902_cpu$v_cbeah_ea_h : 16; unsigned ka0902_cpu$v_cbeah_t_type_h : 3; unsigned ka0902_cpu$v_cbeah_cmdr_id_h : 3; unsigned ka0902_cpu$v_cbeah_sb1_h : 8; } ka0902_cpu$r_cbeah_h_bits; } ka0902_cpu$r_cbeah_fields_h_ol; } ka0902_cpu$r_cbeah_fields; } ka0902_cpu$r_cbeah_ol; char ka0902_cpu$b_fill36 [24]; /* Processor Mailbox Register - PMBX */ __union { __int64 ka0902_cpu$q_pmbx; __struct { __union { unsigned int ka0902_cpu$l_pmbx_l; __struct { unsigned ka0902_cpu$v_pmbx_fill1_l : 32; } ka0902_cpu$r_pmbx_l_bits; } ka0902_cpu$r_pmbx_fields_l_ol; __union { unsigned int ka0902_cpu$l_pmbx_h; __struct { unsigned ka0902_cpu$v_pmbx_fill1_h : 32; } ka0902_cpu$r_pmbx_h_bits; } ka0902_cpu$r_pmbx_fields_h_ol; } ka0902_cpu$r_pmbx_fields; } ka0902_cpu$r_pmbx_ol; char ka0902_cpu$b_fill37 [24]; /* Interprocessor Interrupt Request Register - IPIR */ __union { __int64 ka0902_cpu$q_ipir; __struct { __union { unsigned int ka0902_cpu$l_ipir_l; __struct { unsigned ka0902_cpu$v_ipir_undefined : 1; unsigned ka0902_cpu$v_ipir_fill1 : 31; } ka0902_cpu$r_ipir_l_bits; } ka0902_cpu$r_ipir_fields_l_ol; __union { unsigned int ka0902_cpu$l_ipir_h; __struct { unsigned ka0902_cpu$v_ipir_req_int_cpu : 1; unsigned ka0902_cpu$v_ipir_fill2 : 2; unsigned ka0902_cpu$v_ipir_req_node_halt : 1; unsigned ka0902_cpu$v_ipir_fill3 : 28; } ka0902_cpu$r_ipir_h_bits; } ka0902_cpu$r_ipir_fields_h_ol; } ka0902_cpu$r_ipir_fields; } ka0902_cpu$r_ipir_ol; char ka0902_cpu$b_fill38 [24]; /* System Interrupt Clear Register - SIC */ __union { __int64 ka0902_cpu$q_sic; __struct { __union { unsigned int ka0902_cpu$l_sic_l; __struct { unsigned ka0902_cpu$v_sic_undefined0 : 1; unsigned ka0902_cpu$v_sic_undefined1 : 1; unsigned ka0902_cpu$v_sic_eic : 1; unsigned ka0902_cpu$v_sic_undefined2 : 1; unsigned ka0902_cpu$v_sic_fill1 : 28; } ka0902_cpu$r_sic_l_bits; } ka0902_cpu$r_sic_fields_l_ol; __union { unsigned int ka0902_cpu$l_sic_h; __struct { unsigned ka0902_cpu$v_sic_it_iclear : 1; unsigned ka0902_cpu$v_sic_sys_evt_clr : 1; unsigned ka0902_cpu$v_sic_undefined3 : 1; unsigned ka0902_cpu$v_sic_node_halt_clr : 1; unsigned ka0902_cpu$v_sic_fill2 : 28; } ka0902_cpu$r_sic_h_bits; } ka0902_cpu$r_sic_fields_h_ol; } ka0902_cpu$r_sic_fields; } ka0902_cpu$r_sic_ol; char ka0902_cpu$b_fill39 [24]; /* Address Lock Register - ADLK */ __union { __int64 ka0902_cpu$q_adlk; __struct { __union { unsigned int ka0902_cpu$l_adlk_l; __struct { unsigned ka0902_cpu$v_adlk_la_v_l : 1; unsigned ka0902_cpu$v_adlk_fill1 : 2; unsigned ka0902_cpu$v_adlk_la_l : 29; } ka0902_cpu$r_adlk_l_bits; } ka0902_cpu$r_adlk_fields_l_ol; __union { unsigned int ka0902_cpu$l_adlk_h; __struct { unsigned ka0902_cpu$v_adlk_la_v_h : 1; unsigned ka0902_cpu$v_adlk_fill2 : 2; unsigned ka0902_cpu$v_adlk_la_h : 29; } ka0902_cpu$r_adlk_h_bits; } ka0902_cpu$r_adlk_fields_h_ol; } ka0902_cpu$r_adlk_fields; } ka0902_cpu$r_adlk_ol; char ka0902_cpu$b_fill40 [24]; /* Miss Address Register - MADRL */ __union { __int64 ka0902_cpu$q_madrl; __struct { __union { unsigned int ka0902_cpu$l_madrl_l; __struct { unsigned ka0902_cpu$v_madrl_valid_l : 1; unsigned ka0902_cpu$v_madrl_t_type_l : 1; unsigned ka0902_cpu$v_madrl_address_l : 30; } ka0902_cpu$r_madrl_l_bits; } ka0902_cpu$r_madrl_fields_l_ol; __union { unsigned int ka0902_cpu$l_madrl_h; __struct { unsigned ka0902_cpu$v_madrl_valid_h : 1; unsigned ka0902_cpu$v_madrl_t_type_h : 1; unsigned ka0902_cpu$v_madrl_address_h : 30; } ka0902_cpu$r_madrl_h_bits; } ka0902_cpu$r_madrl_fields_h_ol; } ka0902_cpu$r_madrl_fields; } ka0902_cpu$r_madrl_ol; char ka0902_cpu$b_fill41 [24]; /* C3 revision Register - CRREVS */ __union { __int64 ka0902_cpu$q_crrevs; __struct { __union { unsigned int ka0902_cpu$l_crrevs_l; __struct { unsigned ka0902_cpu$v_crrevs_rev_l : 4; unsigned ka0902_cpu$v_crrevs_cpu_mode_l : 1; unsigned ka0902_cpu$v_crrevs_c3_speed_l : 7; unsigned ka0902_cpu$v_crrevs_sb0_l : 1; unsigned ka0902_cpu$v_crrevs_fill1_l : 1; unsigned ka0902_cpu$v_crrevs_io_retry_l : 1; unsigned ka0902_cpu$v_crrevs_fill2_l : 6; unsigned ka0902_cpu$v_crrevs_pch_inv_l : 1; unsigned ka0902_cpu$v_crrevs_fill3_l : 7; unsigned ka0902_cpu$v_fill_2_ : 3; } ka0902_cpu$r_crrevs_l_bits; } ka0902_cpu$r_crrevs_fields_l_ol; __union { unsigned int ka0902_cpu$l_crrevs_h; __struct { unsigned ka0902_cpu$v_crrevs_rev_h : 4; unsigned ka0902_cpu$v_crrevs_cpu_mode_h : 1; unsigned ka0902_cpu$v_crrevs_c3_speed_h : 7; unsigned ka0902_cpu$v_crrevs_sb0_h : 1; unsigned ka0902_cpu$v_crrevs_fill1_h : 1; unsigned ka0902_cpu$v_crrevs_io_retry_h : 1; unsigned ka0902_cpu$v_crrevs_fill2_h : 6; unsigned ka0902_cpu$v_crrevs_pch_inv_h : 1; unsigned ka0902_cpu$v_crrevs_fill3_h : 7; unsigned ka0902_cpu$v_fill_3_ : 3; } ka0902_cpu$r_crrevs_h_bits; } ka0902_cpu$r_crrevs_fields_h_ol; } ka0902_cpu$r_crrevs_fields; } ka0902_cpu$r_crrevs_ol; } KA0902_CPU; #if !defined(__VAXC) #define ka0902_cpu$q_bcc ka0902_cpu$r_bcc_ol.ka0902_cpu$q_bcc #define ka0902_cpu$l_bcc_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$l_bcc_l #define ka0902_cpu$v_bcc_enb_alloc_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bi\ ts.ka0902_cpu$v_bcc_enb_alloc_l #define ka0902_cpu$v_bcc_frc_fill_sh_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_\ bits.ka0902_cpu$v_bcc_frc_fill_sh_l #define ka0902_cpu$v_bcc_enb_tpc_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bits\ .ka0902_cpu$v_bcc_enb_tpc_l #define ka0902_cpu$v_bcc_fill_wtp_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bit\ s.ka0902_cpu$v_bcc_fill_wtp_l #define ka0902_cpu$v_bcc_fill_wcp_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bit\ s.ka0902_cpu$v_bcc_fill_wcp_l #define ka0902_cpu$v_bcc_fill_wdtp_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bi\ ts.ka0902_cpu$v_bcc_fill_wdtp_l #define ka0902_cpu$v_bcc_enb_cei_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bits\ .ka0902_cpu$v_bcc_enb_cei_l #define ka0902_cpu$v_bcc_enb_edcc_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bit\ s.ka0902_cpu$v_bcc_enb_edcc_l #define ka0902_cpu$v_bcc_enb_edc_chk_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_\ bits.ka0902_cpu$v_bcc_enb_edc_chk_l #define ka0902_cpu$v_bcc_enb_bc_cio_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_b\ its.ka0902_cpu$v_bcc_enb_bc_cio_l #define ka0902_cpu$v_bcc_dis_blk_w_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bi\ ts.ka0902_cpu$v_bcc_dis_blk_w_l #define ka0902_cpu$v_bcc_enb_bc_init_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_\ bits.ka0902_cpu$v_bcc_enb_bc_init_l #define ka0902_cpu$v_bcc_for_edcc_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bit\ s.ka0902_cpu$v_bcc_for_edcc_l #define ka0902_cpu$v_bcc_sh_d_v_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bits.\ ka0902_cpu$v_bcc_sh_d_v_l #define ka0902_cpu$v_bcc_edc_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_bits.ka0\ 902_cpu$v_bcc_edc_l #define ka0902_cpu$v_bcc_cache_size_l ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_l_ol.ka0902_cpu$r_bcc_l_b\ its.ka0902_cpu$v_bcc_cache_size_l #define ka0902_cpu$l_bcc_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$l_bcc_h #define ka0902_cpu$v_bcc_enb_alloc_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bi\ ts.ka0902_cpu$v_bcc_enb_alloc_h #define ka0902_cpu$v_bcc_frc_fill_sh_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_\ bits.ka0902_cpu$v_bcc_frc_fill_sh_h #define ka0902_cpu$v_bcc_enb_tpc_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bits\ .ka0902_cpu$v_bcc_enb_tpc_h #define ka0902_cpu$v_bcc_fill_wtp_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bit\ s.ka0902_cpu$v_bcc_fill_wtp_h #define ka0902_cpu$v_bcc_fill_wcp_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bit\ s.ka0902_cpu$v_bcc_fill_wcp_h #define ka0902_cpu$v_bcc_fill_wdtp_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bi\ ts.ka0902_cpu$v_bcc_fill_wdtp_h #define ka0902_cpu$v_bcc_enb_cei_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bits\ .ka0902_cpu$v_bcc_enb_cei_h #define ka0902_cpu$v_bcc_enb_edcc_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bit\ s.ka0902_cpu$v_bcc_enb_edcc_h #define ka0902_cpu$v_bcc_enb_edc_chk_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_\ bits.ka0902_cpu$v_bcc_enb_edc_chk_h #define ka0902_cpu$v_bcc_enb_bc_cio_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_b\ its.ka0902_cpu$v_bcc_enb_bc_cio_h #define ka0902_cpu$v_bcc_dis_blk_w_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bi\ ts.ka0902_cpu$v_bcc_dis_blk_w_h #define ka0902_cpu$v_bcc_enb_bc_init_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_\ bits.ka0902_cpu$v_bcc_enb_bc_init_h #define ka0902_cpu$v_bcc_for_edcc_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bit\ s.ka0902_cpu$v_bcc_for_edcc_h #define ka0902_cpu$v_bcc_sh_d_v_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bits.\ ka0902_cpu$v_bcc_sh_d_v_h #define ka0902_cpu$v_bcc_edc_l_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_bits.k\ a0902_cpu$v_bcc_edc_l_h #define ka0902_cpu$v_bcc_cache_size_h ka0902_cpu$r_bcc_ol.ka0902_cpu$r_bcc_fields.ka0902_cpu$r_bcc_fields_h_ol.ka0902_cpu$r_bcc_h_b\ its.ka0902_cpu$v_bcc_cache_size_h #define ka0902_cpu$q_bcce ka0902_cpu$r_bcce_ol.ka0902_cpu$q_bcce #define ka0902_cpu$l_bcce_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$l_bcce_l #define ka0902_cpu$v_bcce_mce_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_l_bit\ s.ka0902_cpu$v_bcce_mce_l #define ka0902_cpu$v_bcce_ce_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_l_bits\ .ka0902_cpu$v_bcce_ce_l #define ka0902_cpu$v_bcce_cntrl_par_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce\ _l_bits.ka0902_cpu$v_bcce_cntrl_par_l #define ka0902_cpu$v_bcce_sh_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_l_bits\ .ka0902_cpu$v_bcce_sh_l #define ka0902_cpu$v_bcce_dirty_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_l_b\ its.ka0902_cpu$v_bcce_dirty_l #define ka0902_cpu$v_bcce_valid_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_l_b\ its.ka0902_cpu$v_bcce_valid_l #define ka0902_cpu$v_bcce_bc_edc_l ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_l_\ bits.ka0902_cpu$v_bcce_bc_edc_l #define ka0902_cpu$v_bcce_edc_synd_0 ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_\ l_bits.ka0902_cpu$v_bcce_edc_synd_0 #define ka0902_cpu$v_bcce_edc_synd_2 ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_l_ol.ka0902_cpu$r_bcce_\ l_bits.ka0902_cpu$v_bcce_edc_synd_2 #define ka0902_cpu$l_bcce_h ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_h_ol.ka0902_cpu$l_bcce_h #define ka0902_cpu$v_bcce_mce_h ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_h_ol.ka0902_cpu$r_bcce_h_bit\ s.ka0902_cpu$v_bcce_mce_h #define ka0902_cpu$v_bcce_ce_h ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_h_ol.ka0902_cpu$r_bcce_h_bits\ .ka0902_cpu$v_bcce_ce_h #define ka0902_cpu$v_bcce_read_only ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_h_ol.ka0902_cpu$r_bcce_h\ _bits.ka0902_cpu$v_bcce_read_only #define ka0902_cpu$v_bcce_bc_edc_h ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_h_ol.ka0902_cpu$r_bcce_h_\ bits.ka0902_cpu$v_bcce_bc_edc_h #define ka0902_cpu$v_bcce_edc_synd_1 ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_h_ol.ka0902_cpu$r_bcce_\ h_bits.ka0902_cpu$v_bcce_edc_synd_1 #define ka0902_cpu$v_bcce_edc_synd_3 ka0902_cpu$r_bcce_ol.ka0902_cpu$r_bcce_fields.ka0902_cpu$r_bcce_fields_h_ol.ka0902_cpu$r_bcce_\ h_bits.ka0902_cpu$v_bcce_edc_synd_3 #define ka0902_cpu$q_bccea ka0902_cpu$r_bccea_ol.ka0902_cpu$q_bccea #define ka0902_cpu$l_bccea_l ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_l_ol.ka0902_cpu$l_bccea_l #define ka0902_cpu$v_bccea_bcmap_off_l ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_l_ol.ka0902_cpu$r_\ bccea_l_bits.ka0902_cpu$v_bccea_bcmap_off_l #define ka0902_cpu$v_bccea_tag_par_l ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_l_ol.ka0902_cpu$r_bc\ cea_l_bits.ka0902_cpu$v_bccea_tag_par_l #define ka0902_cpu$v_bccea_tag_value_l ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_l_ol.ka0902_cpu$r_\ bccea_l_bits.ka0902_cpu$v_bccea_tag_value_l #define ka0902_cpu$l_bccea_h ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_h_ol.ka0902_cpu$l_bccea_h #define ka0902_cpu$v_bccea_bcmap_off_h ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_h_ol.ka0902_cpu$r_\ bccea_h_bits.ka0902_cpu$v_bccea_bcmap_off_h #define ka0902_cpu$v_bccea_tag_par_h ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_h_ol.ka0902_cpu$r_bc\ cea_h_bits.ka0902_cpu$v_bccea_tag_par_h #define ka0902_cpu$v_bccea_tag_value_h ka0902_cpu$r_bccea_ol.ka0902_cpu$r_bccea_fields.ka0902_cpu$r_bccea_fields_h_ol.ka0902_cpu$r_\ bccea_h_bits.ka0902_cpu$v_bccea_tag_value_h #define ka0902_cpu$q_bcue ka0902_cpu$r_bcue_ol.ka0902_cpu$q_bcue #define ka0902_cpu$l_bcue_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$l_bcue_l #define ka0902_cpu$v_bcue_mpe_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_bit\ s.ka0902_cpu$v_bcue_mpe_l #define ka0902_cpu$v_bcue_pe_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_bits\ .ka0902_cpu$v_bcue_pe_l #define ka0902_cpu$v_bcue_munce_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_b\ its.ka0902_cpu$v_bcue_munce_l #define ka0902_cpu$v_bcue_unce_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_bi\ ts.ka0902_cpu$v_bcue_unce_l #define ka0902_cpu$v_bcue_ctrl_par_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_\ l_bits.ka0902_cpu$v_bcue_ctrl_par_l #define ka0902_cpu$v_bcue_sh_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_bits\ .ka0902_cpu$v_bcue_sh_l #define ka0902_cpu$v_bcue_dirty_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_b\ its.ka0902_cpu$v_bcue_dirty_l #define ka0902_cpu$v_bcue_valid_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_b\ its.ka0902_cpu$v_bcue_valid_l #define ka0902_cpu$v_bcue_bc_edc_l ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_l_\ bits.ka0902_cpu$v_bcue_bc_edc_l #define ka0902_cpu$v_bcue_edc_synd_0 ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_\ l_bits.ka0902_cpu$v_bcue_edc_synd_0 #define ka0902_cpu$v_bcue_edc_synd_2 ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_l_ol.ka0902_cpu$r_bcue_\ l_bits.ka0902_cpu$v_bcue_edc_synd_2 #define ka0902_cpu$l_bcue_h ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$l_bcue_h #define ka0902_cpu$v_bcue_mpe_h ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$r_bcue_h_bit\ s.ka0902_cpu$v_bcue_mpe_h #define ka0902_cpu$v_bcue_pe_h ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$r_bcue_h_bits\ .ka0902_cpu$v_bcue_pe_h #define ka0902_cpu$v_bcue_munce_h ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$r_bcue_h_b\ its.ka0902_cpu$v_bcue_munce_h #define ka0902_cpu$v_bcue_unce_h ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$r_bcue_h_bi\ ts.ka0902_cpu$v_bcue_unce_h #define ka0902_cpu$v_bcue_bc_edc_h ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$r_bcue_h_\ bits.ka0902_cpu$v_bcue_bc_edc_h #define ka0902_cpu$v_bcue_edc_synd_1 ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$r_bcue_\ h_bits.ka0902_cpu$v_bcue_edc_synd_1 #define ka0902_cpu$v_bcue_edc_synd_3 ka0902_cpu$r_bcue_ol.ka0902_cpu$r_bcue_fields.ka0902_cpu$r_bcue_fields_h_ol.ka0902_cpu$r_bcue_\ h_bits.ka0902_cpu$v_bcue_edc_synd_3 #define ka0902_cpu$q_bcuea ka0902_cpu$r_bcuea_ol.ka0902_cpu$q_bcuea #define ka0902_cpu$l_bcuea_l ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_l_ol.ka0902_cpu$l_bcuea_l #define ka0902_cpu$v_bcuea_bcmap_off_l ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_l_ol.ka0902_cpu$r_\ bcuea_l_bits.ka0902_cpu$v_bcuea_bcmap_off_l #define ka0902_cpu$v_bcuea_ptp_l ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_l_ol.ka0902_cpu$r_bcuea_\ l_bits.ka0902_cpu$v_bcuea_ptp_l #define ka0902_cpu$v_bcuea_tp_l ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_l_ol.ka0902_cpu$r_bcuea_l\ _bits.ka0902_cpu$v_bcuea_tp_l #define ka0902_cpu$v_bcuea_tv_l ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_l_ol.ka0902_cpu$r_bcuea_l\ _bits.ka0902_cpu$v_bcuea_tv_l #define ka0902_cpu$v_bcuea_fill1_l ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_l_ol.ka0902_cpu$r_bcue\ a_l_bits.ka0902_cpu$v_bcuea_fill1_l #define ka0902_cpu$l_bcuea_h ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_h_ol.ka0902_cpu$l_bcuea_h #define ka0902_cpu$v_bcuea_bcmap_off_h ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_h_ol.ka0902_cpu$r_\ bcuea_h_bits.ka0902_cpu$v_bcuea_bcmap_off_h #define ka0902_cpu$v_bcuea_ptp_h ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_h_ol.ka0902_cpu$r_bcuea_\ h_bits.ka0902_cpu$v_bcuea_ptp_h #define ka0902_cpu$v_bcuea_tp_h ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_h_ol.ka0902_cpu$r_bcuea_h\ _bits.ka0902_cpu$v_bcuea_tp_h #define ka0902_cpu$v_bcuea_tv_h ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_h_ol.ka0902_cpu$r_bcuea_h\ _bits.ka0902_cpu$v_bcuea_tv_h #define ka0902_cpu$v_bcuea_fill1_h ka0902_cpu$r_bcuea_ol.ka0902_cpu$r_bcuea_fields.ka0902_cpu$r_bcuea_fields_h_ol.ka0902_cpu$r_bcue\ a_h_bits.ka0902_cpu$v_bcuea_fill1_h #define ka0902_cpu$q_dter ka0902_cpu$r_dter_ol.ka0902_cpu$q_dter #define ka0902_cpu$l_dter_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$l_dter_l #define ka0902_cpu$v_dter_mdter_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$r_dter_l_b\ its.ka0902_cpu$v_dter_mdter_l #define ka0902_cpu$v_dter_dter_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$r_dter_l_bi\ ts.ka0902_cpu$v_dter_dter_l #define ka0902_cpu$v_dter_toff_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$r_dter_l_bi\ ts.ka0902_cpu$v_dter_toff_l #define ka0902_cpu$v_dter_bank0_tag_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$r_dter\ _l_bits.ka0902_cpu$v_dter_bank0_tag_l #define ka0902_cpu$v_dter_bank0_par_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$r_dter\ _l_bits.ka0902_cpu$v_dter_bank0_par_l #define ka0902_cpu$v_dter_bank1_tag_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$r_dter\ _l_bits.ka0902_cpu$v_dter_bank1_tag_l #define ka0902_cpu$v_dter_bank1_par_l ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_l_ol.ka0902_cpu$r_dter\ _l_bits.ka0902_cpu$v_dter_bank1_par_l #define ka0902_cpu$l_dter_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$l_dter_h #define ka0902_cpu$v_dter_mdter_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$r_dter_h_b\ its.ka0902_cpu$v_dter_mdter_h #define ka0902_cpu$v_dter_dter_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$r_dter_h_bi\ ts.ka0902_cpu$v_dter_dter_h #define ka0902_cpu$v_dter_toff_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$r_dter_h_bi\ ts.ka0902_cpu$v_dter_toff_h #define ka0902_cpu$v_dter_bank0_tag_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$r_dter\ _h_bits.ka0902_cpu$v_dter_bank0_tag_h #define ka0902_cpu$v_dter_bank0_par_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$r_dter\ _h_bits.ka0902_cpu$v_dter_bank0_par_h #define ka0902_cpu$v_dter_bank1_tag_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$r_dter\ _h_bits.ka0902_cpu$v_dter_bank1_tag_h #define ka0902_cpu$v_dter_bank1_par_h ka0902_cpu$r_dter_ol.ka0902_cpu$r_dter_fields.ka0902_cpu$r_dter_fields_h_ol.ka0902_cpu$r_dter\ _h_bits.ka0902_cpu$v_dter_bank1_par_h #define ka0902_cpu$q_cbctl ka0902_cpu$r_cbctl_ol.ka0902_cpu$q_cbctl #define ka0902_cpu$l_cbctl_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$l_cbctl_l #define ka0902_cpu$v_cbctl_dwp_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_cbctl_\ l_bits.ka0902_cpu$v_cbctl_dwp_l #define ka0902_cpu$v_cbctl_cawp_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_cbctl\ _l_bits.ka0902_cpu$v_cbctl_cawp_l #define ka0902_cpu$v_cbctl_epc_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_cbctl_\ l_bits.ka0902_cpu$v_cbctl_epc_l #define ka0902_cpu$v_cbctl_frc_sh_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_cbc\ tl_l_bits.ka0902_cpu$v_cbctl_frc_sh_l #define ka0902_cpu$v_cbctl_cmder_id_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_c\ bctl_l_bits.ka0902_cpu$v_cbctl_cmder_id_l #define ka0902_cpu$v_cbctl_acm_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_cbctl_\ l_bits.ka0902_cpu$v_cbctl_acm_l #define ka0902_cpu$v_cbctl_enb_ci_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_cbc\ tl_l_bits.ka0902_cpu$v_cbctl_enb_ci_l #define ka0902_cpu$v_cbctl_rd_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_cbctl_l\ _bits.ka0902_cpu$v_cbctl_rd_l #define ka0902_cpu$v_cbctl_qw_2_sel_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_c\ bctl_l_bits.ka0902_cpu$v_cbctl_qw_2_sel_l #define ka0902_cpu$v_cbctl_sel_drack_l ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_l_ol.ka0902_cpu$r_\ cbctl_l_bits.ka0902_cpu$v_cbctl_sel_drack_l #define ka0902_cpu$l_cbctl_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$l_cbctl_h #define ka0902_cpu$v_cbctl_dwp_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_cbctl_\ h_bits.ka0902_cpu$v_cbctl_dwp_h #define ka0902_cpu$v_cbctl_cawp_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_cbctl\ _h_bits.ka0902_cpu$v_cbctl_cawp_h #define ka0902_cpu$v_cbctl_epc_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_cbctl_\ h_bits.ka0902_cpu$v_cbctl_epc_h #define ka0902_cpu$v_cbctl_frc_sh_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_cbc\ tl_h_bits.ka0902_cpu$v_cbctl_frc_sh_h #define ka0902_cpu$v_cbctl_cmder_id_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_c\ bctl_h_bits.ka0902_cpu$v_cbctl_cmder_id_h #define ka0902_cpu$v_cbctl_acm_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_cbctl_\ h_bits.ka0902_cpu$v_cbctl_acm_h #define ka0902_cpu$v_cbctl_enb_ci_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_cbc\ tl_h_bits.ka0902_cpu$v_cbctl_enb_ci_h #define ka0902_cpu$v_cbctl_rd_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_cbctl_h\ _bits.ka0902_cpu$v_cbctl_rd_h #define ka0902_cpu$v_cbctl_qw_2_sel_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_c\ bctl_h_bits.ka0902_cpu$v_cbctl_qw_2_sel_h #define ka0902_cpu$v_cbctl_sel_drack_h ka0902_cpu$r_cbctl_ol.ka0902_cpu$r_cbctl_fields.ka0902_cpu$r_cbctl_fields_h_ol.ka0902_cpu$r_\ cbctl_h_bits.ka0902_cpu$v_cbctl_sel_drack_h #define ka0902_cpu$q_cbe ka0902_cpu$r_cbe_ol.ka0902_cpu$q_cbe #define ka0902_cpu$l_cbe_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$l_cbe_l #define ka0902_cpu$v_cbe_diag_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.ka\ 0902_cpu$v_cbe_diag_l #define ka0902_cpu$v_cbe_cap_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.ka0\ 902_cpu$v_cbe_cap_l #define ka0902_cpu$v_cbe_mcap_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.ka\ 0902_cpu$v_cbe_mcap_l #define ka0902_cpu$v_cbe_pe_wrd_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.\ ka0902_cpu$v_cbe_pe_wrd_l #define ka0902_cpu$v_cbe_mpe_wrd_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits\ .ka0902_cpu$v_cbe_mpe_wrd_l #define ka0902_cpu$v_cbe_pe_rd_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.k\ a0902_cpu$v_cbe_pe_rd_l #define ka0902_cpu$v_cbe_mpe_rd_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.\ ka0902_cpu$v_cbe_mpe_rd_l #define ka0902_cpu$v_cbe_ca_pe_lw0 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits\ .ka0902_cpu$v_cbe_ca_pe_lw0 #define ka0902_cpu$v_cbe_ca_pe_lw2 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits\ .ka0902_cpu$v_cbe_ca_pe_lw2 #define ka0902_cpu$v_cbe_d_pe_lw0 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.\ ka0902_cpu$v_cbe_d_pe_lw0 #define ka0902_cpu$v_cbe_d_pe_lw2 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.\ ka0902_cpu$v_cbe_d_pe_lw2 #define ka0902_cpu$v_cbe_d_pe_lw4 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.\ ka0902_cpu$v_cbe_d_pe_lw4 #define ka0902_cpu$v_cbe_d_pe_lw6 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.\ ka0902_cpu$v_cbe_d_pe_lw6 #define ka0902_cpu$v_cbe_ca_nack_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits\ .ka0902_cpu$v_cbe_ca_nack_l #define ka0902_cpu$v_cbe_wr_data_nack_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l\ _bits.ka0902_cpu$v_cbe_wr_data_nack_l #define ka0902_cpu$v_cbe_mcount_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_bits.\ ka0902_cpu$v_cbe_mcount_l #define ka0902_cpu$v_cbe_madr_valid_l ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_l_ol.ka0902_cpu$r_cbe_l_b\ its.ka0902_cpu$v_cbe_madr_valid_l #define ka0902_cpu$l_cbe_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$l_cbe_h #define ka0902_cpu$v_cbe_diag_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.ka\ 0902_cpu$v_cbe_diag_h #define ka0902_cpu$v_cbe_cap_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.ka0\ 902_cpu$v_cbe_cap_h #define ka0902_cpu$v_cbe_mcap_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.ka\ 0902_cpu$v_cbe_mcap_h #define ka0902_cpu$v_cbe_pe_wrd_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.\ ka0902_cpu$v_cbe_pe_wrd_h #define ka0902_cpu$v_cbe_mpe_wrd_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits\ .ka0902_cpu$v_cbe_mpe_wrd_h #define ka0902_cpu$v_cbe_pe_rd_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.k\ a0902_cpu$v_cbe_pe_rd_h #define ka0902_cpu$v_cbe_mpe_rd_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.\ ka0902_cpu$v_cbe_mpe_rd_h #define ka0902_cpu$v_cbe_ca_pe_lw1 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits\ .ka0902_cpu$v_cbe_ca_pe_lw1 #define ka0902_cpu$v_cbe_ca_pe_lw3 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits\ .ka0902_cpu$v_cbe_ca_pe_lw3 #define ka0902_cpu$v_cbe_d_pe_lw1 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.\ ka0902_cpu$v_cbe_d_pe_lw1 #define ka0902_cpu$v_cbe_d_pe_lw3 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.\ ka0902_cpu$v_cbe_d_pe_lw3 #define ka0902_cpu$v_cbe_d_pe_lw5 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.\ ka0902_cpu$v_cbe_d_pe_lw5 #define ka0902_cpu$v_cbe_d_pe_lw7 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.\ ka0902_cpu$v_cbe_d_pe_lw7 #define ka0902_cpu$v_cbe_undefined ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits\ .ka0902_cpu$v_cbe_undefined #define ka0902_cpu$v_cbe_undefined2 ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bit\ s.ka0902_cpu$v_cbe_undefined2 #define ka0902_cpu$v_cbe_mcount_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_bits.\ ka0902_cpu$v_cbe_mcount_h #define ka0902_cpu$v_cbe_madr_valid_h ka0902_cpu$r_cbe_ol.ka0902_cpu$r_cbe_fields.ka0902_cpu$r_cbe_fields_h_ol.ka0902_cpu$r_cbe_h_b\ its.ka0902_cpu$v_cbe_madr_valid_h #define ka0902_cpu$q_cbeal ka0902_cpu$r_cbeal_ol.ka0902_cpu$q_cbeal #define ka0902_cpu$l_cbeal_l ka0902_cpu$r_cbeal_ol.ka0902_cpu$r_cbeal_fields.ka0902_cpu$r_cbeal_fields_l_ol.ka0902_cpu$l_cbeal_l #define ka0902_cpu$v_cbeal_sbo_l ka0902_cpu$r_cbeal_ol.ka0902_cpu$r_cbeal_fields.ka0902_cpu$r_cbeal_fields_l_ol.ka0902_cpu$r_cbeal_\ l_bits.ka0902_cpu$v_cbeal_sbo_l #define ka0902_cpu$v_cbeal_addr_cad_l ka0902_cpu$r_cbeal_ol.ka0902_cpu$r_cbeal_fields.ka0902_cpu$r_cbeal_fields_l_ol.ka0902_cpu$r_c\ beal_l_bits.ka0902_cpu$v_cbeal_addr_cad_l #define ka0902_cpu$l_cbeal_h ka0902_cpu$r_cbeal_ol.ka0902_cpu$r_cbeal_fields.ka0902_cpu$r_cbeal_fields_h_ol.ka0902_cpu$l_cbeal_h #define ka0902_cpu$v_cbeal_sbo_h ka0902_cpu$r_cbeal_ol.ka0902_cpu$r_cbeal_fields.ka0902_cpu$r_cbeal_fields_h_ol.ka0902_cpu$r_cbeal_\ h_bits.ka0902_cpu$v_cbeal_sbo_h #define ka0902_cpu$v_cbeal_addr_cad_h ka0902_cpu$r_cbeal_ol.ka0902_cpu$r_cbeal_fields.ka0902_cpu$r_cbeal_fields_h_ol.ka0902_cpu$r_c\ beal_h_bits.ka0902_cpu$v_cbeal_addr_cad_h #define ka0902_cpu$q_cbeah ka0902_cpu$r_cbeah_ol.ka0902_cpu$q_cbeah #define ka0902_cpu$l_cbeah_l ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_l_ol.ka0902_cpu$l_cbeah_l #define ka0902_cpu$v_cbeah_sb0_l ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_l_ol.ka0902_cpu$r_cbeah_\ l_bits.ka0902_cpu$v_cbeah_sb0_l #define ka0902_cpu$v_cbeah_ea_l ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_l_ol.ka0902_cpu$r_cbeah_l\ _bits.ka0902_cpu$v_cbeah_ea_l #define ka0902_cpu$v_cbeah_t_type_l ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_l_ol.ka0902_cpu$r_cbe\ ah_l_bits.ka0902_cpu$v_cbeah_t_type_l #define ka0902_cpu$v_cbeah_cmdr_id_l ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_l_ol.ka0902_cpu$r_cb\ eah_l_bits.ka0902_cpu$v_cbeah_cmdr_id_l #define ka0902_cpu$v_cbeah_sb1_l ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_l_ol.ka0902_cpu$r_cbeah_\ l_bits.ka0902_cpu$v_cbeah_sb1_l #define ka0902_cpu$l_cbeah_h ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_h_ol.ka0902_cpu$l_cbeah_h #define ka0902_cpu$v_cbeah_sb0_h ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_h_ol.ka0902_cpu$r_cbeah_\ h_bits.ka0902_cpu$v_cbeah_sb0_h #define ka0902_cpu$v_cbeah_ea_h ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_h_ol.ka0902_cpu$r_cbeah_h\ _bits.ka0902_cpu$v_cbeah_ea_h #define ka0902_cpu$v_cbeah_t_type_h ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_h_ol.ka0902_cpu$r_cbe\ ah_h_bits.ka0902_cpu$v_cbeah_t_type_h #define ka0902_cpu$v_cbeah_cmdr_id_h ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_h_ol.ka0902_cpu$r_cb\ eah_h_bits.ka0902_cpu$v_cbeah_cmdr_id_h #define ka0902_cpu$v_cbeah_sb1_h ka0902_cpu$r_cbeah_ol.ka0902_cpu$r_cbeah_fields.ka0902_cpu$r_cbeah_fields_h_ol.ka0902_cpu$r_cbeah_\ h_bits.ka0902_cpu$v_cbeah_sb1_h #define ka0902_cpu$q_pmbx ka0902_cpu$r_pmbx_ol.ka0902_cpu$q_pmbx #define ka0902_cpu$l_pmbx_l ka0902_cpu$r_pmbx_ol.ka0902_cpu$r_pmbx_fields.ka0902_cpu$r_pmbx_fields_l_ol.ka0902_cpu$l_pmbx_l #define ka0902_cpu$v_pmbx_fill1_l ka0902_cpu$r_pmbx_ol.ka0902_cpu$r_pmbx_fields.ka0902_cpu$r_pmbx_fields_l_ol.ka0902_cpu$r_pmbx_l_b\ its.ka0902_cpu$v_pmbx_fill1_l #define ka0902_cpu$l_pmbx_h ka0902_cpu$r_pmbx_ol.ka0902_cpu$r_pmbx_fields.ka0902_cpu$r_pmbx_fields_h_ol.ka0902_cpu$l_pmbx_h #define ka0902_cpu$v_pmbx_fill1_h ka0902_cpu$r_pmbx_ol.ka0902_cpu$r_pmbx_fields.ka0902_cpu$r_pmbx_fields_h_ol.ka0902_cpu$r_pmbx_h_b\ its.ka0902_cpu$v_pmbx_fill1_h #define ka0902_cpu$q_ipir ka0902_cpu$r_ipir_ol.ka0902_cpu$q_ipir #define ka0902_cpu$l_ipir_l ka0902_cpu$r_ipir_ol.ka0902_cpu$r_ipir_fields.ka0902_cpu$r_ipir_fields_l_ol.ka0902_cpu$l_ipir_l #define ka0902_cpu$v_ipir_undefined ka0902_cpu$r_ipir_ol.ka0902_cpu$r_ipir_fields.ka0902_cpu$r_ipir_fields_l_ol.ka0902_cpu$r_ipir_l\ _bits.ka0902_cpu$v_ipir_undefined #define ka0902_cpu$l_ipir_h ka0902_cpu$r_ipir_ol.ka0902_cpu$r_ipir_fields.ka0902_cpu$r_ipir_fields_h_ol.ka0902_cpu$l_ipir_h #define ka0902_cpu$v_ipir_req_int_cpu ka0902_cpu$r_ipir_ol.ka0902_cpu$r_ipir_fields.ka0902_cpu$r_ipir_fields_h_ol.ka0902_cpu$r_ipir\ _h_bits.ka0902_cpu$v_ipir_req_int_cpu #define ka0902_cpu$v_ipir_req_node_halt ka0902_cpu$r_ipir_ol.ka0902_cpu$r_ipir_fields.ka0902_cpu$r_ipir_fields_h_ol.ka0902_cpu$r_ip\ ir_h_bits.ka0902_cpu$v_ipir_req_node_halt #define ka0902_cpu$q_sic ka0902_cpu$r_sic_ol.ka0902_cpu$q_sic #define ka0902_cpu$l_sic_l ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_l_ol.ka0902_cpu$l_sic_l #define ka0902_cpu$v_sic_undefined0 ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_l_ol.ka0902_cpu$r_sic_l_bit\ s.ka0902_cpu$v_sic_undefined0 #define ka0902_cpu$v_sic_undefined1 ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_l_ol.ka0902_cpu$r_sic_l_bit\ s.ka0902_cpu$v_sic_undefined1 #define ka0902_cpu$v_sic_eic ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_l_ol.ka0902_cpu$r_sic_l_bits.ka090\ 2_cpu$v_sic_eic #define ka0902_cpu$v_sic_undefined2 ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_l_ol.ka0902_cpu$r_sic_l_bit\ s.ka0902_cpu$v_sic_undefined2 #define ka0902_cpu$l_sic_h ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_h_ol.ka0902_cpu$l_sic_h #define ka0902_cpu$v_sic_it_iclear ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_h_ol.ka0902_cpu$r_sic_h_bits\ .ka0902_cpu$v_sic_it_iclear #define ka0902_cpu$v_sic_sys_evt_clr ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_h_ol.ka0902_cpu$r_sic_h_bi\ ts.ka0902_cpu$v_sic_sys_evt_clr #define ka0902_cpu$v_sic_undefined3 ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_h_ol.ka0902_cpu$r_sic_h_bit\ s.ka0902_cpu$v_sic_undefined3 #define ka0902_cpu$v_sic_node_halt_clr ka0902_cpu$r_sic_ol.ka0902_cpu$r_sic_fields.ka0902_cpu$r_sic_fields_h_ol.ka0902_cpu$r_sic_h_\ bits.ka0902_cpu$v_sic_node_halt_clr #define ka0902_cpu$q_adlk ka0902_cpu$r_adlk_ol.ka0902_cpu$q_adlk #define ka0902_cpu$l_adlk_l ka0902_cpu$r_adlk_ol.ka0902_cpu$r_adlk_fields.ka0902_cpu$r_adlk_fields_l_ol.ka0902_cpu$l_adlk_l #define ka0902_cpu$v_adlk_la_v_l ka0902_cpu$r_adlk_ol.ka0902_cpu$r_adlk_fields.ka0902_cpu$r_adlk_fields_l_ol.ka0902_cpu$r_adlk_l_bi\ ts.ka0902_cpu$v_adlk_la_v_l #define ka0902_cpu$v_adlk_la_l ka0902_cpu$r_adlk_ol.ka0902_cpu$r_adlk_fields.ka0902_cpu$r_adlk_fields_l_ol.ka0902_cpu$r_adlk_l_bits\ .ka0902_cpu$v_adlk_la_l #define ka0902_cpu$l_adlk_h ka0902_cpu$r_adlk_ol.ka0902_cpu$r_adlk_fields.ka0902_cpu$r_adlk_fields_h_ol.ka0902_cpu$l_adlk_h #define ka0902_cpu$v_adlk_la_v_h ka0902_cpu$r_adlk_ol.ka0902_cpu$r_adlk_fields.ka0902_cpu$r_adlk_fields_h_ol.ka0902_cpu$r_adlk_h_bi\ ts.ka0902_cpu$v_adlk_la_v_h #define ka0902_cpu$v_adlk_la_h ka0902_cpu$r_adlk_ol.ka0902_cpu$r_adlk_fields.ka0902_cpu$r_adlk_fields_h_ol.ka0902_cpu$r_adlk_h_bits\ .ka0902_cpu$v_adlk_la_h #define ka0902_cpu$q_madrl ka0902_cpu$r_madrl_ol.ka0902_cpu$q_madrl #define ka0902_cpu$l_madrl_l ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_l_ol.ka0902_cpu$l_madrl_l #define ka0902_cpu$v_madrl_valid_l ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_l_ol.ka0902_cpu$r_madr\ l_l_bits.ka0902_cpu$v_madrl_valid_l #define ka0902_cpu$v_madrl_t_type_l ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_l_ol.ka0902_cpu$r_mad\ rl_l_bits.ka0902_cpu$v_madrl_t_type_l #define ka0902_cpu$v_madrl_address_l ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_l_ol.ka0902_cpu$r_ma\ drl_l_bits.ka0902_cpu$v_madrl_address_l #define ka0902_cpu$l_madrl_h ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_h_ol.ka0902_cpu$l_madrl_h #define ka0902_cpu$v_madrl_valid_h ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_h_ol.ka0902_cpu$r_madr\ l_h_bits.ka0902_cpu$v_madrl_valid_h #define ka0902_cpu$v_madrl_t_type_h ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_h_ol.ka0902_cpu$r_mad\ rl_h_bits.ka0902_cpu$v_madrl_t_type_h #define ka0902_cpu$v_madrl_address_h ka0902_cpu$r_madrl_ol.ka0902_cpu$r_madrl_fields.ka0902_cpu$r_madrl_fields_h_ol.ka0902_cpu$r_ma\ drl_h_bits.ka0902_cpu$v_madrl_address_h #define ka0902_cpu$q_crrevs ka0902_cpu$r_crrevs_ol.ka0902_cpu$q_crrevs #define ka0902_cpu$l_crrevs_l ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_l_ol.ka0902_cpu$l_crrevs\ _l #define ka0902_cpu$v_crrevs_rev_l ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_l_ol.ka0902_cpu$r_cr\ revs_l_bits.ka0902_cpu$v_crrevs_rev_l #define ka0902_cpu$v_crrevs_cpu_mode_l ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_l_ol.ka0902_cpu\ $r_crrevs_l_bits.ka0902_cpu$v_crrevs_cpu_mode_l #define ka0902_cpu$v_crrevs_c3_speed_l ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_l_ol.ka0902_cpu\ $r_crrevs_l_bits.ka0902_cpu$v_crrevs_c3_speed_l #define ka0902_cpu$v_crrevs_sb0_l ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_l_ol.ka0902_cpu$r_cr\ revs_l_bits.ka0902_cpu$v_crrevs_sb0_l #define ka0902_cpu$v_crrevs_io_retry_l ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_l_ol.ka0902_cpu\ $r_crrevs_l_bits.ka0902_cpu$v_crrevs_io_retry_l #define ka0902_cpu$v_crrevs_pch_inv_l ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_l_ol.ka0902_cpu$\ r_crrevs_l_bits.ka0902_cpu$v_crrevs_pch_inv_l #define ka0902_cpu$l_crrevs_h ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_h_ol.ka0902_cpu$l_crrevs\ _h #define ka0902_cpu$v_crrevs_rev_h ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_h_ol.ka0902_cpu$r_cr\ revs_h_bits.ka0902_cpu$v_crrevs_rev_h #define ka0902_cpu$v_crrevs_cpu_mode_h ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_h_ol.ka0902_cpu\ $r_crrevs_h_bits.ka0902_cpu$v_crrevs_cpu_mode_h #define ka0902_cpu$v_crrevs_c3_speed_h ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_h_ol.ka0902_cpu\ $r_crrevs_h_bits.ka0902_cpu$v_crrevs_c3_speed_h #define ka0902_cpu$v_crrevs_sb0_h ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_h_ol.ka0902_cpu$r_cr\ revs_h_bits.ka0902_cpu$v_crrevs_sb0_h #define ka0902_cpu$v_crrevs_io_retry_h ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_h_ol.ka0902_cpu\ $r_crrevs_h_bits.ka0902_cpu$v_crrevs_io_retry_h #define ka0902_cpu$v_crrevs_pch_inv_h ka0902_cpu$r_crrevs_ol.ka0902_cpu$r_crrevs_fields.ka0902_cpu$r_crrevs_fields_h_ol.ka0902_cpu$\ r_crrevs_h_bits.ka0902_cpu$v_crrevs_pch_inv_h #endif /* #if !defined(__VAXC) */ #define KA0902_CPU$K_LENGTH 488 /* */ /* Sable Memory Module register definitions */ /* */ #define KA0902_SMM$M_CME_ES_L 0x1 #define KA0902_SMM$M_CME_SE_L 0x2 #define KA0902_SMM$M_CME_CA_PE_L 0x4 #define KA0902_SMM$M_CME_MCA_PE_L 0x8 #define KA0902_SMM$M_CME_WD_PE_L 0x10 #define KA0902_SMM$M_CME_MWD_PE_L 0x20 #define KA0902_SMM$M_CME_CA_PE_LW0 0x100 #define KA0902_SMM$M_CME_CA_PE_LW2 0x200 #define KA0902_SMM$M_CME_D_PE_LW0 0x400 #define KA0902_SMM$M_CME_D_PE_LW2 0x800 #define KA0902_SMM$M_CME_D_PE_LW4 0x1000 #define KA0902_SMM$M_CME_D_PE_LW6 0x2000 #define KA0902_SMM$M_CME_EUE_L 0x10000 #define KA0902_SMM$M_CME_MEUE_L 0x20000 #define KA0902_SMM$M_CME_ECE_L 0x40000 #define KA0902_SMM$M_CME_MECE_L 0x80000 #define KA0902_SMM$M_CME_ES_H 0x1 #define KA0902_SMM$M_CME_SE_H 0x2 #define KA0902_SMM$M_CME_CA_PE_H 0x4 #define KA0902_SMM$M_CME_MCA_PE_H 0x8 #define KA0902_SMM$M_CME_WD_PE_H 0x10 #define KA0902_SMM$M_CME_MWD_PE_H 0x20 #define KA0902_SMM$M_CME_CA_PE_LW1 0x100 #define KA0902_SMM$M_CME_CA_PE_LW3 0x200 #define KA0902_SMM$M_CME_D_PE_LW1 0x400 #define KA0902_SMM$M_CME_D_PE_LW3 0x800 #define KA0902_SMM$M_CME_D_PE_LW5 0x1000 #define KA0902_SMM$M_CME_D_PE_LW7 0x2000 #define KA0902_SMM$M_CME_EUE_H 0x10000 #define KA0902_SMM$M_CME_MEUE_H 0x20000 #define KA0902_SMM$M_CME_ECE_H 0x40000 #define KA0902_SMM$M_CME_MECE_H 0x80000 #define KA0902_SMM$M_CNFG_MID_L 0x3 #define KA0902_SMM$M_CNFG_DRAM_ACC_L 0x8 #define KA0902_SMM$M_CNFG_MSIZE_L 0xF0 #define KA0902_SMM$M_CNFG_DIAG_L 0x100 #define KA0902_SMM$M_CNFG_CSIC_REV_L 0xF000 #define KA0902_SMM$M_CNFG_ALT_CSR_L 0x10000 #define KA0902_SMM$M_CNFG_ILVM_L 0xC0000 #define KA0902_SMM$M_CNFG_ILVU_L 0x300000 #define KA0902_SMM$M_CNFG_BASE_ADR_L 0x7F800000 #define KA0902_SMM$M_CNFG_MEM_ENA_L 0x80000000 #define KA0902_SMM$M_CNFG_MID_H 0x3 #define KA0902_SMM$M_CNFG_DRAM_ACC_H 0x8 #define KA0902_SMM$M_CNFG_MSIZE_H 0xF0 #define KA0902_SMM$M_CNFG_DIAG_H 0x100 #define KA0902_SMM$M_CNFG_CSIC_REV_H 0xF000 #define KA0902_SMM$M_CNFG_ALT_CSR_H 0x10000 #define KA0902_SMM$M_CNFG_ILVM_H 0xC0000 #define KA0902_SMM$M_CNFG_ILVU_H 0x300000 #define KA0902_SMM$M_CNFG_BASE_ADR_H 0x7F800000 #define KA0902_SMM$M_CNFG_MEM_ENA_H 0x80000000 #define KA0902_SMM$M_EDC1_READ_CBITS_L 0xFFF #define KA0902_SMM$M_EDC1_WR_CBITS_L 0xFFF0000 #define KA0902_SMM$M_EDC1_READ_CBITS_H 0xFFF #define KA0902_SMM$M_EDC1_WR_CBITS_H 0xFFF0000 #define KA0902_SMM$M_EDC2_SYNDROME_L 0xFFF #define KA0902_SMM$M_EDC2_SYNDROME_H 0xFFF #define KA0902_SMM$M_EDCTL_SRB_L 0xFFF #define KA0902_SMM$M_EDCTL_USCB_L 0x1000 #define KA0902_SMM$M_EDCTL_USWCB_L 0x2000 #define KA0902_SMM$M_EDCTL_DIPC_L 0x4000 #define KA0902_SMM$M_EDCTL_ENB_ES_L 0x8000 #define KA0902_SMM$M_EDCTL_SWCB_L 0xFFF0000 #define KA0902_SMM$M_EDCTL_CRDP_L 0x10000000 #define KA0902_SMM$M_EDCTL_ENB_CRDR_L 0x20000000 #define KA0902_SMM$M_EDCTL_DEDCCORR_L 0x40000000 #define KA0902_SMM$M_EDCTL_DEDCREPORT_L 0x80000000 #define KA0902_SMM$M_EDCTL_SRB_H 0xFFF #define KA0902_SMM$M_EDCTL_USCB_H 0x1000 #define KA0902_SMM$M_EDCTL_USWCB_H 0x2000 #define KA0902_SMM$M_EDCTL_DIPC_H 0x4000 #define KA0902_SMM$M_EDCTL_ENB_ES_H 0x8000 #define KA0902_SMM$M_EDCTL_SWCB_H 0xFFF0000 #define KA0902_SMM$M_EDCTL_CRDP_H 0x10000000 #define KA0902_SMM$M_EDCTL_ENB_CRDR_H 0x20000000 #define KA0902_SMM$M_EDCTL_DEDCCORR_H 0x40000000 #define KA0902_SMM$M_EDCTL_DEDCREPORT_H 0x80000000 #define KA0902_SMM$M_SBCTRL_DSD_L 0x1 #define KA0902_SMM$M_SBCTRL_DSH_L 0x2 #define KA0902_SMM$M_SBCTRL_DSF_L 0x4 #define KA0902_SMM$M_SBCTRL_DSI_L 0x8 #define KA0902_SMM$M_SBCTRL_ERWD_L 0x10 #define KA0902_SMM$M_SBCTRL_FHB_L 0x20 #define KA0902_SMM$M_SBCTRL_FILL1_L 0xC0 #define KA0902_SMM$M_SBCTRL_HBSM_L 0x100 #define KA0902_SMM$M_SBCTRL_HBHF_L 0x200 #define KA0902_SMM$M_SBCTRL_FL_L 0x400 #define KA0902_SMM$M_SBCTRL_DSD_H 0x1 #define KA0902_SMM$M_SBCTRL_DSH_H 0x2 #define KA0902_SMM$M_SBCTRL_DSF_H 0x4 #define KA0902_SMM$M_SBCTRL_DSI_H 0x8 #define KA0902_SMM$M_SBCTRL_ERWD_H 0x10 #define KA0902_SMM$M_SBCTRL_FHB_H 0x20 #define KA0902_SMM$M_SBCTRL_FILL1_H 0xC0 #define KA0902_SMM$M_SBCTRL_HBSM_H 0x100 #define KA0902_SMM$M_SBCTRL_HBHF_H 0x200 #define KA0902_SMM$M_SBCTRL_FL_H 0x400 #define KA0902_SMM$M_RCTRL_RC_L 0xFF #define KA0902_SMM$M_RCTRL_REF_ENB_L 0x100 #define KA0902_SMM$M_RCTRL_NUT_L 0x1000 #define KA0902_SMM$M_RCTRL_HIT_L 0x2000 #define KA0902_SMM$M_RCTRL_RC_H 0xFF #define KA0902_SMM$M_RCTRL_REF_ENB_H 0x100 #define KA0902_SMM$M_RCTRL_NUT_H 0x1000 #define KA0902_SMM$M_RCTRL_HIT_H 0x2000 #define KA0902_SMM$M_CRDCTL_SM_L 0xFFF #define KA0902_SMM$M_CRDCTL_BS_L 0x3000 #define KA0902_SMM$M_CRDCTL_CFE_L 0x4000 #define KA0902_SMM$M_CRDCTL_SM_H 0xFFF #define KA0902_SMM$M_CRDCTL_BS_H 0x3000 #define KA0902_SMM$M_CRDCTL_CFE_H 0x4000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _ka0902_smm { /* Sable Memory Module CSR0 Error Register */ #pragma __nomember_alignment __union { __int64 ka0902_smm$q_cme; __struct { __union { unsigned int ka0902_smm$l_cme_l; __struct { unsigned ka0902_smm$v_cme_es_l : 1; unsigned ka0902_smm$v_cme_se_l : 1; unsigned ka0902_smm$v_cme_ca_pe_l : 1; unsigned ka0902_smm$v_cme_mca_pe_l : 1; unsigned ka0902_smm$v_cme_wd_pe_l : 1; unsigned ka0902_smm$v_cme_mwd_pe_l : 1; unsigned ka0902_smm$v_cme_fill1_l : 2; unsigned ka0902_smm$v_cme_ca_pe_lw0 : 1; unsigned ka0902_smm$v_cme_ca_pe_lw2 : 1; unsigned ka0902_smm$v_cme_d_pe_lw0 : 1; unsigned ka0902_smm$v_cme_d_pe_lw2 : 1; unsigned ka0902_smm$v_cme_d_pe_lw4 : 1; unsigned ka0902_smm$v_cme_d_pe_lw6 : 1; unsigned ka0902_smm$v_cme_fill2_l : 2; unsigned ka0902_smm$v_cme_eue_l : 1; unsigned ka0902_smm$v_cme_meue_l : 1; unsigned ka0902_smm$v_cme_ece_l : 1; unsigned ka0902_smm$v_cme_mece_l : 1; unsigned ka0902_smm$v_cme_fill3_l : 12; } ka0902_smm$r_cme_l_bits; } ka0902_smm$r_cme_fields_l_ol; __union { unsigned int ka0902_smm$l_cme_h; __struct { unsigned ka0902_smm$v_cme_es_h : 1; unsigned ka0902_smm$v_cme_se_h : 1; unsigned ka0902_smm$v_cme_ca_pe_h : 1; unsigned ka0902_smm$v_cme_mca_pe_h : 1; unsigned ka0902_smm$v_cme_wd_pe_h : 1; unsigned ka0902_smm$v_cme_mwd_pe_h : 1; unsigned ka0902_smm$v_cme_fill4 : 2; unsigned ka0902_smm$v_cme_ca_pe_lw1 : 1; unsigned ka0902_smm$v_cme_ca_pe_lw3 : 1; unsigned ka0902_smm$v_cme_d_pe_lw1 : 1; unsigned ka0902_smm$v_cme_d_pe_lw3 : 1; unsigned ka0902_smm$v_cme_d_pe_lw5 : 1; unsigned ka0902_smm$v_cme_d_pe_lw7 : 1; unsigned ka0902_smm$v_cme_fill5 : 2; unsigned ka0902_smm$v_cme_eue_h : 1; unsigned ka0902_smm$v_cme_meue_h : 1; unsigned ka0902_smm$v_cme_ece_h : 1; unsigned ka0902_smm$v_cme_mece_h : 1; unsigned ka0902_smm$v_cme_fill6 : 12; } ka0902_smm$r_cme_h_bits; } ka0902_smm$r_cme_fields_h_ol; } ka0902_smm$r_cme_fields; } ka0902_smm$r_cme_ol; char ka0902_smm$b_fill43 [24]; /* Sable Memory Module CSR1 Command Trap 1 */ __union { __int64 ka0902_smm$q_trap1; __struct { __union { unsigned int ka0902_smm$l_trap1_l; __struct { unsigned ka0902_smm$v_trap1_fill1_l : 32; } ka0902_smm$r_trap1_l_bits; } ka0902_smm$r_trap1_fields_l_ol; __union { unsigned int ka0902_smm$l_trap1_h; __struct { unsigned ka0902_smm$v_trap1_fill1_h : 32; } ka0902_smm$r_trap1_h_bits; } ka0902_smm$r_trap1_fields_h_ol; } ka0902_smm$r_trap1_fields; } ka0902_smm$r_trap1_ol; char ka0902_smm$b_fill44 [24]; /* Sable Memory Module CSR2 Command Trap 2 */ __union { __int64 ka0902_smm$q_trap2; __struct { __union { unsigned int ka0902_smm$l_trap2_l; __struct { unsigned ka0902_smm$v_trap2_fill1_l : 32; } ka0902_smm$r_trap2_l_bits; } ka0902_smm$r_trap2_fields_l_ol; __union { unsigned int ka0902_smm$l_trap2_h; __struct { unsigned ka0902_smm$v_trap2_fill1_h : 32; } ka0902_smm$r_trap2_h_bits; } ka0902_smm$r_trap2_fields_h_ol; } ka0902_smm$r_trap2_fields; } ka0902_smm$r_trap2_ol; char ka0902_smm$b_fill45 [24]; /* Sable Memory Module CSR3 Configuration */ __union { __int64 ka0902_smm$q_cnfg; __struct { __union { unsigned int ka0902_smm$l_cnfg_l; __struct { unsigned ka0902_smm$v_cnfg_mid_l : 2; unsigned ka0902_smm$v_cnfg_fill1_l : 1; unsigned ka0902_smm$v_cnfg_dram_acc_l : 1; unsigned ka0902_smm$v_cnfg_msize_l : 4; unsigned ka0902_smm$v_cnfg_diag_l : 1; unsigned ka0902_smm$v_cnfg_fill2_l : 3; unsigned ka0902_smm$v_cnfg_csic_rev_l : 4; unsigned ka0902_smm$v_cnfg_alt_csr_l : 1; unsigned ka0902_smm$v_cnfg_fill3_l : 1; unsigned ka0902_smm$v_cnfg_ilvm_l : 2; unsigned ka0902_smm$v_cnfg_ilvu_l : 2; unsigned ka0902_smm$v_cnfg_fill4_l : 1; unsigned ka0902_smm$v_cnfg_base_adr_l : 8; unsigned ka0902_smm$v_cnfg_mem_ena_l : 1; } ka0902_smm$r_cnfg_l_bits; } ka0902_smm$r_cnfg_fields_l_ol; __union { unsigned int ka0902_smm$l_cnfg_h; __struct { unsigned ka0902_smm$v_cnfg_mid_h : 2; unsigned ka0902_smm$v_cnfg_fill1_h : 1; unsigned ka0902_smm$v_cnfg_dram_acc_h : 1; unsigned ka0902_smm$v_cnfg_msize_h : 4; unsigned ka0902_smm$v_cnfg_diag_h : 1; unsigned ka0902_smm$v_cnfg_fill2_h : 3; unsigned ka0902_smm$v_cnfg_csic_rev_h : 4; unsigned ka0902_smm$v_cnfg_alt_csr_h : 1; unsigned ka0902_smm$v_cnfg_fill3_h : 1; unsigned ka0902_smm$v_cnfg_ilvm_h : 2; unsigned ka0902_smm$v_cnfg_ilvu_h : 2; unsigned ka0902_smm$v_cnfg_fill4_h : 1; unsigned ka0902_smm$v_cnfg_base_adr_h : 8; unsigned ka0902_smm$v_cnfg_mem_ena_h : 1; } ka0902_smm$r_cnfg_h_bits; } ka0902_smm$r_cnfg_fields_h_ol; } ka0902_smm$r_cnfg_fields; } ka0902_smm$r_cnfg_ol; char ka0902_smm$b_fill46 [24]; /* Sable Memory Module CSR4 EDC Status 1 */ __union { __int64 ka0902_smm$q_edc1; __struct { __union { unsigned int ka0902_smm$l_edc1_l; __struct { unsigned ka0902_smm$v_edc1_read_cbits_l : 12; unsigned ka0902_smm$v_edc1_fill_l : 4; unsigned ka0902_smm$v_edc1_wr_cbits_l : 12; unsigned ka0902_smm$v_edc1_fill2_l : 4; } ka0902_smm$r_edc1_l_bits; } ka0902_smm$r_edc1_fields_l_ol; __union { unsigned int ka0902_smm$l_edc1_h; __struct { unsigned ka0902_smm$v_edc1_read_cbits_h : 12; unsigned ka0902_smm$v_edc1_fill_h : 4; unsigned ka0902_smm$v_edc1_wr_cbits_h : 12; unsigned ka0902_smm$v_edc1_fill2_h : 4; } ka0902_smm$r_edc1_h_bits; } ka0902_smm$r_edc1_fields_h_ol; } ka0902_smm$r_edc1_fields; } ka0902_smm$r_edc1_ol; char ka0902_smm$b_fill47 [24]; /* Sable Memory Module CSR5 EDC Status 2 */ __union { __int64 ka0902_smm$q_edc2; __struct { __union { unsigned int ka0902_smm$l_edc2_l; __struct { unsigned ka0902_smm$v_edc2_syndrome_l : 12; unsigned ka0902_smm$v_edc2_fill_l : 20; } ka0902_smm$r_edc2_l_bits; } ka0902_smm$r_edc2_fields_l_ol; __union { unsigned int ka0902_smm$l_edc2_h; __struct { unsigned ka0902_smm$v_edc2_syndrome_h : 12; unsigned ka0902_smm$v_edc2_fill_h : 20; } ka0902_smm$r_edc2_h_bits; } ka0902_smm$r_edc2_fields_h_ol; } ka0902_smm$r_edc2_fields; } ka0902_smm$r_edc2_ol; char ka0902_smm$b_fill48 [24]; /* Sable Memory Module CSR6 EDC Control */ __union { __int64 ka0902_smm$q_edctl; __struct { __union { unsigned int ka0902_smm$l_edctl_l; __struct { unsigned ka0902_smm$v_edctl_srb_l : 12; unsigned ka0902_smm$v_edctl_uscb_l : 1; unsigned ka0902_smm$v_edctl_uswcb_l : 1; unsigned ka0902_smm$v_edctl_dipc_l : 1; unsigned ka0902_smm$v_edctl_enb_es_l : 1; unsigned ka0902_smm$v_edctl_swcb_l : 12; unsigned ka0902_smm$v_edctl_crdp_l : 1; unsigned ka0902_smm$v_edctl_enb_crdr_l : 1; unsigned ka0902_smm$v_edctl_dedccorr_l : 1; unsigned ka0902_smm$v_edctl_dedcreport_l : 1; } ka0902_smm$r_edctl_l_bits; } ka0902_smm$r_edctl_fields_l_ol; __union { unsigned int ka0902_smm$l_edctl_h; __struct { unsigned ka0902_smm$v_edctl_srb_h : 12; unsigned ka0902_smm$v_edctl_uscb_h : 1; unsigned ka0902_smm$v_edctl_uswcb_h : 1; unsigned ka0902_smm$v_edctl_dipc_h : 1; unsigned ka0902_smm$v_edctl_enb_es_h : 1; unsigned ka0902_smm$v_edctl_swcb_h : 12; unsigned ka0902_smm$v_edctl_crdp_h : 1; unsigned ka0902_smm$v_edctl_enb_crdr_h : 1; unsigned ka0902_smm$v_edctl_dedccorr_h : 1; unsigned ka0902_smm$v_edctl_dedcreport_h : 1; } ka0902_smm$r_edctl_h_bits; } ka0902_smm$r_edctl_fields_h_ol; } ka0902_smm$r_edctl_fields; } ka0902_smm$r_edctl_ol; char ka0902_smm$b_fill49 [24]; /* Sable Memory Module CSR7 Stream Buffer Control */ __union { __int64 ka0902_smm$q_sbctrl; __struct { __union { unsigned int ka0902_smm$l_sbctrl_l; __struct { unsigned ka0902_smm$v_sbctrl_dsd_l : 1; unsigned ka0902_smm$v_sbctrl_dsh_l : 1; unsigned ka0902_smm$v_sbctrl_dsf_l : 1; unsigned ka0902_smm$v_sbctrl_dsi_l : 1; unsigned ka0902_smm$v_sbctrl_erwd_l : 1; unsigned ka0902_smm$v_sbctrl_fhb_l : 1; unsigned ka0902_smm$v_sbctrl_fill1_l : 2; unsigned ka0902_smm$v_sbctrl_hbsm_l : 1; unsigned ka0902_smm$v_sbctrl_hbhf_l : 1; unsigned ka0902_smm$v_sbctrl_fl_l : 1; unsigned ka0902_smm$v_sbctrl_fill2_l : 21; } ka0902_smm$r_sbctrl_l_bits; } ka0902_smm$r_sbctrl_fields_l_ol; __union { unsigned int ka0902_smm$l_sbctrl_h; __struct { unsigned ka0902_smm$v_sbctrl_dsd_h : 1; unsigned ka0902_smm$v_sbctrl_dsh_h : 1; unsigned ka0902_smm$v_sbctrl_dsf_h : 1; unsigned ka0902_smm$v_sbctrl_dsi_h : 1; unsigned ka0902_smm$v_sbctrl_erwd_h : 1; unsigned ka0902_smm$v_sbctrl_fhb_h : 1; unsigned ka0902_smm$v_sbctrl_fill1_h : 2; unsigned ka0902_smm$v_sbctrl_hbsm_h : 1; unsigned ka0902_smm$v_sbctrl_hbhf_h : 1; unsigned ka0902_smm$v_sbctrl_fl_h : 1; unsigned ka0902_smm$v_sbctrl_fill2_h : 21; } ka0902_smm$r_sbctrl_h_bits; } ka0902_smm$r_sbctrl_fields_h_ol; } ka0902_smm$r_sbctrl_fields; } ka0902_smm$r_sbctrl_ol; char ka0902_smm$b_fill50 [24]; /* Sable Memory Module CSR8 Refresh control */ __union { __int64 ka0902_smm$q_rctrl; __struct { __union { unsigned int ka0902_smm$l_rctrl_l; __struct { unsigned ka0902_smm$v_rctrl_rc_l : 8; unsigned ka0902_smm$v_rctrl_ref_enb_l : 1; unsigned ka0902_smm$v_rctrl_fill1_l : 3; unsigned ka0902_smm$v_rctrl_nut_l : 1; unsigned ka0902_smm$v_rctrl_hit_l : 1; unsigned ka0902_smm$v_rctrl_fill2_l : 18; } ka0902_smm$r_rctrl_l_bits; } ka0902_smm$r_rctrl_fields_l_ol; __union { unsigned int ka0902_smm$l_rctrl_h; __struct { unsigned ka0902_smm$v_rctrl_rc_h : 8; unsigned ka0902_smm$v_rctrl_ref_enb_h : 1; unsigned ka0902_smm$v_rctrl_fill1_h : 3; unsigned ka0902_smm$v_rctrl_nut_h : 1; unsigned ka0902_smm$v_rctrl_hit_h : 1; unsigned ka0902_smm$v_rctrl_fill2_h : 18; } ka0902_smm$r_rctrl_h_bits; } ka0902_smm$r_rctrl_fields_h_ol; } ka0902_smm$r_rctrl_fields; } ka0902_smm$r_rctrl_ol; char ka0902_smm$b_fill51 [24]; /* Sable Memory Module CSR9 CRD Filter control */ __union { __int64 ka0902_smm$q_crdctl; __struct { __union { unsigned int ka0902_smm$l_crdctl_l; __struct { unsigned ka0902_smm$v_crdctl_sm_l : 12; unsigned ka0902_smm$v_crdctl_bs_l : 2; unsigned ka0902_smm$v_crdctl_cfe_l : 1; unsigned ka0902_smm$v_crdctl_fill_l : 17; } ka0902_smm$r_crdctl_l_bits; } ka0902_smm$r_crdctl_fields_l_ol; __union { unsigned int ka0902_smm$l_crdctl_h; __struct { unsigned ka0902_smm$v_crdctl_sm_h : 12; unsigned ka0902_smm$v_crdctl_bs_h : 2; unsigned ka0902_smm$v_crdctl_cfe_h : 1; unsigned ka0902_smm$v_crdctl_fill_h : 17; } ka0902_smm$r_crdctl_h_bits; } ka0902_smm$r_crdctl_fields_h_ol; } ka0902_smm$r_crdctl_fields; } ka0902_smm$r_crdctl_ol; } KA0902_SMM; #if !defined(__VAXC) #define ka0902_smm$q_cme ka0902_smm$r_cme_ol.ka0902_smm$q_cme #define ka0902_smm$l_cme_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$l_cme_l #define ka0902_smm$v_cme_es_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.ka09\ 02_smm$v_cme_es_l #define ka0902_smm$v_cme_se_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.ka09\ 02_smm$v_cme_se_l #define ka0902_smm$v_cme_ca_pe_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.k\ a0902_smm$v_cme_ca_pe_l #define ka0902_smm$v_cme_mca_pe_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.\ ka0902_smm$v_cme_mca_pe_l #define ka0902_smm$v_cme_wd_pe_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.k\ a0902_smm$v_cme_wd_pe_l #define ka0902_smm$v_cme_mwd_pe_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.\ ka0902_smm$v_cme_mwd_pe_l #define ka0902_smm$v_cme_ca_pe_lw0 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits\ .ka0902_smm$v_cme_ca_pe_lw0 #define ka0902_smm$v_cme_ca_pe_lw2 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits\ .ka0902_smm$v_cme_ca_pe_lw2 #define ka0902_smm$v_cme_d_pe_lw0 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.\ ka0902_smm$v_cme_d_pe_lw0 #define ka0902_smm$v_cme_d_pe_lw2 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.\ ka0902_smm$v_cme_d_pe_lw2 #define ka0902_smm$v_cme_d_pe_lw4 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.\ ka0902_smm$v_cme_d_pe_lw4 #define ka0902_smm$v_cme_d_pe_lw6 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.\ ka0902_smm$v_cme_d_pe_lw6 #define ka0902_smm$v_cme_eue_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.ka0\ 902_smm$v_cme_eue_l #define ka0902_smm$v_cme_meue_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.ka\ 0902_smm$v_cme_meue_l #define ka0902_smm$v_cme_ece_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.ka0\ 902_smm$v_cme_ece_l #define ka0902_smm$v_cme_mece_l ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_l_ol.ka0902_smm$r_cme_l_bits.ka\ 0902_smm$v_cme_mece_l #define ka0902_smm$l_cme_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$l_cme_h #define ka0902_smm$v_cme_es_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.ka09\ 02_smm$v_cme_es_h #define ka0902_smm$v_cme_se_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.ka09\ 02_smm$v_cme_se_h #define ka0902_smm$v_cme_ca_pe_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.k\ a0902_smm$v_cme_ca_pe_h #define ka0902_smm$v_cme_mca_pe_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.\ ka0902_smm$v_cme_mca_pe_h #define ka0902_smm$v_cme_wd_pe_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.k\ a0902_smm$v_cme_wd_pe_h #define ka0902_smm$v_cme_mwd_pe_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.\ ka0902_smm$v_cme_mwd_pe_h #define ka0902_smm$v_cme_ca_pe_lw1 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits\ .ka0902_smm$v_cme_ca_pe_lw1 #define ka0902_smm$v_cme_ca_pe_lw3 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits\ .ka0902_smm$v_cme_ca_pe_lw3 #define ka0902_smm$v_cme_d_pe_lw1 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.\ ka0902_smm$v_cme_d_pe_lw1 #define ka0902_smm$v_cme_d_pe_lw3 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.\ ka0902_smm$v_cme_d_pe_lw3 #define ka0902_smm$v_cme_d_pe_lw5 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.\ ka0902_smm$v_cme_d_pe_lw5 #define ka0902_smm$v_cme_d_pe_lw7 ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.\ ka0902_smm$v_cme_d_pe_lw7 #define ka0902_smm$v_cme_eue_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.ka0\ 902_smm$v_cme_eue_h #define ka0902_smm$v_cme_meue_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.ka\ 0902_smm$v_cme_meue_h #define ka0902_smm$v_cme_ece_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.ka0\ 902_smm$v_cme_ece_h #define ka0902_smm$v_cme_mece_h ka0902_smm$r_cme_ol.ka0902_smm$r_cme_fields.ka0902_smm$r_cme_fields_h_ol.ka0902_smm$r_cme_h_bits.ka\ 0902_smm$v_cme_mece_h #define ka0902_smm$q_trap1 ka0902_smm$r_trap1_ol.ka0902_smm$q_trap1 #define ka0902_smm$l_trap1_l ka0902_smm$r_trap1_ol.ka0902_smm$r_trap1_fields.ka0902_smm$r_trap1_fields_l_ol.ka0902_smm$l_trap1_l #define ka0902_smm$l_trap1_h ka0902_smm$r_trap1_ol.ka0902_smm$r_trap1_fields.ka0902_smm$r_trap1_fields_h_ol.ka0902_smm$l_trap1_h #define ka0902_smm$q_trap2 ka0902_smm$r_trap2_ol.ka0902_smm$q_trap2 #define ka0902_smm$l_trap2_l ka0902_smm$r_trap2_ol.ka0902_smm$r_trap2_fields.ka0902_smm$r_trap2_fields_l_ol.ka0902_smm$l_trap2_l #define ka0902_smm$l_trap2_h ka0902_smm$r_trap2_ol.ka0902_smm$r_trap2_fields.ka0902_smm$r_trap2_fields_h_ol.ka0902_smm$l_trap2_h #define ka0902_smm$q_cnfg ka0902_smm$r_cnfg_ol.ka0902_smm$q_cnfg #define ka0902_smm$l_cnfg_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$l_cnfg_l #define ka0902_smm$v_cnfg_mid_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_l_bit\ s.ka0902_smm$v_cnfg_mid_l #define ka0902_smm$v_cnfg_dram_acc_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_\ l_bits.ka0902_smm$v_cnfg_dram_acc_l #define ka0902_smm$v_cnfg_msize_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_l_b\ its.ka0902_smm$v_cnfg_msize_l #define ka0902_smm$v_cnfg_diag_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_l_bi\ ts.ka0902_smm$v_cnfg_diag_l #define ka0902_smm$v_cnfg_csic_rev_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_\ l_bits.ka0902_smm$v_cnfg_csic_rev_l #define ka0902_smm$v_cnfg_alt_csr_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_l\ _bits.ka0902_smm$v_cnfg_alt_csr_l #define ka0902_smm$v_cnfg_ilvm_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_l_bi\ ts.ka0902_smm$v_cnfg_ilvm_l #define ka0902_smm$v_cnfg_ilvu_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_l_bi\ ts.ka0902_smm$v_cnfg_ilvu_l #define ka0902_smm$v_cnfg_base_adr_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_\ l_bits.ka0902_smm$v_cnfg_base_adr_l #define ka0902_smm$v_cnfg_mem_ena_l ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_l_ol.ka0902_smm$r_cnfg_l\ _bits.ka0902_smm$v_cnfg_mem_ena_l #define ka0902_smm$l_cnfg_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$l_cnfg_h #define ka0902_smm$v_cnfg_mid_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_h_bit\ s.ka0902_smm$v_cnfg_mid_h #define ka0902_smm$v_cnfg_dram_acc_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_\ h_bits.ka0902_smm$v_cnfg_dram_acc_h #define ka0902_smm$v_cnfg_msize_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_h_b\ its.ka0902_smm$v_cnfg_msize_h #define ka0902_smm$v_cnfg_diag_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_h_bi\ ts.ka0902_smm$v_cnfg_diag_h #define ka0902_smm$v_cnfg_csic_rev_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_\ h_bits.ka0902_smm$v_cnfg_csic_rev_h #define ka0902_smm$v_cnfg_alt_csr_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_h\ _bits.ka0902_smm$v_cnfg_alt_csr_h #define ka0902_smm$v_cnfg_ilvm_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_h_bi\ ts.ka0902_smm$v_cnfg_ilvm_h #define ka0902_smm$v_cnfg_ilvu_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_h_bi\ ts.ka0902_smm$v_cnfg_ilvu_h #define ka0902_smm$v_cnfg_base_adr_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_\ h_bits.ka0902_smm$v_cnfg_base_adr_h #define ka0902_smm$v_cnfg_mem_ena_h ka0902_smm$r_cnfg_ol.ka0902_smm$r_cnfg_fields.ka0902_smm$r_cnfg_fields_h_ol.ka0902_smm$r_cnfg_h\ _bits.ka0902_smm$v_cnfg_mem_ena_h #define ka0902_smm$q_edc1 ka0902_smm$r_edc1_ol.ka0902_smm$q_edc1 #define ka0902_smm$l_edc1_l ka0902_smm$r_edc1_ol.ka0902_smm$r_edc1_fields.ka0902_smm$r_edc1_fields_l_ol.ka0902_smm$l_edc1_l #define ka0902_smm$v_edc1_read_cbits_l ka0902_smm$r_edc1_ol.ka0902_smm$r_edc1_fields.ka0902_smm$r_edc1_fields_l_ol.ka0902_smm$r_edc\ 1_l_bits.ka0902_smm$v_edc1_read_cbits_l #define ka0902_smm$v_edc1_wr_cbits_l ka0902_smm$r_edc1_ol.ka0902_smm$r_edc1_fields.ka0902_smm$r_edc1_fields_l_ol.ka0902_smm$r_edc1_\ l_bits.ka0902_smm$v_edc1_wr_cbits_l #define ka0902_smm$l_edc1_h ka0902_smm$r_edc1_ol.ka0902_smm$r_edc1_fields.ka0902_smm$r_edc1_fields_h_ol.ka0902_smm$l_edc1_h #define ka0902_smm$v_edc1_read_cbits_h ka0902_smm$r_edc1_ol.ka0902_smm$r_edc1_fields.ka0902_smm$r_edc1_fields_h_ol.ka0902_smm$r_edc\ 1_h_bits.ka0902_smm$v_edc1_read_cbits_h #define ka0902_smm$v_edc1_wr_cbits_h ka0902_smm$r_edc1_ol.ka0902_smm$r_edc1_fields.ka0902_smm$r_edc1_fields_h_ol.ka0902_smm$r_edc1_\ h_bits.ka0902_smm$v_edc1_wr_cbits_h #define ka0902_smm$q_edc2 ka0902_smm$r_edc2_ol.ka0902_smm$q_edc2 #define ka0902_smm$l_edc2_l ka0902_smm$r_edc2_ol.ka0902_smm$r_edc2_fields.ka0902_smm$r_edc2_fields_l_ol.ka0902_smm$l_edc2_l #define ka0902_smm$v_edc2_syndrome_l ka0902_smm$r_edc2_ol.ka0902_smm$r_edc2_fields.ka0902_smm$r_edc2_fields_l_ol.ka0902_smm$r_edc2_\ l_bits.ka0902_smm$v_edc2_syndrome_l #define ka0902_smm$l_edc2_h ka0902_smm$r_edc2_ol.ka0902_smm$r_edc2_fields.ka0902_smm$r_edc2_fields_h_ol.ka0902_smm$l_edc2_h #define ka0902_smm$v_edc2_syndrome_h ka0902_smm$r_edc2_ol.ka0902_smm$r_edc2_fields.ka0902_smm$r_edc2_fields_h_ol.ka0902_smm$r_edc2_\ h_bits.ka0902_smm$v_edc2_syndrome_h #define ka0902_smm$q_edctl ka0902_smm$r_edctl_ol.ka0902_smm$q_edctl #define ka0902_smm$l_edctl_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$l_edctl_l #define ka0902_smm$v_edctl_srb_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_edctl_\ l_bits.ka0902_smm$v_edctl_srb_l #define ka0902_smm$v_edctl_uscb_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_edctl\ _l_bits.ka0902_smm$v_edctl_uscb_l #define ka0902_smm$v_edctl_uswcb_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_edct\ l_l_bits.ka0902_smm$v_edctl_uswcb_l #define ka0902_smm$v_edctl_dipc_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_edctl\ _l_bits.ka0902_smm$v_edctl_dipc_l #define ka0902_smm$v_edctl_enb_es_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_edc\ tl_l_bits.ka0902_smm$v_edctl_enb_es_l #define ka0902_smm$v_edctl_swcb_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_edctl\ _l_bits.ka0902_smm$v_edctl_swcb_l #define ka0902_smm$v_edctl_crdp_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_edctl\ _l_bits.ka0902_smm$v_edctl_crdp_l #define ka0902_smm$v_edctl_enb_crdr_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_e\ dctl_l_bits.ka0902_smm$v_edctl_enb_crdr_l #define ka0902_smm$v_edctl_dedccorr_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r_e\ dctl_l_bits.ka0902_smm$v_edctl_dedccorr_l #define ka0902_smm$v_edctl_dedcreport_l ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_l_ol.ka0902_smm$r\ _edctl_l_bits.ka0902_smm$v_edctl_dedcreport_l #define ka0902_smm$l_edctl_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$l_edctl_h #define ka0902_smm$v_edctl_srb_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_edctl_\ h_bits.ka0902_smm$v_edctl_srb_h #define ka0902_smm$v_edctl_uscb_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_edctl\ _h_bits.ka0902_smm$v_edctl_uscb_h #define ka0902_smm$v_edctl_uswcb_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_edct\ l_h_bits.ka0902_smm$v_edctl_uswcb_h #define ka0902_smm$v_edctl_dipc_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_edctl\ _h_bits.ka0902_smm$v_edctl_dipc_h #define ka0902_smm$v_edctl_enb_es_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_edc\ tl_h_bits.ka0902_smm$v_edctl_enb_es_h #define ka0902_smm$v_edctl_swcb_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_edctl\ _h_bits.ka0902_smm$v_edctl_swcb_h #define ka0902_smm$v_edctl_crdp_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_edctl\ _h_bits.ka0902_smm$v_edctl_crdp_h #define ka0902_smm$v_edctl_enb_crdr_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_e\ dctl_h_bits.ka0902_smm$v_edctl_enb_crdr_h #define ka0902_smm$v_edctl_dedccorr_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r_e\ dctl_h_bits.ka0902_smm$v_edctl_dedccorr_h #define ka0902_smm$v_edctl_dedcreport_h ka0902_smm$r_edctl_ol.ka0902_smm$r_edctl_fields.ka0902_smm$r_edctl_fields_h_ol.ka0902_smm$r\ _edctl_h_bits.ka0902_smm$v_edctl_dedcreport_h #define ka0902_smm$q_sbctrl ka0902_smm$r_sbctrl_ol.ka0902_smm$q_sbctrl #define ka0902_smm$l_sbctrl_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$l_sbctrl\ _l #define ka0902_smm$v_sbctrl_dsd_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_sb\ ctrl_l_bits.ka0902_smm$v_sbctrl_dsd_l #define ka0902_smm$v_sbctrl_dsh_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_sb\ ctrl_l_bits.ka0902_smm$v_sbctrl_dsh_l #define ka0902_smm$v_sbctrl_dsf_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_sb\ ctrl_l_bits.ka0902_smm$v_sbctrl_dsf_l #define ka0902_smm$v_sbctrl_dsi_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_sb\ ctrl_l_bits.ka0902_smm$v_sbctrl_dsi_l #define ka0902_smm$v_sbctrl_erwd_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_s\ bctrl_l_bits.ka0902_smm$v_sbctrl_erwd_l #define ka0902_smm$v_sbctrl_fhb_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_sb\ ctrl_l_bits.ka0902_smm$v_sbctrl_fhb_l #define ka0902_smm$v_sbctrl_fill1_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_\ sbctrl_l_bits.ka0902_smm$v_sbctrl_fill1_l #define ka0902_smm$v_sbctrl_hbsm_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_s\ bctrl_l_bits.ka0902_smm$v_sbctrl_hbsm_l #define ka0902_smm$v_sbctrl_hbhf_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_s\ bctrl_l_bits.ka0902_smm$v_sbctrl_hbhf_l #define ka0902_smm$v_sbctrl_fl_l ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_l_ol.ka0902_smm$r_sbc\ trl_l_bits.ka0902_smm$v_sbctrl_fl_l #define ka0902_smm$l_sbctrl_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$l_sbctrl\ _h #define ka0902_smm$v_sbctrl_dsd_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_sb\ ctrl_h_bits.ka0902_smm$v_sbctrl_dsd_h #define ka0902_smm$v_sbctrl_dsh_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_sb\ ctrl_h_bits.ka0902_smm$v_sbctrl_dsh_h #define ka0902_smm$v_sbctrl_dsf_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_sb\ ctrl_h_bits.ka0902_smm$v_sbctrl_dsf_h #define ka0902_smm$v_sbctrl_dsi_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_sb\ ctrl_h_bits.ka0902_smm$v_sbctrl_dsi_h #define ka0902_smm$v_sbctrl_erwd_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_s\ bctrl_h_bits.ka0902_smm$v_sbctrl_erwd_h #define ka0902_smm$v_sbctrl_fhb_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_sb\ ctrl_h_bits.ka0902_smm$v_sbctrl_fhb_h #define ka0902_smm$v_sbctrl_fill1_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_\ sbctrl_h_bits.ka0902_smm$v_sbctrl_fill1_h #define ka0902_smm$v_sbctrl_hbsm_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_s\ bctrl_h_bits.ka0902_smm$v_sbctrl_hbsm_h #define ka0902_smm$v_sbctrl_hbhf_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_s\ bctrl_h_bits.ka0902_smm$v_sbctrl_hbhf_h #define ka0902_smm$v_sbctrl_fl_h ka0902_smm$r_sbctrl_ol.ka0902_smm$r_sbctrl_fields.ka0902_smm$r_sbctrl_fields_h_ol.ka0902_smm$r_sbc\ trl_h_bits.ka0902_smm$v_sbctrl_fl_h #define ka0902_smm$q_rctrl ka0902_smm$r_rctrl_ol.ka0902_smm$q_rctrl #define ka0902_smm$l_rctrl_l ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_l_ol.ka0902_smm$l_rctrl_l #define ka0902_smm$v_rctrl_rc_l ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_l_ol.ka0902_smm$r_rctrl_l\ _bits.ka0902_smm$v_rctrl_rc_l #define ka0902_smm$v_rctrl_ref_enb_l ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_l_ol.ka0902_smm$r_rc\ trl_l_bits.ka0902_smm$v_rctrl_ref_enb_l #define ka0902_smm$v_rctrl_nut_l ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_l_ol.ka0902_smm$r_rctrl_\ l_bits.ka0902_smm$v_rctrl_nut_l #define ka0902_smm$v_rctrl_hit_l ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_l_ol.ka0902_smm$r_rctrl_\ l_bits.ka0902_smm$v_rctrl_hit_l #define ka0902_smm$l_rctrl_h ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_h_ol.ka0902_smm$l_rctrl_h #define ka0902_smm$v_rctrl_rc_h ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_h_ol.ka0902_smm$r_rctrl_h\ _bits.ka0902_smm$v_rctrl_rc_h #define ka0902_smm$v_rctrl_ref_enb_h ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_h_ol.ka0902_smm$r_rc\ trl_h_bits.ka0902_smm$v_rctrl_ref_enb_h #define ka0902_smm$v_rctrl_nut_h ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_h_ol.ka0902_smm$r_rctrl_\ h_bits.ka0902_smm$v_rctrl_nut_h #define ka0902_smm$v_rctrl_hit_h ka0902_smm$r_rctrl_ol.ka0902_smm$r_rctrl_fields.ka0902_smm$r_rctrl_fields_h_ol.ka0902_smm$r_rctrl_\ h_bits.ka0902_smm$v_rctrl_hit_h #define ka0902_smm$q_crdctl ka0902_smm$r_crdctl_ol.ka0902_smm$q_crdctl #define ka0902_smm$l_crdctl_l ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_l_ol.ka0902_smm$l_crdctl\ _l #define ka0902_smm$v_crdctl_sm_l ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_l_ol.ka0902_smm$r_crd\ ctl_l_bits.ka0902_smm$v_crdctl_sm_l #define ka0902_smm$v_crdctl_bs_l ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_l_ol.ka0902_smm$r_crd\ ctl_l_bits.ka0902_smm$v_crdctl_bs_l #define ka0902_smm$v_crdctl_cfe_l ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_l_ol.ka0902_smm$r_cr\ dctl_l_bits.ka0902_smm$v_crdctl_cfe_l #define ka0902_smm$l_crdctl_h ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_h_ol.ka0902_smm$l_crdctl\ _h #define ka0902_smm$v_crdctl_sm_h ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_h_ol.ka0902_smm$r_crd\ ctl_h_bits.ka0902_smm$v_crdctl_sm_h #define ka0902_smm$v_crdctl_bs_h ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_h_ol.ka0902_smm$r_crd\ ctl_h_bits.ka0902_smm$v_crdctl_bs_h #define ka0902_smm$v_crdctl_cfe_h ka0902_smm$r_crdctl_ol.ka0902_smm$r_crdctl_fields.ka0902_smm$r_crdctl_fields_h_ol.ka0902_smm$r_cr\ dctl_h_bits.ka0902_smm$v_crdctl_cfe_h #endif /* #if !defined(__VAXC) */ #define KA0902_SMM$K_LENGTH 296 /* */ /* DS1287A register definitions */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _ka0902_ds1287a { #pragma __nomember_alignment unsigned char ka0902_ds1287a$b_fill1 [3584]; unsigned int ka0902_ds1287a$l_port_index; unsigned char ka0902_ds1287a$b_fill2 [28]; unsigned int ka0902_ds1287a$l_port_data; char ka0902_ds1287a$b_fill_4_ [4]; } KA0902_DS1287A; /* */ /* IIC register definitions */ /* */ #define KA0902_IIC$M_DATA_READ_DIR 0x1 #define KA0902_IIC$M_STATUS_BB 0x1 #define KA0902_IIC$M_STATUS_LAB 0x2 #define KA0902_IIC$M_STATUS_AAS 0x4 #define KA0902_IIC$M_STATUS_ADO 0x8 #define KA0902_IIC$M_STATUS_BER 0x10 #define KA0902_IIC$M_STATUS_STS 0x20 #define KA0902_IIC$M_STATUS_RES 0x40 #define KA0902_IIC$M_STATUS_PIN 0x80 #define KA0902_IIC$M_IIC_STATUS_FILL2 0xFFFFFF00 #define KA0902_IIC$M_CMD_ACKB 0x1 #define KA0902_IIC$M_CMD_STO 0x2 #define KA0902_IIC$M_CMD_STA 0x4 #define KA0902_IIC$M_CMD_ENI 0x8 #define KA0902_IIC$M_CMD_S3 0x10 #define KA0902_IIC$M_CMD_S2 0x20 #define KA0902_IIC$M_CMD_ESO 0x40 #define KA0902_IIC$M_CMD_PIN 0x80 #define KA0902_IIC$M_IIC_CMD_FILL3 0xFFFFFF00 #define KA0902_IIC$K_CPU0_EEPROM_SLAVE 168 /* Slave address of CPU0 EEPROM */ #define KA0902_IIC$K_CPU1_EEPROM_SLAVE 170 /* Slave address of CPU0 EEPROM */ #define KA0902_IIC$K_CPU2_EEPROM_SLAVE 174 /* Slave address of CPU0 EEPROM */ #define KA0902_IIC$K_CPU3_EEPROM_SLAVE 162 /* Slave address of CPU0 EEPROM */ #define KA0902_IIC$K_MEM0_EEPROM_SLAVE 160 /* Slave address of MEM0 EEPROM */ #define KA0902_IIC$K_MEM1_EEPROM_SLAVE 162 /* Slave address of MEM1 EEPROM */ #define KA0902_IIC$K_MEM2_EEPROM_SLAVE 164 /* Slave address of MEM2 EEPROM */ #define KA0902_IIC$K_MEM3_EEPROM_SLAVE 166 /* Slave address of MEM3 EEPROM */ #define KA0902_IIC$K_IO_EEPROM_SLAVE 172 /* Slave address of I/O EEPROM */ #define KA0902_IIC$K_EXTIO_EEPROM_SLAVE 174 /* Slave addr. of Ext.I/O EEPROM */ #define KA0902_IIC$K_MASTER_SLAVE 182 /* Slave address of master */ #define KA0902_IIC$K_IIC_CLOCK 28 /* Clock speed 90khz + 12Mhz */ #define KA0902_IIC$K_IIC_RETRY_MAX 10 /* Maximum number of retrys */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _ka0902_iic { #pragma __nomember_alignment unsigned char ka0902_iic$b_fill1 [42496]; __union { unsigned int ka0902_iic$l_iic_data; __struct { unsigned ka0902_iic$v_data_read_dir : 1; /* Write the data */ unsigned ka0902_iic$v_iic_data_fill2 : 31; } ka0902_iic$r_iic_data_bits; } ka0902_iic$r_iic_data_ov; unsigned char ka0902_iic$b_fill2 [28]; __union { unsigned int ka0902_iic$l_iic_status; __struct { unsigned ka0902_iic$v_status_bb : 1; /* Bus Busy NOT */ unsigned ka0902_iic$v_status_lab : 1; /* Lost Arbitration */ unsigned ka0902_iic$v_status_aas : 1; /* Addressed as Slave */ unsigned ka0902_iic$v_status_ado : 1; /* Address 0/Last recieved bit */ unsigned ka0902_iic$v_status_ber : 1; /* Bus Error */ unsigned ka0902_iic$v_status_sts : 1; /* External Stop signal */ unsigned ka0902_iic$v_status_res : 1; /* Reserved must be 0 */ unsigned ka0902_iic$v_status_pin : 1; /* Pending Interrupt NOT */ unsigned ka0902_iic$v_iic_status_fill2 : 24; } ka0902_iic$r_iic_status_bits; __struct { unsigned ka0902_iic$v_cmd_ackb : 1; /* Acknowledge after each byte */ unsigned ka0902_iic$v_cmd_sto : 1; /* Send Stop condition */ unsigned ka0902_iic$v_cmd_sta : 1; /* Send Start condition */ unsigned ka0902_iic$v_cmd_eni : 1; /* External Interrupt Enable */ unsigned ka0902_iic$v_cmd_s3 : 1; /* Interrupt Vector Register */ unsigned ka0902_iic$v_cmd_s2 : 1; /* Clock Register */ unsigned ka0902_iic$v_cmd_eso : 1; /* Enable serial output */ unsigned ka0902_iic$v_cmd_pin : 1; /* Pending Interrupt Not */ unsigned ka0902_iic$v_iic_cmd_fill3 : 24; } ka0902_iic$r_iic_cmd_bits; } ka0902_iic$r_iic_status_ov; char ka0902_iic$b_fill_5_ [4]; } KA0902_IIC; #if !defined(__VAXC) #define ka0902_iic$l_iic_data ka0902_iic$r_iic_data_ov.ka0902_iic$l_iic_data #define ka0902_iic$v_data_read_dir ka0902_iic$r_iic_data_ov.ka0902_iic$r_iic_data_bits.ka0902_iic$v_data_read_dir #define ka0902_iic$l_iic_status ka0902_iic$r_iic_status_ov.ka0902_iic$l_iic_status #define ka0902_iic$v_status_bb ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_bb #define ka0902_iic$v_status_lab ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_lab #define ka0902_iic$v_status_aas ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_aas #define ka0902_iic$v_status_ado ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_ado #define ka0902_iic$v_status_ber ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_ber #define ka0902_iic$v_status_sts ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_sts #define ka0902_iic$v_status_res ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_res #define ka0902_iic$v_status_pin ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_status_bits.ka0902_iic$v_status_pin #define ka0902_iic$v_cmd_ackb ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_ackb #define ka0902_iic$v_cmd_sto ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_sto #define ka0902_iic$v_cmd_sta ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_sta #define ka0902_iic$v_cmd_eni ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_eni #define ka0902_iic$v_cmd_s3 ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_s3 #define ka0902_iic$v_cmd_s2 ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_s2 #define ka0902_iic$v_cmd_eso ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_eso #define ka0902_iic$v_cmd_pin ka0902_iic$r_iic_status_ov.ka0902_iic$r_iic_cmd_bits.ka0902_iic$v_cmd_pin #endif /* #if !defined(__VAXC) */ /* */ /* EISA register definitions */ /* */ #define KA0902_ESC$K_RID 8 /* Revision ID register */ #define KA0902_ESC$K_MS 64 /* Mode Select register */ #define KA0902_ESC$K_ESCID 2 /* EISA Config space enable */ #define KA0902_ESC$K_SGRBA 87 /* Scatter Gather Base Address register */ #define KA0902_ESC$K_PIRQ0 64 /* PCI IRQ 0 register */ #define KA0902_ESC$K_PIRQ1 65 /* PCI IRQ 0 register */ #define KA0902_ESC$K_PIRQ2 66 /* PCI IRQ 0 register */ #define KA0902_ESC$K_PIRQ3 67 /* PCI IRQ 0 register */ #define KA0902_ESC$K_EISAID0 80 /* EISA ID register 0 */ #define KA0902_ESC$K_EISAID1 81 /* EISA ID register 1 */ #define KA0902_ESC$K_EISAID2 82 /* EISA ID register 2 */ #define KA0902_ESC$K_EISAID3 83 /* EISA ID register 3 */ #define KA0902_ESC$K_CFG_ENABLE 15 /* Value of ESCID to enable config space */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _ka0902_esc { #pragma __nomember_alignment unsigned char ka0902_esc$b_fill1 [1088]; unsigned int ka0902_esc$l_cfgai; /* Configuration Address Index register */ unsigned char ka0902_esc$b_fill2 [28]; unsigned int ka0902_esc$l_cfgdi; /* Configuration Data Index register */ unsigned char ka0902_esc$b_fill3 [1988]; unsigned int ka0902_esc$l_nmisc; /* NMI Status and Control register */ unsigned char ka0902_esc$b_fill4 [32764]; unsigned int ka0902_esc$l_nmiesc; /* NMI Extended Status and Control */ unsigned char ka0902_esc$b_fill5 [92]; unsigned int ka0902_esc$l_lebmg; /* Last EISA Bus Master Granted */ /* Define index of... */ char ka0902_esc$b_fill_6_ [4]; } KA0902_ESC; #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __KA0902DEF_LOADED */