/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:27:01 by OpenVMS SDL EV3-3 */ /* Source: 25-MAR-1993 14:44:52 $1$DGA7274:[LIB_H.SRC]KA0202DEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $KA0202DEF ***/ #ifndef __KA0202DEF_LOADED #define __KA0202DEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif #define KA0202$K_MAX_CPU_MODULES 2 #define KA0202$K_MAX_MEMORY_MODULES 4 #define KA0202$M_IOCSR_ENET_HLT_ENA 0x1 #define KA0202$M_IOCSR_ENET_HLT 0x2 #define KA0202$M_IOCSR_FBUS_HLT_ENA 0x10 #define KA0202$M_IOCSR_FBUS_HLT 0x20 #define KA0202$M_IOCSR_FBUS_INT_STS 0x40 #define KA0202$M_IOCSR_FBUS_RESET_L 0x80 #define KA0202$M_IOCSR_FBUS_PWR_FAIL 0x100 #define KA0202$M_IOCSR_MBX_ENA_L 0x200 #define KA0202$M_IOCSR_FBUS_DMA_ENA_L 0x400 #define KA0202$M_IOCSR_LBUS_DMA_ENA_L 0x800 #define KA0202$M_IOCSR_CA_WWP_0 0x1000 #define KA0202$M_IOCSR_CA_WWP_2 0x2000 #define KA0202$M_IOCSR_DATA_WWP_L 0x4000 #define KA0202$M_IOCSR_FMBPR_RESET_L 0x8000 #define KA0202$M_IOCSR_LMBPR_RESET_L 0x10000 #define KA0202$M_IOCSR_LBUS_RESET_L 0x20000 #define KA0202$M_IOCSR_FBUS_COMP_PE_L 0x40000 #define KA0202$M_IOCSR_LBUS_COMP_PE_L 0x80000 #define KA0202$M_IOCSR_FBUS_RESET_H 0x8000000000 #define KA0202$M_IOCSR_MBX_ENA_H 0x20000000000 #define KA0202$M_IOCSR_FBUS_DMA_ENA_H 0x40000000000 #define KA0202$M_IOCSR_LBUS_DMA_ENA_H 0x80000000000 #define KA0202$M_IOCSR_CA_WWP_1 0x100000000000 #define KA0202$M_IOCSR_CA_WWP_3 0x200000000000 #define KA0202$M_IOCSR_DATA_WWP_H 0x400000000000 #define KA0202$M_IOCSR_FMBPR_RESET_H 0x800000000000 #define KA0202$M_IOCSR_LMBPR_RESET_H 0x1000000000000 #define KA0202$M_IOCSR_LBUS_RESET_H 0x2000000000000 #define KA0202$M_IOCSR_FBUS_COMP_PE_H 0x4000000000000 #define KA0202$M_IOCSR_LBUS_COMP_PE_H 0x8000000000000 #define KA0202$M_CERR1_UNCORR_RDERR_L 0x1 #define KA0202$M_CERR1_NOACK_L 0x2 #define KA0202$M_CERR1_CMDADR_PE_L 0x4 #define KA0202$M_CERR1_MCMDADR_PE_L 0x8 #define KA0202$M_CERR1_WRTDAT_PE_L 0x10 #define KA0202$M_CERR1_MWRTDAT_PE_L 0x20 #define KA0202$M_CERR1_RDDAT_PE_L 0x40 #define KA0202$M_CERR1_MRDDAT_PE_L 0x80 #define KA0202$M_CERR1_CMDADR_PE_LW0 0x100 #define KA0202$M_CERR1_CMDADR_PE_LW2 0x200 #define KA0202$M_CERR1_DAT_PE_LW0 0x400 #define KA0202$M_CERR1_DAT_PE_LW2 0x800 #define KA0202$M_CERR1_DAT_PE_LW4 0x1000 #define KA0202$M_CERR1_DAT_PE_LW6 0x2000 #define KA0202$M_CERR1_CSTALL_SYNC_H 0x4000 #define KA0202$M_CERR1_FBUS_MBX_ERR 0x8000 #define KA0202$M_CERR1_CMD_WRTDAT_PE_L 0x10000 #define KA0202$M_CERR1_BUS_SYNC 0x20000 #define KA0202$M_CERR1_UNCORR_RDERR_H 0x100000000 #define KA0202$M_CERR1_NOACK_H 0x200000000 #define KA0202$M_CERR1_CMDADR_PE_H 0x400000000 #define KA0202$M_CERR1_MCMDADR_PE_H 0x800000000 #define KA0202$M_CERR1_WRTDAT_PE_H 0x1000000000 #define KA0202$M_CERR1_MWRTDAT_PE_H 0x2000000000 #define KA0202$M_CERR1_RDDAT_PE_H 0x4000000000 #define KA0202$M_CERR1_MRDDAT_PE_H 0x8000000000 #define KA0202$M_CERR1_CMDADR_PE_LW1 0x10000000000 #define KA0202$M_CERR1_CMDADR_PE_LW3 0x20000000000 #define KA0202$M_CERR1_DAT_PE_LW1 0x40000000000 #define KA0202$M_CERR1_DAT_PE_LW3 0x80000000000 #define KA0202$M_CERR1_DAT_PE_LW5 0x100000000000 #define KA0202$M_CERR1_DAT_PE_LW7 0x200000000000 #define KA0202$M_CERR1_CSTALL_SYNC_L 0x400000000000 #define KA0202$M_CERR1_LBUS_MBX 0x800000000000 #define KA0202$M_CERR1_CMD_WRTDAT_PE_H 0x1000000000000 #define KA0202$M_CERR2_L 0xFFFFFFFF #define KA0202$M_CERR2_H 0xFFFFFFFF00000000 #define KA0202$M_LMBPR_MBX_ADDR 0xFFFFFFC0 #define KA0202$M_FMBPR_MBX_ADDR 0xFFFFFFC0 #define KA0202$M_FIVECT_VECTOR 0xFFFF #define KA0202$M_FHVECT_VECTOR 0xFFFF #define KA0202$M_FERR1_DATA_PE_L 0x1 #define KA0202$M_FERR1_ADDR_PE_L 0x2 #define KA0202$M_FERR1_FILL1 0xFFFFFFFC #define KA0202$M_FERR1_DATA_PE_H 0x100000000 #define KA0202$M_FERR1_ADDR_PE_H 0x200000000 #define KA0202$M_LINT_SCSI0_IRQ 0x1 #define KA0202$M_LINT_SCSI1_IRQ 0x2 #define KA0202$M_LINT_SCSI2_IRQ 0x4 #define KA0202$M_LINT_SCSI3_IRQ 0x8 #define KA0202$M_LINT_SCSI4_IRQ 0x10 #define KA0202$M_LINT_SLU_IRQ 0x100000000 #define KA0202$M_LINT_NI0_IRQ 0x200000000 #define KA0202$M_LINT_NI1_IRQ 0x400000000 #define KA0202$M_LINT_SBUS_IRQ 0x800000000 #define KA0202$M_LERR1_EVEN 0x1 #define KA0202$M_LERR1_ODD 0x100000000 #define KA0202$K_LENGTH 57344 #define KA0202$S_KA0202DEF 57344 /* Old size name, synonym for KA0202$S_KA0202 */ typedef struct _ka0202 { __union { __int64 ka0202$q_iocsr; __struct { unsigned ka0202$v_iocsr_enet_hlt_ena : 1; /* Ethernet halt enable */ unsigned ka0202$v_iocsr_enet_hlt : 1; /* Ethernet halt */ unsigned ka0202$v_iocsr_fill1 : 2; /* Filler */ unsigned ka0202$v_iocsr_fbus_hlt_ena : 1; /* Futurebus halt enable */ unsigned ka0202$v_iocsr_fbus_hlt : 1; /* Futurebus halt */ unsigned ka0202$v_iocsr_fbus_int_sts : 1; /* Futurebus interrupt status */ unsigned ka0202$v_iocsr_fbus_reset_l : 1; /* Fbus reset */ unsigned ka0202$v_iocsr_fbus_pwr_fail : 1; /* Fbus power fail msg */ unsigned ka0202$v_iocsr_mbx_ena_l : 1; /* Mailbox enable even */ unsigned ka0202$v_iocsr_fbus_dma_ena_l : 1; /* Futurebus DMA enable even */ unsigned ka0202$v_iocsr_lbus_dma_ena_l : 1; /* Lbus DMA enable even */ unsigned ka0202$v_iocsr_ca_wwp_0 : 1; /* Command/address write wrong parity 0 */ unsigned ka0202$v_iocsr_ca_wwp_2 : 1; /* Command/address write wrong parity 2 */ unsigned ka0202$v_iocsr_data_wwp_l : 1; /* Data write wrong parity even */ unsigned ka0202$v_iocsr_fmbpr_reset_l : 1; /* Reset fbus mbx pointer reg */ unsigned ka0202$v_iocsr_lmbpr_reset_l : 1; /* Reset lbus mbx pointer reg */ unsigned ka0202$v_iocsr_lbus_reset_l : 1; /* Lbus reset */ unsigned ka0202$v_iocsr_fbus_comp_pe_l : 1; /* Fbus complement parity even */ unsigned ka0202$v_iocsr_lbus_comp_pe_l : 1; /* Lbus complement parity even */ unsigned ka0202$v_iocsr_fill2 : 12; unsigned ka0202$v_iocsr_fill3 : 7; unsigned ka0202$v_iocsr_fbus_reset_h : 1; /* Fbus reset */ unsigned ka0202$v_iocsr_fill4 : 1; unsigned ka0202$v_iocsr_mbx_ena_h : 1; /* Mailbox enable odd */ unsigned ka0202$v_iocsr_fbus_dma_ena_h : 1; /* Futurebus DMA enable odd */ unsigned ka0202$v_iocsr_lbus_dma_ena_h : 1; /* Lbus DMA enable odd */ unsigned ka0202$v_iocsr_ca_wwp_1 : 1; /* Command/address write wrong parity 1 */ unsigned ka0202$v_iocsr_ca_wwp_3 : 1; /* Command/address write wrong parity 3 */ unsigned ka0202$v_iocsr_data_wwp_h : 1; /* Data write wrong parity odd */ unsigned ka0202$v_iocsr_fmbpr_reset_h : 1; /* Reset fbus mbx pointer reg */ unsigned ka0202$v_iocsr_lmbpr_reset_h : 1; /* Reset lbus mbx pointer reg */ unsigned ka0202$v_iocsr_lbus_reset_h : 1; /* Lbus reset */ unsigned ka0202$v_iocsr_fbus_comp_pe_h : 1; /* Fbus complement parity even */ unsigned ka0202$v_iocsr_lbus_comp_pe_h : 1; /* Lbus complement parity even */ unsigned ka0202$v_fill_0_ : 4; } ka0202$r_iocsr_bits; } ka0202$r_iocsr_overlay; char ka0202$b_fill1 [24]; __union { __int64 ka0202$q_cerr1; __struct { unsigned ka0202$v_cerr1_uncorr_rderr_l : 1; /* Uncorrectable read error */ unsigned ka0202$v_cerr1_noack_l : 1; /* No acknowledge error */ unsigned ka0202$v_cerr1_cmdadr_pe_l : 1; /* Command address parity error even */ unsigned ka0202$v_cerr1_mcmdadr_pe_l : 1; /* Missed command address parity error even */ unsigned ka0202$v_cerr1_wrtdat_pe_l : 1; /* Write data parity error even */ unsigned ka0202$v_cerr1_mwrtdat_pe_l : 1; /* Missed write data parity error even */ unsigned ka0202$v_cerr1_rddat_pe_l : 1; /* Read data parity error even */ unsigned ka0202$v_cerr1_mrddat_pe_l : 1; /* Missed read data parity error even */ unsigned ka0202$v_cerr1_cmdadr_pe_lw0 : 1; /* Command address parity error longword 0 */ unsigned ka0202$v_cerr1_cmdadr_pe_lw2 : 1; /* Command address parity error longword 2 */ unsigned ka0202$v_cerr1_dat_pe_lw0 : 1; /* Data parity error longword 0 */ unsigned ka0202$v_cerr1_dat_pe_lw2 : 1; /* Data parity error longword 2 */ unsigned ka0202$v_cerr1_dat_pe_lw4 : 1; /* Data parity error longword 4 */ unsigned ka0202$v_cerr1_dat_pe_lw6 : 1; /* Data parity error longword 6 */ unsigned ka0202$v_cerr1_cstall_sync_h : 1; unsigned ka0202$v_cerr1_fbus_mbx_err : 1; /* Futurebus mailbox error */ unsigned ka0202$v_cerr1_cmd_wrtdat_pe_l : 1; unsigned ka0202$v_cerr1_bus_sync : 1; unsigned ka0202$v_cerr1_fill1 : 14; /* Filler */ unsigned ka0202$v_cerr1_uncorr_rderr_h : 1; /* Uncorrectable read error */ unsigned ka0202$v_cerr1_noack_h : 1; /* No acknowledge error */ unsigned ka0202$v_cerr1_cmdadr_pe_h : 1; /* Command address parity error even */ unsigned ka0202$v_cerr1_mcmdadr_pe_h : 1; /* Missed command address parity error even */ unsigned ka0202$v_cerr1_wrtdat_pe_h : 1; /* Write data parity error even */ unsigned ka0202$v_cerr1_mwrtdat_pe_h : 1; /* Missed write data parity error even */ unsigned ka0202$v_cerr1_rddat_pe_h : 1; /* Read data parity error even */ unsigned ka0202$v_cerr1_mrddat_pe_h : 1; /* Missed read data parity error even */ unsigned ka0202$v_cerr1_cmdadr_pe_lw1 : 1; /* Command address parity error longword 0 */ unsigned ka0202$v_cerr1_cmdadr_pe_lw3 : 1; /* Command address parity error longword 2 */ unsigned ka0202$v_cerr1_dat_pe_lw1 : 1; /* Data parity error longword 0 */ unsigned ka0202$v_cerr1_dat_pe_lw3 : 1; /* Data parity error longword 2 */ unsigned ka0202$v_cerr1_dat_pe_lw5 : 1; /* Data parity error longword 4 */ unsigned ka0202$v_cerr1_dat_pe_lw7 : 1; /* Data parity error longword 6 */ unsigned ka0202$v_cerr1_cstall_sync_l : 1; unsigned ka0202$v_cerr1_lbus_mbx : 1; /* Lbus mailbox error */ unsigned ka0202$v_cerr1_cmd_wrtdat_pe_h : 1; unsigned ka0202$v_fill_1_ : 7; } ka0202$r_cerr1_bits; } ka0202$r_cerr1_overlay; char ka0202$b_fill2 [24]; __union { unsigned __int64 ka0202$q_cerr2; /* Cobra Error register 2 */ __struct { unsigned ka0202$v_cerr2_l : 32; unsigned ka0202$v_cerr2_h : 32; } ka0202$r_cerr2_bits; } ka0202$r_cerr2_overlay; char ka0202$b_fill3 [24]; __union { __int64 ka0202$q_cerr3; } ka0202$r_cerr3_overlay; char ka0202$b_fill4 [24]; __union { __int64 ka0202$q_lmbpr; __struct { unsigned ka0202$v_lmbpr_fill1 : 6; /* Filler */ unsigned ka0202$v_lmbpr_mbx_addr : 26; /* Lbus mailbox address */ } ka0202$r_lmbpr_bits; } ka0202$r_lmbpr_overlay; char ka0202$b_fill5 [24]; __union { __int64 ka0202$q_fmbpr; __struct { unsigned ka0202$v_fmbpr_fill1 : 6; /* Filler */ unsigned ka0202$v_fmbpr_mbx_addr : 26; /* Futurebus mailbox address */ } ka0202$r_fmbpr_bits; } ka0202$r_fmbpr_overlay; char ka0202$b_fill6 [24]; __union { __int64 ka0202$q_diagcsr; } ka0202$r_diagcsr_overlay; char ka0202$b_fill7 [24]; __union { __int64 ka0202$q_fivect; __struct { unsigned ka0202$v_fivect_vector : 16; /* Futurebus interrupt vector */ } ka0202$r_fivect_bits; } ka0202$r_fivect_overlay; char ka0202$b_fill8 [24]; __union { __int64 ka0202$q_fhvect; __struct { unsigned ka0202$v_fhvect_vector : 16; /* Futurebus halt vector */ } ka0202$r_fhvect_bits; } ka0202$r_fhvect_overlay; char ka0202$b_fill9 [24]; __union { __int64 ka0202$q_ferr1; __struct { unsigned ka0202$v_ferr1_data_pe_l : 1; unsigned ka0202$v_ferr1_addr_pe_l : 1; unsigned ka0202$v_ferr1_fill1 : 30; unsigned ka0202$v_ferr1_data_pe_h : 1; unsigned ka0202$v_ferr1_addr_pe_h : 1; unsigned ka0202$v_fill_2_ : 6; } ka0202$r_ferr1_bits; } ka0202$r_ferr1_overlay; char ka0202$b_fill10 [24]; __union { __int64 ka0202$q_ferr2; } ka0202$r_ferr2_overlay; char ka0202$b_fill11 [24]; __union { __int64 ka0202$q_lint; __struct { unsigned ka0202$v_lint_scsi0_irq : 1; /* SCSI bus 0 interrupt request */ unsigned ka0202$v_lint_scsi1_irq : 1; /* SCSI bus 1 interrupt request */ unsigned ka0202$v_lint_scsi2_irq : 1; /* SCSI bus 2 interrupt request */ unsigned ka0202$v_lint_scsi3_irq : 1; /* SCSI bus 3 interrupt request */ unsigned ka0202$v_lint_scsi4_irq : 1; /* SCSI bus 4 interrupt request */ unsigned ka0202$v_lint_fill1 : 27; /* Filler */ unsigned ka0202$v_lint_slu_irq : 1; /* Seriel line unit interrupt request */ unsigned ka0202$v_lint_ni0_irq : 1; /* Ethernet 0 interrupt request */ unsigned ka0202$v_lint_ni1_irq : 1; /* Ethernet 1 interrupt request */ unsigned ka0202$v_lint_sbus_irq : 1; /* Serial bus interrupt request */ unsigned ka0202$v_fill_3_ : 4; } ka0202$r_lint_bits; } ka0202$r_lint_overlay; char ka0202$b_fill12 [24]; __union { __int64 ka0202$q_lerr1; __struct { unsigned ka0202$v_lerr1_even : 1; /* Even error */ unsigned ka0202$v_lerr1_fill1 : 31; /* Filler */ unsigned ka0202$v_lerr1_odd : 1; /* Odd error */ unsigned ka0202$v_fill_4_ : 7; } ka0202$r_lerr1_bits; } ka0202$r_lerr1_overlay; char ka0202$b_fill13 [24]; __union { __int64 ka0202$q_lerr2; } ka0202$r_lerr2_overlay; char ka0202$b_fill14 [7768]; __int64 ka0202$q_cpu0 [1024]; __int64 ka0202$q_cpu1 [1024]; __int64 ka0202$q_cmm0 [1024]; __int64 ka0202$q_cmm1 [1024]; __int64 ka0202$q_cmm2 [1024]; __int64 ka0202$q_cmm3 [1024]; } KA0202; #if !defined(__VAXC) #define ka0202$q_iocsr ka0202$r_iocsr_overlay.ka0202$q_iocsr #define ka0202$v_iocsr_enet_hlt_ena ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_enet_hlt_ena #define ka0202$v_iocsr_enet_hlt ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_enet_hlt #define ka0202$v_iocsr_fbus_hlt_ena ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_hlt_ena #define ka0202$v_iocsr_fbus_hlt ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_hlt #define ka0202$v_iocsr_fbus_int_sts ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_int_sts #define ka0202$v_iocsr_fbus_reset_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_reset_l #define ka0202$v_iocsr_fbus_pwr_fail ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_pwr_fail #define ka0202$v_iocsr_mbx_ena_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_mbx_ena_l #define ka0202$v_iocsr_fbus_dma_ena_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_dma_ena_l #define ka0202$v_iocsr_lbus_dma_ena_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lbus_dma_ena_l #define ka0202$v_iocsr_ca_wwp_0 ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_ca_wwp_0 #define ka0202$v_iocsr_ca_wwp_2 ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_ca_wwp_2 #define ka0202$v_iocsr_data_wwp_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_data_wwp_l #define ka0202$v_iocsr_fmbpr_reset_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fmbpr_reset_l #define ka0202$v_iocsr_lmbpr_reset_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lmbpr_reset_l #define ka0202$v_iocsr_lbus_reset_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lbus_reset_l #define ka0202$v_iocsr_fbus_comp_pe_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_comp_pe_l #define ka0202$v_iocsr_lbus_comp_pe_l ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lbus_comp_pe_l #define ka0202$v_iocsr_fbus_reset_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_reset_h #define ka0202$v_iocsr_mbx_ena_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_mbx_ena_h #define ka0202$v_iocsr_fbus_dma_ena_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_dma_ena_h #define ka0202$v_iocsr_lbus_dma_ena_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lbus_dma_ena_h #define ka0202$v_iocsr_ca_wwp_1 ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_ca_wwp_1 #define ka0202$v_iocsr_ca_wwp_3 ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_ca_wwp_3 #define ka0202$v_iocsr_data_wwp_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_data_wwp_h #define ka0202$v_iocsr_fmbpr_reset_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fmbpr_reset_h #define ka0202$v_iocsr_lmbpr_reset_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lmbpr_reset_h #define ka0202$v_iocsr_lbus_reset_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lbus_reset_h #define ka0202$v_iocsr_fbus_comp_pe_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_fbus_comp_pe_h #define ka0202$v_iocsr_lbus_comp_pe_h ka0202$r_iocsr_overlay.ka0202$r_iocsr_bits.ka0202$v_iocsr_lbus_comp_pe_h #define ka0202$q_cerr1 ka0202$r_cerr1_overlay.ka0202$q_cerr1 #define ka0202$v_cerr1_uncorr_rderr_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_uncorr_rderr_l #define ka0202$v_cerr1_noack_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_noack_l #define ka0202$v_cerr1_cmdadr_pe_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmdadr_pe_l #define ka0202$v_cerr1_mcmdadr_pe_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_mcmdadr_pe_l #define ka0202$v_cerr1_wrtdat_pe_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_wrtdat_pe_l #define ka0202$v_cerr1_mwrtdat_pe_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_mwrtdat_pe_l #define ka0202$v_cerr1_rddat_pe_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_rddat_pe_l #define ka0202$v_cerr1_mrddat_pe_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_mrddat_pe_l #define ka0202$v_cerr1_cmdadr_pe_lw0 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmdadr_pe_lw0 #define ka0202$v_cerr1_cmdadr_pe_lw2 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmdadr_pe_lw2 #define ka0202$v_cerr1_dat_pe_lw0 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw0 #define ka0202$v_cerr1_dat_pe_lw2 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw2 #define ka0202$v_cerr1_dat_pe_lw4 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw4 #define ka0202$v_cerr1_dat_pe_lw6 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw6 #define ka0202$v_cerr1_cstall_sync_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cstall_sync_h #define ka0202$v_cerr1_fbus_mbx_err ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_fbus_mbx_err #define ka0202$v_cerr1_cmd_wrtdat_pe_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmd_wrtdat_pe_l #define ka0202$v_cerr1_bus_sync ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_bus_sync #define ka0202$v_cerr1_uncorr_rderr_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_uncorr_rderr_h #define ka0202$v_cerr1_noack_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_noack_h #define ka0202$v_cerr1_cmdadr_pe_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmdadr_pe_h #define ka0202$v_cerr1_mcmdadr_pe_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_mcmdadr_pe_h #define ka0202$v_cerr1_wrtdat_pe_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_wrtdat_pe_h #define ka0202$v_cerr1_mwrtdat_pe_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_mwrtdat_pe_h #define ka0202$v_cerr1_rddat_pe_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_rddat_pe_h #define ka0202$v_cerr1_mrddat_pe_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_mrddat_pe_h #define ka0202$v_cerr1_cmdadr_pe_lw1 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmdadr_pe_lw1 #define ka0202$v_cerr1_cmdadr_pe_lw3 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmdadr_pe_lw3 #define ka0202$v_cerr1_dat_pe_lw1 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw1 #define ka0202$v_cerr1_dat_pe_lw3 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw3 #define ka0202$v_cerr1_dat_pe_lw5 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw5 #define ka0202$v_cerr1_dat_pe_lw7 ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_dat_pe_lw7 #define ka0202$v_cerr1_cstall_sync_l ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cstall_sync_l #define ka0202$v_cerr1_lbus_mbx ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_lbus_mbx #define ka0202$v_cerr1_cmd_wrtdat_pe_h ka0202$r_cerr1_overlay.ka0202$r_cerr1_bits.ka0202$v_cerr1_cmd_wrtdat_pe_h #define ka0202$q_cerr2 ka0202$r_cerr2_overlay.ka0202$q_cerr2 #define ka0202$v_cerr2_l ka0202$r_cerr2_overlay.ka0202$r_cerr2_bits.ka0202$v_cerr2_l #define ka0202$v_cerr2_h ka0202$r_cerr2_overlay.ka0202$r_cerr2_bits.ka0202$v_cerr2_h #define ka0202$q_cerr3 ka0202$r_cerr3_overlay.ka0202$q_cerr3 #define ka0202$q_lmbpr ka0202$r_lmbpr_overlay.ka0202$q_lmbpr #define ka0202$v_lmbpr_mbx_addr ka0202$r_lmbpr_overlay.ka0202$r_lmbpr_bits.ka0202$v_lmbpr_mbx_addr #define ka0202$q_fmbpr ka0202$r_fmbpr_overlay.ka0202$q_fmbpr #define ka0202$v_fmbpr_mbx_addr ka0202$r_fmbpr_overlay.ka0202$r_fmbpr_bits.ka0202$v_fmbpr_mbx_addr #define ka0202$q_diagcsr ka0202$r_diagcsr_overlay.ka0202$q_diagcsr #define ka0202$q_fivect ka0202$r_fivect_overlay.ka0202$q_fivect #define ka0202$v_fivect_vector ka0202$r_fivect_overlay.ka0202$r_fivect_bits.ka0202$v_fivect_vector #define ka0202$q_fhvect ka0202$r_fhvect_overlay.ka0202$q_fhvect #define ka0202$v_fhvect_vector ka0202$r_fhvect_overlay.ka0202$r_fhvect_bits.ka0202$v_fhvect_vector #define ka0202$q_ferr1 ka0202$r_ferr1_overlay.ka0202$q_ferr1 #define ka0202$v_ferr1_data_pe_l ka0202$r_ferr1_overlay.ka0202$r_ferr1_bits.ka0202$v_ferr1_data_pe_l #define ka0202$v_ferr1_addr_pe_l ka0202$r_ferr1_overlay.ka0202$r_ferr1_bits.ka0202$v_ferr1_addr_pe_l #define ka0202$v_ferr1_fill1 ka0202$r_ferr1_overlay.ka0202$r_ferr1_bits.ka0202$v_ferr1_fill1 #define ka0202$v_ferr1_data_pe_h ka0202$r_ferr1_overlay.ka0202$r_ferr1_bits.ka0202$v_ferr1_data_pe_h #define ka0202$v_ferr1_addr_pe_h ka0202$r_ferr1_overlay.ka0202$r_ferr1_bits.ka0202$v_ferr1_addr_pe_h #define ka0202$q_ferr2 ka0202$r_ferr2_overlay.ka0202$q_ferr2 #define ka0202$q_lint ka0202$r_lint_overlay.ka0202$q_lint #define ka0202$v_lint_scsi0_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_scsi0_irq #define ka0202$v_lint_scsi1_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_scsi1_irq #define ka0202$v_lint_scsi2_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_scsi2_irq #define ka0202$v_lint_scsi3_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_scsi3_irq #define ka0202$v_lint_scsi4_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_scsi4_irq #define ka0202$v_lint_slu_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_slu_irq #define ka0202$v_lint_ni0_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_ni0_irq #define ka0202$v_lint_ni1_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_ni1_irq #define ka0202$v_lint_sbus_irq ka0202$r_lint_overlay.ka0202$r_lint_bits.ka0202$v_lint_sbus_irq #define ka0202$q_lerr1 ka0202$r_lerr1_overlay.ka0202$q_lerr1 #define ka0202$v_lerr1_even ka0202$r_lerr1_overlay.ka0202$r_lerr1_bits.ka0202$v_lerr1_even #define ka0202$v_lerr1_odd ka0202$r_lerr1_overlay.ka0202$r_lerr1_bits.ka0202$v_lerr1_odd #define ka0202$q_lerr2 ka0202$r_lerr2_overlay.ka0202$q_lerr2 #endif /* #if !defined(__VAXC) */ #define KA0202_CPU$M_BCC_ENB_ALLOC_L 0x1 #define KA0202_CPU$M_BCC_FRC_FILL_SH_L 0x2 #define KA0202_CPU$M_BCC_ENB_TPC_L 0x4 #define KA0202_CPU$M_BCC_FILL_WTP_L 0x8 #define KA0202_CPU$M_BCC_FILL_WCP_L 0x10 #define KA0202_CPU$M_BCC_FILL_WDTP_L 0x20 #define KA0202_CPU$M_BCC_ENB_CEI_L 0x40 #define KA0202_CPU$M_BCC_ENB_EDCC_L 0x80 #define KA0202_CPU$M_BCC_ENB_EDC_CHK_L 0x100 #define KA0202_CPU$M_BCC_ENB_BC_CIO_L 0x200 #define KA0202_CPU$M_BCC_DIS_BLK_W_L 0x400 #define KA0202_CPU$M_BCC_ENB_BC_INIT_L 0x800 #define KA0202_CPU$M_BCC_FOR_EDCC_L 0x1000 #define KA0202_CPU$M_BCC_SH_D_V_L 0xE000 #define KA0202_CPU$M_BCC_EDC_L 0x3FFF0000 #define KA0202_CPU$M_BCC_CACHE_SIZE_L 0xC0000000 #define KA0202_CPU$M_BCC_ENB_ALLOC_H 0x100000000 #define KA0202_CPU$M_BCC_FRC_FILL_SH_H 0x200000000 #define KA0202_CPU$M_BCC_ENB_TPC_H 0x400000000 #define KA0202_CPU$M_BCC_FILL_WTP_H 0x800000000 #define KA0202_CPU$M_BCC_FILL_WCP_H 0x1000000000 #define KA0202_CPU$M_BCC_FILL_WDTP_H 0x2000000000 #define KA0202_CPU$M_BCC_ENB_CEI_H 0x4000000000 #define KA0202_CPU$M_BCC_ENB_EDCC_H 0x8000000000 #define KA0202_CPU$M_BCC_ENB_EDC_CHK_H 0x10000000000 #define KA0202_CPU$M_BCC_ENB_BC_CIO_H 0x20000000000 #define KA0202_CPU$M_BCC_DIS_BLK_W_H 0x40000000000 #define KA0202_CPU$M_BCC_ENB_BC_INIT_H 0x80000000000 #define KA0202_CPU$M_BCC_FOR_EDCC_H 0x100000000000 #define KA0202_CPU$M_BCC_SH_D_V_H 0xE00000000000 #define KA0202_CPU$M_BCC_EDC_L_H 0x3FFF000000000000 #define KA0202_CPU$M_BCC_CACHE_SIZE_H 0xC000000000000000 #define KA0202_BCC$K_CACHE_SIZE_512K 0 /* Cache size is 512Kb */ #define KA0202_BCC$K_CACHE_SIZE_1MB 1 /* Cache size is 1Mb */ #define KA0202_BCC$K_CACHE_SIZE_4MB 2 /* Cache size is 4Mb */ #define KA0202_CPU$M_BCCE_MCE 0x4 #define KA0202_CPU$M_BCCE_CE 0x8 #define KA0202_CPU$M_BCCE_CNTRL_PAR 0x100 #define KA0202_CPU$M_BCCE_SH 0x200 #define KA0202_CPU$M_BCCE_DIRTY 0x400 #define KA0202_CPU$M_BCCE_VALID 0x800 #define KA0202_CPU$M_BCCE_BC_EDC_L 0x20000 #define KA0202_CPU$M_BCCE_EDC_SYND_0 0x1FC0000 #define KA0202_CPU$M_BCCE_EDC_SYND_2 0xFE000000 #define KA0202_CPU$M_BCCE_MCE_H 0x100000000 #define KA0202_CPU$M_BCCE_CE_H 0x200000000 #define KA0202_CPU$M_BCCE_READ_ONLY 0x7FFC00000000 #define KA0202_CPU$M_BCCE_BC_EDC_H 0x800000000000 #define KA0202_CPU$M_BCCE_EDC_SYND_1 0x7F000000000000 #define KA0202_CPU$M_BCCE_EDC_SYND_3 0x3F80000000000000 #define KA0202_CPU$M_BCCEA_BCMAP_OFF 0x1FFFF #define KA0202_CPU$M_BCCEA_TAG_PAR 0x40000 #define KA0202_CPU$M_BCCEA_TAG_VALUE 0x7FF80000 #define KA0202_CPU$M_BCCEA_BCMAP_OFF_H 0x1FFFF00000000 #define KA0202_CPU$M_BCCEA_TAG_PAR_H 0x4000000000000 #define KA0202_CPU$M_BCCEA_TAG_VALUE_H 0x7FF8000000000000 #define KA0202_CPU$M_BCUE_MPE 0x1 #define KA0202_CPU$M_BCUE_PE 0x2 #define KA0202_CPU$M_BCUE_MUNCE_L 0x4 #define KA0202_CPU$M_BCUE_UNCE_L 0x8 #define KA0202_CPU$M_BCUE_CTRL_PAR 0x100 #define KA0202_CPU$M_BCUE_SH 0x200 #define KA0202_CPU$M_BCUE_DIRTY 0x400 #define KA0202_CPU$M_BCUE_VALID 0x800 #define KA0202_CPU$M_BCUE_BC_EDC_L 0x20000 #define KA0202_CPU$M_BCUE_EDC_SYND_0 0x1FC0000 #define KA0202_CPU$M_BCUE_EDC_SYND_2 0xFE000000 #define KA0202_CPU$M_BCUE_PE_H 0x100000000 #define KA0202_CPU$M_BCUE_MUNCE_H 0x200000000 #define KA0202_CPU$M_BCUE_UNCE_H 0x400000000 #define KA0202_CPU$M_BCUE_BC_EDC_H 0x1000000000000 #define KA0202_CPU$M_BCUE_EDC_SYND_1 0xFE000000000000 #define KA0202_CPU$M_BCUE_EDC_SYND_3 0x7F00000000000000 #define KA0202_CPU$M_BCUEA_BCMAP_OFF 0x1FFFF #define KA0202_CPU$M_BCUEA_PTP 0x20000 #define KA0202_CPU$M_BCUEA_TP 0x40000 #define KA0202_CPU$M_BCUEA_TV 0x7FF80000 #define KA0202_CPU$M_BCUEA_BCMAP_OFF_H 0xFFFF80000000 #define KA0202_CPU$M_BCUEA_PTP_H 0x1000000000000 #define KA0202_CPU$M_BCUEA_TP_H 0x2000000000000 #define KA0202_CPU$M_BCUEA_TV_H 0x3FFC000000000000 #define KA0202_CPU$M_MDTER_L 0x1 #define KA0202_CPU$M_DTER_L 0x2 #define KA0202_CPU$M_DTER_TOFF_L 0x3FC #define KA0202_CPU$M_DTER_DUP_TAG_L 0x3FFFFC00 #define KA0202_CPU$M_DTER_DTP 0x40000000 #define KA0202_CPU$M_MDTER_H 0x100000000 #define KA0202_CPU$M_DTER_H 0x200000000 #define KA0202_CPU$M_DTER_DT_H 0x3FC00000000 #define KA0202_CPU$M_DTER_DUP_TAG_H 0x3FFFFC0000000000 #define KA0202_CPU$M_DTER_DTP_H 0x4000000000000000 #define KA0202_CPU$M_CBCTL_DWP 0x1 #define KA0202_CPU$M_CBCTL_CAWP 0x6 #define KA0202_CPU$M_CBCTL_EPC 0x8 #define KA0202_CPU$M_CBCTL_FRC_SH 0x10 #define KA0202_CPU$M_CBCTL_CMDER_ID 0xE0 #define KA0202_CPU$M_CBCTL_ACM 0x700 #define KA0202_CPU$M_CBCTL_ENB_CI 0x800 #define KA0202_CPU$M_CBCTL_RD 0x1000 #define KA0202_CPU$M_CBCTL_QW_2_SEL 0x2000 #define KA0202_CPU$M_CBCTL_SEL_DRACK 0x4000 #define KA0202_CPU$M_CBCTL_DWP_H 0x100000000 #define KA0202_CPU$M_CBCTL_CAWP_H 0x600000000 #define KA0202_CPU$M_CBCTL_EPC_H 0x800000000 #define KA0202_CPU$M_CBCTL_FRC_SH_H 0x1000000000 #define KA0202_CPU$M_CBCTL_CMDER_ID_H 0xE000000000 #define KA0202_CPU$M_CBCTL_ACM_H 0x70000000000 #define KA0202_CPU$M_CBCTL_ENB_CI_H 0x80000000000 #define KA0202_CPU$M_CBCTL_RD_H 0x100000000000 #define KA0202_CPU$M_CBCTL_QW_2_SEL_H 0x200000000000 #define KA0202_CPU$M_CBCTL_SEL_DRACK_H 0x400000000000 #define KA0202_CPU$M_CBE_RD_L 0x2 #define KA0202_CPU$M_CBE_CAP_L 0x4 #define KA0202_CPU$M_CBE_MCAP_L 0x8 #define KA0202_CPU$M_CBE_PE_WRD_L 0x10 #define KA0202_CPU$M_CBE_MPE_WRD_L 0x20 #define KA0202_CPU$M_CBE_PE_RD_L 0x40 #define KA0202_CPU$M_CBE_MPE_RD_L 0x80 #define KA0202_CPU$M_CBE_CA_PE_LW0 0x100 #define KA0202_CPU$M_CBE_CA_PE_LW2 0x200 #define KA0202_CPU$M_CBE_D_PE_LW0 0x400 #define KA0202_CPU$M_CBE_D_PE_LW2 0x800 #define KA0202_CPU$M_CBE_D_PE_LW4 0x1000 #define KA0202_CPU$M_CBE_D_PE_LW6 0x2000 #define KA0202_CPU$M_CBE_CA_NACK 0x4000 #define KA0202_CPU$M_CBE_WR_DATA_NACK 0x8000 #define KA0202_CPU$M_CBE_MCOUNT 0x7E000000 #define KA0202_CPU$M_CBE_MADR_VALID 0x80000000 #define KA0202_CPU$M_CBE_RD_H 0x200000000 #define KA0202_CPU$M_CBE_CAP_H 0x400000000 #define KA0202_CPU$M_CBE_MCAP_H 0x800000000 #define KA0202_CPU$M_CBE_PE_WRD_H 0x1000000000 #define KA0202_CPU$M_CBE_MPE_WRD_H 0x2000000000 #define KA0202_CPU$M_CBE_PE_RD_H 0x4000000000 #define KA0202_CPU$M_CBE_MPE_RD_H 0x8000000000 #define KA0202_CPU$M_CBE_CA_PE_LW1 0x10000000000 #define KA0202_CPU$M_CBE_CA_PE_LW3 0x20000000000 #define KA0202_CPU$M_CBE_D_PE_LW1 0x40000000000 #define KA0202_CPU$M_CBE_D_PE_LW3 0x80000000000 #define KA0202_CPU$M_CBE_D_PE_LW5 0x100000000000 #define KA0202_CPU$M_CBE_D_PE_LW7 0x200000000000 #define KA0202_CPU$M_CBE_UNDEFINED 0x400000000000 #define KA0202_CPU$M_CBE_UNDEFINED2 0x800000000000 #define KA0202_CPU$M_CBE_MCOUNT_H 0x7E00000000000000 #define KA0202_CPU$M_CBE_MADR_VALID_H 0x8000000000000000 #define KA0202_CPU$M_CBEAL_SBO1 0x3 #define KA0202_CPU$M_CBEAL_ADDR_CAD_L 0xFFFFFFFC #define KA0202_CPU$M_CBEAL_SBO2 0x300000000 #define KA0202_CPU$M_CBEAL_ADDR_CAD_H 0xFFFFFFFC00000000 #define KA0202_CPU$M_CBEAH_SBO1 0x3 #define KA0202_CPU$M_CBEAH_EA_L 0x3FFFC #define KA0202_CPU$M_CBEAH_T_TYPE_L 0x1C0000 #define KA0202_CPU$M_CBEAH_CMDR_ID_L 0xE00000 #define KA0202_CPU$M_CBEAH_SBO2 0xFF000000 #define KA0202_CPU$M_CBEAH_SBO3 0x300000000 #define KA0202_CPU$M_CBEAH_EA_H 0x3FFFC00000000 #define KA0202_CPU$M_CBEAH_T_TYPE_H 0x1C000000000000 #define KA0202_CPU$M_CBEAH_CMDR_ID_H 0xE0000000000000 #define KA0202_CPU$M_CBEAH_SBO4 0xFF00000000000000 #define KA0202_CPU$M_IPIR_UNDEFINED 0x1 #define KA0202_CPU$M_IPIR_REQ_INT_CPU 0x100000000 #define KA0202_CPU$M_SIC_UNDEFINED 0x1 #define KA0202_CPU$M_SIC_UNDEFINED1 0x2 #define KA0202_CPU$M_SIC_EIC 0x4 #define KA0202_CPU$M_SIC_IT_ICLEAR 0x100000000 #define KA0202_CPU$M_SIC_SYS_EVT_CLR 0x200000000 #define KA0202_CPU$M_SIC_UNDEFINED2 0x400000000 #define KA0202_CPU$M_ADLK_LA_V_L 0x1 #define KA0202_CPU$M_ADLK_LA_L 0xFFFFFFF8 #define KA0202_CPU$M_ADLK_LA_V_H 0x100000000 #define KA0202_CPU$M_ADLK_LA_H 0xFFFFFFF800000000 #define KA0202_CPU$M_MADRL_VALID_L 0x1 #define KA0202_CPU$M_MADRL_T_TYPE_L 0x2 #define KA0202_CPU$M_MADRL_ADDRESS_L 0xFFFFFFFC #define KA0202_CPU$M_MADRL_VALID_H 0x100000000 #define KA0202_CPU$M_MADRL_T_TYPE_H 0x200000000 #define KA0202_CPU$M_MADRL_ADDRESS_H 0xFFFFFFFC00000000 #define KA0202_CPU$K_LENGTH 8192 #define KA0202_CPU$S_CPUDEF 8192 /* Old size name, synonym for KA0202_CPU$$S_KA0202CPU */ typedef struct _ka0202cpu { __union { __int64 ka0202_cpu$q_bcc; __struct { unsigned ka0202_cpu$v_bcc_enb_alloc_l : 1; unsigned ka0202_cpu$v_bcc_frc_fill_sh_l : 1; unsigned ka0202_cpu$v_bcc_enb_tpc_l : 1; unsigned ka0202_cpu$v_bcc_fill_wtp_l : 1; unsigned ka0202_cpu$v_bcc_fill_wcp_l : 1; unsigned ka0202_cpu$v_bcc_fill_wdtp_l : 1; unsigned ka0202_cpu$v_bcc_enb_cei_l : 1; unsigned ka0202_cpu$v_bcc_enb_edcc_l : 1; unsigned ka0202_cpu$v_bcc_enb_edc_chk_l : 1; unsigned ka0202_cpu$v_bcc_enb_bc_cio_l : 1; unsigned ka0202_cpu$v_bcc_dis_blk_w_l : 1; unsigned ka0202_cpu$v_bcc_enb_bc_init_l : 1; unsigned ka0202_cpu$v_bcc_for_edcc_l : 1; unsigned ka0202_cpu$v_bcc_sh_d_v_l : 3; unsigned ka0202_cpu$v_bcc_edc_l : 14; unsigned ka0202_cpu$v_bcc_cache_size_l : 2; unsigned ka0202_cpu$v_bcc_enb_alloc_h : 1; unsigned ka0202_cpu$v_bcc_frc_fill_sh_h : 1; unsigned ka0202_cpu$v_bcc_enb_tpc_h : 1; unsigned ka0202_cpu$v_bcc_fill_wtp_h : 1; unsigned ka0202_cpu$v_bcc_fill_wcp_h : 1; unsigned ka0202_cpu$v_bcc_fill_wdtp_h : 1; unsigned ka0202_cpu$v_bcc_enb_cei_h : 1; unsigned ka0202_cpu$v_bcc_enb_edcc_h : 1; unsigned ka0202_cpu$v_bcc_enb_edc_chk_h : 1; unsigned ka0202_cpu$v_bcc_enb_bc_cio_h : 1; unsigned ka0202_cpu$v_bcc_dis_blk_w_h : 1; unsigned ka0202_cpu$v_bcc_enb_bc_init_h : 1; unsigned ka0202_cpu$v_bcc_for_edcc_h : 1; unsigned ka0202_cpu$v_bcc_sh_d_v_h : 3; unsigned ka0202_cpu$v_bcc_edc_l_h : 14; unsigned ka0202_cpu$v_bcc_cache_size_h : 2; } ka0202_cpu$r_bcc_bits; } ka0202_cpu$r_bcc_overlay; char ka0202_cpu$b_fill13a [24]; __union { __int64 ka0202_cpu$q_bcce; __struct { unsigned ka0202_cpu$v_bcce_fill1 : 2; unsigned ka0202_cpu$v_bcce_mce : 1; unsigned ka0202_cpu$v_bcce_ce : 1; unsigned ka0202_cpu$v_bcce_fill2 : 4; unsigned ka0202_cpu$v_bcce_cntrl_par : 1; unsigned ka0202_cpu$v_bcce_sh : 1; unsigned ka0202_cpu$v_bcce_dirty : 1; unsigned ka0202_cpu$v_bcce_valid : 1; unsigned ka0202_cpu$v_bcce_fill3 : 5; unsigned ka0202_cpu$v_bcce_bc_edc_l : 1; unsigned ka0202_cpu$v_bcce_edc_synd_0 : 7; unsigned ka0202_cpu$v_bcce_edc_synd_2 : 7; unsigned ka0202_cpu$v_bcce_mce_h : 1; unsigned ka0202_cpu$v_bcce_ce_h : 1; unsigned ka0202_cpu$v_bcce_read_only : 13; unsigned ka0202_cpu$v_bcce_bc_edc_h : 1; unsigned ka0202_cpu$v_bcce_edc_synd_1 : 7; unsigned ka0202_cpu$v_bcce_edc_synd_3 : 7; unsigned ka0202_cpu$v_fill_5_ : 2; } ka0202_cpu$r_bcce_bits; } ka0202_cpu$r_bcce_overlay; char ka0202_cpu$b_fill13b [24]; __union { __int64 ka0202_cpu$q_bccea; __struct { unsigned ka0202_cpu$v_bccea_bcmap_off : 17; unsigned ka0202_cpu$v_bccea_fill1 : 1; unsigned ka0202_cpu$v_bccea_tag_par : 1; unsigned ka0202_cpu$v_bccea_tag_value : 12; unsigned ka0202_cpu$v_bccea_fill2 : 1; unsigned ka0202_cpu$v_bccea_bcmap_off_h : 17; unsigned ka0202_cpu$v_bccea_fill1_h : 1; unsigned ka0202_cpu$v_bccea_tag_par_h : 1; unsigned ka0202_cpu$v_bccea_tag_value_h : 12; unsigned ka0202_cpu$v_bccea_fill2_h : 1; } ka0202_cpu$r_bccea_bits; } ka0202_cpu$r_bccea_overlay; char ka0202_cpu$b_fill13b1 [24]; __union { __int64 ka0202_cpu$q_bcue; __struct { unsigned ka0202_cpu$v_bcue_mpe : 1; unsigned ka0202_cpu$v_bcue_pe : 1; unsigned ka0202_cpu$v_bcue_munce_l : 1; unsigned ka0202_cpu$v_bcue_unce_l : 1; unsigned ka0202_cpu$v_bcue_fill1 : 4; unsigned ka0202_cpu$v_bcue_ctrl_par : 1; unsigned ka0202_cpu$v_bcue_sh : 1; unsigned ka0202_cpu$v_bcue_dirty : 1; unsigned ka0202_cpu$v_bcue_valid : 1; unsigned ka0202_cpu$v_bcue_fill2 : 5; unsigned ka0202_cpu$v_bcue_bc_edc_l : 1; unsigned ka0202_cpu$v_bcue_edc_synd_0 : 7; unsigned ka0202_cpu$v_bcue_edc_synd_2 : 7; unsigned ka0202_cpu$v_bcue_pe_h : 1; unsigned ka0202_cpu$v_bcue_munce_h : 1; unsigned ka0202_cpu$v_bcue_unce_h : 1; unsigned ka0202_cpu$v_bcue_fill3 : 13; unsigned ka0202_cpu$v_bcue_bc_edc_h : 1; unsigned ka0202_cpu$v_bcue_edc_synd_1 : 7; unsigned ka0202_cpu$v_bcue_edc_synd_3 : 7; unsigned ka0202_cpu$v_fill_6_ : 1; } ka0202_cpu$r_bcue_bits; } ka0202_cpu$r_bcue_overlay; char ka0202_cpu$b_fill13c [24]; __union { __int64 ka0202_cpu$q_bcuea; __struct { unsigned ka0202_cpu$v_bcuea_bcmap_off : 17; unsigned ka0202_cpu$v_bcuea_ptp : 1; unsigned ka0202_cpu$v_bcuea_tp : 1; unsigned ka0202_cpu$v_bcuea_tv : 12; unsigned ka0202_cpu$v_bcuea_bcmap_off_h : 17; unsigned ka0202_cpu$v_bcuea_ptp_h : 1; unsigned ka0202_cpu$v_bcuea_tp_h : 1; unsigned ka0202_cpu$v_bcuea_tv_h : 12; unsigned ka0202_cpu$v_fill_7_ : 2; } ka0202_cpu$r_bcuea_bits; } ka0202_cpu$r_bcuea_overlay; char ka0202_cpu$b_fill13d [24]; __union { __int64 ka0202_cpu$q_dter; __struct { unsigned ka0202_cpu$v_mdter_l : 1; unsigned ka0202_cpu$v_dter_l : 1; unsigned ka0202_cpu$v_dter_toff_l : 8; unsigned ka0202_cpu$v_dter_dup_tag_l : 20; unsigned ka0202_cpu$v_dter_dtp : 1; unsigned ka0202_cpu$v_dter_fill1 : 1; unsigned ka0202_cpu$v_mdter_h : 1; unsigned ka0202_cpu$v_dter_h : 1; unsigned ka0202_cpu$v_dter_dt_h : 8; unsigned ka0202_cpu$v_dter_dup_tag_h : 20; unsigned ka0202_cpu$v_dter_dtp_h : 1; unsigned ka0202_cpu$v_dter_fill1_h : 1; } ka0202_cpu$r_dter_bits; } ka0202_cpu$r_dter_overlay; char ka0202_cpu$b_fill13e [24]; __union { __int64 ka0202_cpu$q_cbctl; __struct { unsigned ka0202_cpu$v_cbctl_dwp : 1; unsigned ka0202_cpu$v_cbctl_cawp : 2; unsigned ka0202_cpu$v_cbctl_epc : 1; unsigned ka0202_cpu$v_cbctl_frc_sh : 1; unsigned ka0202_cpu$v_cbctl_cmder_id : 3; unsigned ka0202_cpu$v_cbctl_acm : 3; unsigned ka0202_cpu$v_cbctl_enb_ci : 1; unsigned ka0202_cpu$v_cbctl_rd : 1; unsigned ka0202_cpu$v_cbctl_qw_2_sel : 1; unsigned ka0202_cpu$v_cbctl_sel_drack : 1; unsigned ka0202_cpu$v_cbctl_fill1 : 17; unsigned ka0202_cpu$v_cbctl_dwp_h : 1; unsigned ka0202_cpu$v_cbctl_cawp_h : 2; unsigned ka0202_cpu$v_cbctl_epc_h : 1; unsigned ka0202_cpu$v_cbctl_frc_sh_h : 1; unsigned ka0202_cpu$v_cbctl_cmder_id_h : 3; unsigned ka0202_cpu$v_cbctl_acm_h : 3; unsigned ka0202_cpu$v_cbctl_enb_ci_h : 1; unsigned ka0202_cpu$v_cbctl_rd_h : 1; unsigned ka0202_cpu$v_cbctl_qw_2_sel_h : 1; unsigned ka0202_cpu$v_cbctl_sel_drack_h : 1; unsigned ka0202_cpu$v_cbctl_fill1_h : 17; } ka0202_cpu$r_cbctl_bits; } ka0202_cpu$r_cbctl_overlay; char ka0202_cpu$b_fill13f [24]; __union { __int64 ka0202_cpu$q_cbe; __struct { unsigned ka0202_cpu$v_cbe_fill1 : 1; unsigned ka0202_cpu$v_cbe_rd_l : 1; unsigned ka0202_cpu$v_cbe_cap_l : 1; unsigned ka0202_cpu$v_cbe_mcap_l : 1; unsigned ka0202_cpu$v_cbe_pe_wrd_l : 1; unsigned ka0202_cpu$v_cbe_mpe_wrd_l : 1; unsigned ka0202_cpu$v_cbe_pe_rd_l : 1; unsigned ka0202_cpu$v_cbe_mpe_rd_l : 1; unsigned ka0202_cpu$v_cbe_ca_pe_lw0 : 1; unsigned ka0202_cpu$v_cbe_ca_pe_lw2 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw0 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw2 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw4 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw6 : 1; unsigned ka0202_cpu$v_cbe_ca_nack : 1; unsigned ka0202_cpu$v_cbe_wr_data_nack : 1; unsigned ka0202_cpu$v_cbe_fill2 : 9; unsigned ka0202_cpu$v_cbe_mcount : 6; unsigned ka0202_cpu$v_cbe_madr_valid : 1; unsigned ka0202_cpu$v_cbe_fill3 : 1; unsigned ka0202_cpu$v_cbe_rd_h : 1; unsigned ka0202_cpu$v_cbe_cap_h : 1; unsigned ka0202_cpu$v_cbe_mcap_h : 1; unsigned ka0202_cpu$v_cbe_pe_wrd_h : 1; unsigned ka0202_cpu$v_cbe_mpe_wrd_h : 1; unsigned ka0202_cpu$v_cbe_pe_rd_h : 1; unsigned ka0202_cpu$v_cbe_mpe_rd_h : 1; unsigned ka0202_cpu$v_cbe_ca_pe_lw1 : 1; unsigned ka0202_cpu$v_cbe_ca_pe_lw3 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw1 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw3 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw5 : 1; unsigned ka0202_cpu$v_cbe_d_pe_lw7 : 1; unsigned ka0202_cpu$v_cbe_undefined : 1; unsigned ka0202_cpu$v_cbe_undefined2 : 1; unsigned ka0202_cpu$v_cbe_fill2_h : 9; unsigned ka0202_cpu$v_cbe_mcount_h : 6; unsigned ka0202_cpu$v_cbe_madr_valid_h : 1; } ka0202_cpu$r_cbe_bits; } ka0202_cpu$r_cbe_overlay; char ka0202_cpu$b_fill13g [24]; __union { __int64 ka0202_cpu$q_cbeal; __struct { unsigned ka0202_cpu$v_cbeal_sbo1 : 2; unsigned ka0202_cpu$v_cbeal_addr_cad_l : 30; unsigned ka0202_cpu$v_cbeal_sbo2 : 2; unsigned ka0202_cpu$v_cbeal_addr_cad_h : 30; } ka0202_cpu$r_cbeal_bits; } ka0202_cpu$r_cbeal_overlay; char ka0202_cpu$b_fill13h [24]; __union { __int64 ka0202_cpu$q_cbeah; __struct { unsigned ka0202_cpu$v_cbeah_sbo1 : 2; unsigned ka0202_cpu$v_cbeah_ea_l : 16; unsigned ka0202_cpu$v_cbeah_t_type_l : 3; unsigned ka0202_cpu$v_cbeah_cmdr_id_l : 3; unsigned ka0202_cpu$v_cbeah_sbo2 : 8; unsigned ka0202_cpu$v_cbeah_sbo3 : 2; unsigned ka0202_cpu$v_cbeah_ea_h : 16; unsigned ka0202_cpu$v_cbeah_t_type_h : 3; unsigned ka0202_cpu$v_cbeah_cmdr_id_h : 3; unsigned ka0202_cpu$v_cbeah_sbo4 : 8; } ka0202_cpu$r_cbeah_bits; } ka0202_cpu$r_cbeah_overlay; char ka0202_cpu$b_fill13 [24]; __union { __int64 ka0202_cpu$q_pmbx; } ka0202_cpu$r_pmbx_overlay; char ka0202_cpu$b_fill13j [24]; __union { __int64 ka0202_cpu$q_ipir; __struct { unsigned ka0202_cpu$v_ipir_undefined : 1; unsigned ka0202_cpu$v_ipir_fill1 : 31; unsigned ka0202_cpu$v_ipir_req_int_cpu : 1; unsigned ka0202_cpu$v_ipir_fill2 : 31; } ka0202_cpu$r_ipir_bits; } ka0202_cpu$r_ipir_overlay; char ka0202_cpu$b_fill13k [24]; __union { __int64 ka0202_cpu$q_sic; __struct { unsigned ka0202_cpu$v_sic_undefined : 1; unsigned ka0202_cpu$v_sic_undefined1 : 1; unsigned ka0202_cpu$v_sic_eic : 1; unsigned ka0202_cpu$v_sic_fill1 : 29; unsigned ka0202_cpu$v_sic_it_iclear : 1; unsigned ka0202_cpu$v_sic_sys_evt_clr : 1; unsigned ka0202_cpu$v_sic_undefined2 : 1; unsigned ka0202_cpu$v_sic_fill2 : 29; } ka0202_cpu$r_sic_bits; } ka0202_cpu$r_sic_overlay; char ka0202_cpu$b_fill13l [24]; __union { __int64 ka0202_cpu$q_adlk; __struct { unsigned ka0202_cpu$v_adlk_la_v_l : 1; unsigned ka0202_cpu$v_adlk_fill1 : 2; unsigned ka0202_cpu$v_adlk_la_l : 29; unsigned ka0202_cpu$v_adlk_la_v_h : 1; unsigned ka0202_cpu$v_adlk_fill2 : 2; unsigned ka0202_cpu$v_adlk_la_h : 29; } ka0202_cpu$r_adlk_bits; } ka0202_cpu$r_adlk_overlay; char ka0202_cpu$b_fill13m [24]; __union { __int64 ka0202_cpu$q_madrl; __struct { unsigned ka0202_cpu$v_madrl_valid_l : 1; unsigned ka0202_cpu$v_madrl_t_type_l : 1; unsigned ka0202_cpu$v_madrl_address_l : 30; unsigned ka0202_cpu$v_madrl_valid_h : 1; unsigned ka0202_cpu$v_madrl_t_type_h : 1; unsigned ka0202_cpu$v_madrl_address_h : 30; } ka0202_cpu$r_madrl_bits; } ka0202_cpu$r_madrl_overlay; char ka0202_cpu$b_fill13n [24]; __union { __int64 ka0202_cpu$q_unimp; } ka0202_cpu$r_unimp_overlay; char ka0202_cpu$b_fill15 [7704]; } KA0202CPU; #if !defined(__VAXC) #define ka0202_cpu$q_bcc ka0202_cpu$r_bcc_overlay.ka0202_cpu$q_bcc #define ka0202_cpu$v_bcc_enb_alloc_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_alloc_l #define ka0202_cpu$v_bcc_frc_fill_sh_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_frc_fill_sh_l #define ka0202_cpu$v_bcc_enb_tpc_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_tpc_l #define ka0202_cpu$v_bcc_fill_wtp_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_fill_wtp_l #define ka0202_cpu$v_bcc_fill_wcp_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_fill_wcp_l #define ka0202_cpu$v_bcc_fill_wdtp_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_fill_wdtp_l #define ka0202_cpu$v_bcc_enb_cei_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_cei_l #define ka0202_cpu$v_bcc_enb_edcc_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_edcc_l #define ka0202_cpu$v_bcc_enb_edc_chk_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_edc_chk_l #define ka0202_cpu$v_bcc_enb_bc_cio_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_bc_cio_l #define ka0202_cpu$v_bcc_dis_blk_w_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_dis_blk_w_l #define ka0202_cpu$v_bcc_enb_bc_init_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_bc_init_l #define ka0202_cpu$v_bcc_for_edcc_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_for_edcc_l #define ka0202_cpu$v_bcc_sh_d_v_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_sh_d_v_l #define ka0202_cpu$v_bcc_edc_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_edc_l #define ka0202_cpu$v_bcc_cache_size_l ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_cache_size_l #define ka0202_cpu$v_bcc_enb_alloc_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_alloc_h #define ka0202_cpu$v_bcc_frc_fill_sh_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_frc_fill_sh_h #define ka0202_cpu$v_bcc_enb_tpc_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_tpc_h #define ka0202_cpu$v_bcc_fill_wtp_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_fill_wtp_h #define ka0202_cpu$v_bcc_fill_wcp_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_fill_wcp_h #define ka0202_cpu$v_bcc_fill_wdtp_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_fill_wdtp_h #define ka0202_cpu$v_bcc_enb_cei_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_cei_h #define ka0202_cpu$v_bcc_enb_edcc_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_edcc_h #define ka0202_cpu$v_bcc_enb_edc_chk_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_edc_chk_h #define ka0202_cpu$v_bcc_enb_bc_cio_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_bc_cio_h #define ka0202_cpu$v_bcc_dis_blk_w_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_dis_blk_w_h #define ka0202_cpu$v_bcc_enb_bc_init_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_enb_bc_init_h #define ka0202_cpu$v_bcc_for_edcc_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_for_edcc_h #define ka0202_cpu$v_bcc_sh_d_v_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_sh_d_v_h #define ka0202_cpu$v_bcc_edc_l_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_edc_l_h #define ka0202_cpu$v_bcc_cache_size_h ka0202_cpu$r_bcc_overlay.ka0202_cpu$r_bcc_bits.ka0202_cpu$v_bcc_cache_size_h #define ka0202_cpu$q_bcce ka0202_cpu$r_bcce_overlay.ka0202_cpu$q_bcce #define ka0202_cpu$v_bcce_mce ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_mce #define ka0202_cpu$v_bcce_ce ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_ce #define ka0202_cpu$v_bcce_cntrl_par ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_cntrl_par #define ka0202_cpu$v_bcce_sh ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_sh #define ka0202_cpu$v_bcce_dirty ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_dirty #define ka0202_cpu$v_bcce_valid ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_valid #define ka0202_cpu$v_bcce_bc_edc_l ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_bc_edc_l #define ka0202_cpu$v_bcce_edc_synd_0 ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_edc_synd_0 #define ka0202_cpu$v_bcce_edc_synd_2 ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_edc_synd_2 #define ka0202_cpu$v_bcce_mce_h ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_mce_h #define ka0202_cpu$v_bcce_ce_h ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_ce_h #define ka0202_cpu$v_bcce_read_only ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_read_only #define ka0202_cpu$v_bcce_bc_edc_h ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_bc_edc_h #define ka0202_cpu$v_bcce_edc_synd_1 ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_edc_synd_1 #define ka0202_cpu$v_bcce_edc_synd_3 ka0202_cpu$r_bcce_overlay.ka0202_cpu$r_bcce_bits.ka0202_cpu$v_bcce_edc_synd_3 #define ka0202_cpu$q_bccea ka0202_cpu$r_bccea_overlay.ka0202_cpu$q_bccea #define ka0202_cpu$v_bccea_bcmap_off ka0202_cpu$r_bccea_overlay.ka0202_cpu$r_bccea_bits.ka0202_cpu$v_bccea_bcmap_off #define ka0202_cpu$v_bccea_tag_par ka0202_cpu$r_bccea_overlay.ka0202_cpu$r_bccea_bits.ka0202_cpu$v_bccea_tag_par #define ka0202_cpu$v_bccea_tag_value ka0202_cpu$r_bccea_overlay.ka0202_cpu$r_bccea_bits.ka0202_cpu$v_bccea_tag_value #define ka0202_cpu$v_bccea_bcmap_off_h ka0202_cpu$r_bccea_overlay.ka0202_cpu$r_bccea_bits.ka0202_cpu$v_bccea_bcmap_off_h #define ka0202_cpu$v_bccea_tag_par_h ka0202_cpu$r_bccea_overlay.ka0202_cpu$r_bccea_bits.ka0202_cpu$v_bccea_tag_par_h #define ka0202_cpu$v_bccea_tag_value_h ka0202_cpu$r_bccea_overlay.ka0202_cpu$r_bccea_bits.ka0202_cpu$v_bccea_tag_value_h #define ka0202_cpu$q_bcue ka0202_cpu$r_bcue_overlay.ka0202_cpu$q_bcue #define ka0202_cpu$v_bcue_mpe ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_mpe #define ka0202_cpu$v_bcue_pe ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_pe #define ka0202_cpu$v_bcue_munce_l ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_munce_l #define ka0202_cpu$v_bcue_unce_l ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_unce_l #define ka0202_cpu$v_bcue_ctrl_par ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_ctrl_par #define ka0202_cpu$v_bcue_sh ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_sh #define ka0202_cpu$v_bcue_dirty ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_dirty #define ka0202_cpu$v_bcue_valid ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_valid #define ka0202_cpu$v_bcue_bc_edc_l ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_bc_edc_l #define ka0202_cpu$v_bcue_edc_synd_0 ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_edc_synd_0 #define ka0202_cpu$v_bcue_edc_synd_2 ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_edc_synd_2 #define ka0202_cpu$v_bcue_pe_h ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_pe_h #define ka0202_cpu$v_bcue_munce_h ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_munce_h #define ka0202_cpu$v_bcue_unce_h ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_unce_h #define ka0202_cpu$v_bcue_bc_edc_h ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_bc_edc_h #define ka0202_cpu$v_bcue_edc_synd_1 ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_edc_synd_1 #define ka0202_cpu$v_bcue_edc_synd_3 ka0202_cpu$r_bcue_overlay.ka0202_cpu$r_bcue_bits.ka0202_cpu$v_bcue_edc_synd_3 #define ka0202_cpu$q_bcuea ka0202_cpu$r_bcuea_overlay.ka0202_cpu$q_bcuea #define ka0202_cpu$v_bcuea_bcmap_off ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_bcmap_off #define ka0202_cpu$v_bcuea_ptp ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_ptp #define ka0202_cpu$v_bcuea_tp ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_tp #define ka0202_cpu$v_bcuea_tv ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_tv #define ka0202_cpu$v_bcuea_bcmap_off_h ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_bcmap_off_h #define ka0202_cpu$v_bcuea_ptp_h ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_ptp_h #define ka0202_cpu$v_bcuea_tp_h ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_tp_h #define ka0202_cpu$v_bcuea_tv_h ka0202_cpu$r_bcuea_overlay.ka0202_cpu$r_bcuea_bits.ka0202_cpu$v_bcuea_tv_h #define ka0202_cpu$q_dter ka0202_cpu$r_dter_overlay.ka0202_cpu$q_dter #define ka0202_cpu$v_mdter_l ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_mdter_l #define ka0202_cpu$v_dter_l ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_l #define ka0202_cpu$v_dter_toff_l ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_toff_l #define ka0202_cpu$v_dter_dup_tag_l ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_dup_tag_l #define ka0202_cpu$v_dter_dtp ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_dtp #define ka0202_cpu$v_mdter_h ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_mdter_h #define ka0202_cpu$v_dter_h ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_h #define ka0202_cpu$v_dter_dt_h ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_dt_h #define ka0202_cpu$v_dter_dup_tag_h ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_dup_tag_h #define ka0202_cpu$v_dter_dtp_h ka0202_cpu$r_dter_overlay.ka0202_cpu$r_dter_bits.ka0202_cpu$v_dter_dtp_h #define ka0202_cpu$q_cbctl ka0202_cpu$r_cbctl_overlay.ka0202_cpu$q_cbctl #define ka0202_cpu$v_cbctl_dwp ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_dwp #define ka0202_cpu$v_cbctl_cawp ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_cawp #define ka0202_cpu$v_cbctl_epc ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_epc #define ka0202_cpu$v_cbctl_frc_sh ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_frc_sh #define ka0202_cpu$v_cbctl_cmder_id ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_cmder_id #define ka0202_cpu$v_cbctl_acm ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_acm #define ka0202_cpu$v_cbctl_enb_ci ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_enb_ci #define ka0202_cpu$v_cbctl_rd ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_rd #define ka0202_cpu$v_cbctl_qw_2_sel ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_qw_2_sel #define ka0202_cpu$v_cbctl_sel_drack ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_sel_drack #define ka0202_cpu$v_cbctl_dwp_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_dwp_h #define ka0202_cpu$v_cbctl_cawp_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_cawp_h #define ka0202_cpu$v_cbctl_epc_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_epc_h #define ka0202_cpu$v_cbctl_frc_sh_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_frc_sh_h #define ka0202_cpu$v_cbctl_cmder_id_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_cmder_id_h #define ka0202_cpu$v_cbctl_acm_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_acm_h #define ka0202_cpu$v_cbctl_enb_ci_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_enb_ci_h #define ka0202_cpu$v_cbctl_rd_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_rd_h #define ka0202_cpu$v_cbctl_qw_2_sel_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_qw_2_sel_h #define ka0202_cpu$v_cbctl_sel_drack_h ka0202_cpu$r_cbctl_overlay.ka0202_cpu$r_cbctl_bits.ka0202_cpu$v_cbctl_sel_drack_h #define ka0202_cpu$q_cbe ka0202_cpu$r_cbe_overlay.ka0202_cpu$q_cbe #define ka0202_cpu$v_cbe_rd_l ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_rd_l #define ka0202_cpu$v_cbe_cap_l ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_cap_l #define ka0202_cpu$v_cbe_mcap_l ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mcap_l #define ka0202_cpu$v_cbe_pe_wrd_l ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_pe_wrd_l #define ka0202_cpu$v_cbe_mpe_wrd_l ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mpe_wrd_l #define ka0202_cpu$v_cbe_pe_rd_l ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_pe_rd_l #define ka0202_cpu$v_cbe_mpe_rd_l ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mpe_rd_l #define ka0202_cpu$v_cbe_ca_pe_lw0 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_ca_pe_lw0 #define ka0202_cpu$v_cbe_ca_pe_lw2 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_ca_pe_lw2 #define ka0202_cpu$v_cbe_d_pe_lw0 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw0 #define ka0202_cpu$v_cbe_d_pe_lw2 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw2 #define ka0202_cpu$v_cbe_d_pe_lw4 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw4 #define ka0202_cpu$v_cbe_d_pe_lw6 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw6 #define ka0202_cpu$v_cbe_ca_nack ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_ca_nack #define ka0202_cpu$v_cbe_wr_data_nack ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_wr_data_nack #define ka0202_cpu$v_cbe_mcount ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mcount #define ka0202_cpu$v_cbe_madr_valid ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_madr_valid #define ka0202_cpu$v_cbe_rd_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_rd_h #define ka0202_cpu$v_cbe_cap_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_cap_h #define ka0202_cpu$v_cbe_mcap_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mcap_h #define ka0202_cpu$v_cbe_pe_wrd_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_pe_wrd_h #define ka0202_cpu$v_cbe_mpe_wrd_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mpe_wrd_h #define ka0202_cpu$v_cbe_pe_rd_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_pe_rd_h #define ka0202_cpu$v_cbe_mpe_rd_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mpe_rd_h #define ka0202_cpu$v_cbe_ca_pe_lw1 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_ca_pe_lw1 #define ka0202_cpu$v_cbe_ca_pe_lw3 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_ca_pe_lw3 #define ka0202_cpu$v_cbe_d_pe_lw1 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw1 #define ka0202_cpu$v_cbe_d_pe_lw3 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw3 #define ka0202_cpu$v_cbe_d_pe_lw5 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw5 #define ka0202_cpu$v_cbe_d_pe_lw7 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_d_pe_lw7 #define ka0202_cpu$v_cbe_undefined ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_undefined #define ka0202_cpu$v_cbe_undefined2 ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_undefined2 #define ka0202_cpu$v_cbe_mcount_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_mcount_h #define ka0202_cpu$v_cbe_madr_valid_h ka0202_cpu$r_cbe_overlay.ka0202_cpu$r_cbe_bits.ka0202_cpu$v_cbe_madr_valid_h #define ka0202_cpu$q_cbeal ka0202_cpu$r_cbeal_overlay.ka0202_cpu$q_cbeal #define ka0202_cpu$v_cbeal_sbo1 ka0202_cpu$r_cbeal_overlay.ka0202_cpu$r_cbeal_bits.ka0202_cpu$v_cbeal_sbo1 #define ka0202_cpu$v_cbeal_addr_cad_l ka0202_cpu$r_cbeal_overlay.ka0202_cpu$r_cbeal_bits.ka0202_cpu$v_cbeal_addr_cad_l #define ka0202_cpu$v_cbeal_sbo2 ka0202_cpu$r_cbeal_overlay.ka0202_cpu$r_cbeal_bits.ka0202_cpu$v_cbeal_sbo2 #define ka0202_cpu$v_cbeal_addr_cad_h ka0202_cpu$r_cbeal_overlay.ka0202_cpu$r_cbeal_bits.ka0202_cpu$v_cbeal_addr_cad_h #define ka0202_cpu$q_cbeah ka0202_cpu$r_cbeah_overlay.ka0202_cpu$q_cbeah #define ka0202_cpu$v_cbeah_sbo1 ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_sbo1 #define ka0202_cpu$v_cbeah_ea_l ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_ea_l #define ka0202_cpu$v_cbeah_t_type_l ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_t_type_l #define ka0202_cpu$v_cbeah_cmdr_id_l ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_cmdr_id_l #define ka0202_cpu$v_cbeah_sbo2 ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_sbo2 #define ka0202_cpu$v_cbeah_sbo3 ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_sbo3 #define ka0202_cpu$v_cbeah_ea_h ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_ea_h #define ka0202_cpu$v_cbeah_t_type_h ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_t_type_h #define ka0202_cpu$v_cbeah_cmdr_id_h ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_cmdr_id_h #define ka0202_cpu$v_cbeah_sbo4 ka0202_cpu$r_cbeah_overlay.ka0202_cpu$r_cbeah_bits.ka0202_cpu$v_cbeah_sbo4 #define ka0202_cpu$q_pmbx ka0202_cpu$r_pmbx_overlay.ka0202_cpu$q_pmbx #define ka0202_cpu$q_ipir ka0202_cpu$r_ipir_overlay.ka0202_cpu$q_ipir #define ka0202_cpu$v_ipir_undefined ka0202_cpu$r_ipir_overlay.ka0202_cpu$r_ipir_bits.ka0202_cpu$v_ipir_undefined #define ka0202_cpu$v_ipir_req_int_cpu ka0202_cpu$r_ipir_overlay.ka0202_cpu$r_ipir_bits.ka0202_cpu$v_ipir_req_int_cpu #define ka0202_cpu$q_sic ka0202_cpu$r_sic_overlay.ka0202_cpu$q_sic #define ka0202_cpu$v_sic_undefined ka0202_cpu$r_sic_overlay.ka0202_cpu$r_sic_bits.ka0202_cpu$v_sic_undefined #define ka0202_cpu$v_sic_undefined1 ka0202_cpu$r_sic_overlay.ka0202_cpu$r_sic_bits.ka0202_cpu$v_sic_undefined1 #define ka0202_cpu$v_sic_eic ka0202_cpu$r_sic_overlay.ka0202_cpu$r_sic_bits.ka0202_cpu$v_sic_eic #define ka0202_cpu$v_sic_it_iclear ka0202_cpu$r_sic_overlay.ka0202_cpu$r_sic_bits.ka0202_cpu$v_sic_it_iclear #define ka0202_cpu$v_sic_sys_evt_clr ka0202_cpu$r_sic_overlay.ka0202_cpu$r_sic_bits.ka0202_cpu$v_sic_sys_evt_clr #define ka0202_cpu$v_sic_undefined2 ka0202_cpu$r_sic_overlay.ka0202_cpu$r_sic_bits.ka0202_cpu$v_sic_undefined2 #define ka0202_cpu$q_adlk ka0202_cpu$r_adlk_overlay.ka0202_cpu$q_adlk #define ka0202_cpu$v_adlk_la_v_l ka0202_cpu$r_adlk_overlay.ka0202_cpu$r_adlk_bits.ka0202_cpu$v_adlk_la_v_l #define ka0202_cpu$v_adlk_la_l ka0202_cpu$r_adlk_overlay.ka0202_cpu$r_adlk_bits.ka0202_cpu$v_adlk_la_l #define ka0202_cpu$v_adlk_la_v_h ka0202_cpu$r_adlk_overlay.ka0202_cpu$r_adlk_bits.ka0202_cpu$v_adlk_la_v_h #define ka0202_cpu$v_adlk_la_h ka0202_cpu$r_adlk_overlay.ka0202_cpu$r_adlk_bits.ka0202_cpu$v_adlk_la_h #define ka0202_cpu$q_madrl ka0202_cpu$r_madrl_overlay.ka0202_cpu$q_madrl #define ka0202_cpu$v_madrl_valid_l ka0202_cpu$r_madrl_overlay.ka0202_cpu$r_madrl_bits.ka0202_cpu$v_madrl_valid_l #define ka0202_cpu$v_madrl_t_type_l ka0202_cpu$r_madrl_overlay.ka0202_cpu$r_madrl_bits.ka0202_cpu$v_madrl_t_type_l #define ka0202_cpu$v_madrl_address_l ka0202_cpu$r_madrl_overlay.ka0202_cpu$r_madrl_bits.ka0202_cpu$v_madrl_address_l #define ka0202_cpu$v_madrl_valid_h ka0202_cpu$r_madrl_overlay.ka0202_cpu$r_madrl_bits.ka0202_cpu$v_madrl_valid_h #define ka0202_cpu$v_madrl_t_type_h ka0202_cpu$r_madrl_overlay.ka0202_cpu$r_madrl_bits.ka0202_cpu$v_madrl_t_type_h #define ka0202_cpu$v_madrl_address_h ka0202_cpu$r_madrl_overlay.ka0202_cpu$r_madrl_bits.ka0202_cpu$v_madrl_address_h #define ka0202_cpu$q_unimp ka0202_cpu$r_unimp_overlay.ka0202_cpu$q_unimp #endif /* #if !defined(__VAXC) */ #define KA0202_CMM$M_CME_ES1 0x1 #define KA0202_CMM$M_CME_SE1 0x2 #define KA0202_CMM$M_CME_CA_PE1 0x4 #define KA0202_CMM$M_CME_MCA_PE1 0x8 #define KA0202_CMM$M_CME_WD_PE1 0x10 #define KA0202_CMM$M_CME_MWD_PE1 0x20 #define KA0202_CMM$M_CME_CA_PE_LW0 0x100 #define KA0202_CMM$M_CME_CA_PE_LW2 0x200 #define KA0202_CMM$M_CME_D_PE_LW0 0x400 #define KA0202_CMM$M_CME_D_PE_LW2 0x800 #define KA0202_CMM$M_CME_D_PE_LW4 0x1000 #define KA0202_CMM$M_CME_D_PE_LW6 0x2000 #define KA0202_CMM$M_CME_EUE1 0x10000 #define KA0202_CMM$M_CME_MEUE1 0x20000 #define KA0202_CMM$M_CME_ECE1 0x40000 #define KA0202_CMM$M_CME_MECE1 0x80000 #define KA0202_CMM$M_CME_ES2 0x100000000 #define KA0202_CMM$M_CME_SE2 0x200000000 #define KA0202_CMM$M_CME_CA_PE2 0x400000000 #define KA0202_CMM$M_CME_MCA_PE2 0x800000000 #define KA0202_CMM$M_CME_WD_PE2 0x1000000000 #define KA0202_CMM$M_CME_MWD_PE2 0x2000000000 #define KA0202_CMM$M_CME_CA_PE_LW1 0x10000000000 #define KA0202_CMM$M_CME_CA_PE_LW3 0x20000000000 #define KA0202_CMM$M_CME_D_PE_LW1 0x40000000000 #define KA0202_CMM$M_CME_D_PE_LW3 0x80000000000 #define KA0202_CMM$M_CME_D_PE_LW5 0x100000000000 #define KA0202_CMM$M_CME_D_PE_LW7 0x200000000000 #define KA0202_CMM$M_CME_EUE2 0x1000000000000 #define KA0202_CMM$M_CME_MEUE2 0x2000000000000 #define KA0202_CMM$M_CME_ECE2 0x4000000000000 #define KA0202_CMM$M_CME_MECE2 0x8000000000000 #define KA0202_CMM$M_CNFG_MOD_ID1 0x3 #define KA0202_CMM$M_CNFG_MOD_SIZE1 0x70 #define KA0202_CMM$M_CNFG_EMD1 0x100 #define KA0202_CMM$M_CNFG_INTR_MODE1 0xC0000 #define KA0202_CMM$M_CNFG_INTR_UNIT1 0x300000 #define KA0202_CMM$M_CNFG_BASE_ADDR1 0x7FC00000 #define KA0202_CMM$M_CNFG_MEM_ENB1 0x80000000 #define KA0202_CMM$M_CNFG_MOD_ID2 0x300000000 #define KA0202_CMM$M_CNFG_MOD_SIZE2 0x7000000000 #define KA0202_CMM$M_CNFG_EMD2 0x10000000000 #define KA0202_CMM$M_CNFG_INTR_MODE2 0xC000000000000 #define KA0202_CMM$M_CNFG_INTR_UNIT2 0x30000000000000 #define KA0202_CMM$M_CNFG_BASE_ADDR2 0x7FC0000000000000 #define KA0202_CMM$M_CNFG_MEM_ENB2 0x8000000000000000 #define KA0202_CMM$M_EDC1_READ_CBITS1 0xFFF #define KA0202_CMM$M_EDC1_WR_CBITS1 0xFFF0000 #define KA0202_CMM$M_EDC1_READ_CBITS2 0xFFF00000000 #define KA0202_CMM$M_EDC1_WR_CBITS2 0xFFF000000000000 #define KA0202_CMM$M_EDC2_SYNDROME1 0xFFF #define KA0202_CMM$M_EDC2_SYNDROME2 0xFFF00000000 #define KA0202_CMM$M_EDCTL_SRB1 0xFFF #define KA0202_CMM$M_EDCTL_USCB1 0x1000 #define KA0202_CMM$M_EDCTL_USWCB1 0x2000 #define KA0202_CMM$M_EDCTL_DIPC1 0x4000 #define KA0202_CMM$M_EDCTL_ENB_ES1 0x8000 #define KA0202_CMM$M_EDCTL_SWCB1 0xFFF0000 #define KA0202_CMM$M_EDCTL_CRDP1 0x10000000 #define KA0202_CMM$M_EDCTL_ENB_CRDR1 0x20000000 #define KA0202_CMM$M_EDCTL_DEDCCORR1 0x40000000 #define KA0202_CMM$M_EDCTL_DEDCREPORT1 0x80000000 #define KA0202_CMM$M_EDCTL_SRB2 0xFFF00000000 #define KA0202_CMM$M_EDCTL_USCB2 0x100000000000 #define KA0202_CMM$M_EDCTL_USWCB2 0x200000000000 #define KA0202_CMM$M_EDCTL_DIPC2 0x400000000000 #define KA0202_CMM$M_EDCTL_ENB_ES2 0x800000000000 #define KA0202_CMM$M_EDCTL_SWCB2 0xFFF000000000000 #define KA0202_CMM$M_EDCTL_CRDP2 0x1000000000000000 #define KA0202_CMM$M_EDCTL_ENB_CRDR2 0x2000000000000000 #define KA0202_CMM$M_EDCTL_DEDCCORR2 0x4000000000000000 #define KA0202_CMM$M_EDCTL_DEDCREPORT2 0x8000000000000000 #define KA0202_CMM$M_SBCTRL_DSD1 0x1 #define KA0202_CMM$M_SBCTRL_DSH1 0x2 #define KA0202_CMM$M_SBCTRL_DSF1 0x4 #define KA0202_CMM$M_SBCTRL_DSI1 0x8 #define KA0202_CMM$M_SBCTRL_ERWD1 0x10 #define KA0202_CMM$M_SBCTRL_FHB1 0x20 #define KA0202_CMM$M_SBCTRL_DSD2 0x100000000 #define KA0202_CMM$M_SBCTRL_DSH2 0x200000000 #define KA0202_CMM$M_SBCTRL_DSF2 0x400000000 #define KA0202_CMM$M_SBCTRL_DSI2 0x800000000 #define KA0202_CMM$M_SBCTRL_ERWD2 0x1000000000 #define KA0202_CMM$M_SBCTRL_FHB2 0x2000000000 #define KA0202_CMM$M_RCTRL_RC1 0xFF #define KA0202_CMM$M_RCTRL_REF_ENB 0x100 #define KA0202_CMM$M_RCTRL_RC2 0xFF00000000 #define KA0202_CMM$M_RCTRL_REF_ENB2 0x10000000000 #define KA0202_CMM$M_CRDCTL_SM1 0xFFF #define KA0202_CMM$M_CRDCTL_BS1 0x3000 #define KA0202_CMM$M_CRDCTL_CFE1 0x4000 #define KA0202_CMM$M_CRDCTL_SM2 0xFFF00000000 #define KA0202_CMM$M_CRDCTL_BS2 0x300000000000 #define KA0202_CMM$M_CRDCTL_CFE2 0x400000000000 #define KA0202_CMM$K_LENGTH 8192 #define KA0202_CMM$S_CMMDEF 8192 /* Old size name, synonym for KA0202_CMM$S_KA0202CMM */ typedef struct _ka0202cmm { __union { __int64 ka0202_cmm$q_cme; __struct { unsigned ka0202_cmm$v_cme_es1 : 1; unsigned ka0202_cmm$v_cme_se1 : 1; unsigned ka0202_cmm$v_cme_ca_pe1 : 1; unsigned ka0202_cmm$v_cme_mca_pe1 : 1; unsigned ka0202_cmm$v_cme_wd_pe1 : 1; unsigned ka0202_cmm$v_cme_mwd_pe1 : 1; unsigned ka0202_cmm$v_cme_fill1 : 2; unsigned ka0202_cmm$v_cme_ca_pe_lw0 : 1; unsigned ka0202_cmm$v_cme_ca_pe_lw2 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw0 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw2 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw4 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw6 : 1; unsigned ka0202_cmm$v_cme_fill2 : 2; unsigned ka0202_cmm$v_cme_eue1 : 1; unsigned ka0202_cmm$v_cme_meue1 : 1; unsigned ka0202_cmm$v_cme_ece1 : 1; unsigned ka0202_cmm$v_cme_mece1 : 1; unsigned ka0202_cmm$v_cme_fill3 : 12; unsigned ka0202_cmm$v_cme_es2 : 1; unsigned ka0202_cmm$v_cme_se2 : 1; unsigned ka0202_cmm$v_cme_ca_pe2 : 1; unsigned ka0202_cmm$v_cme_mca_pe2 : 1; unsigned ka0202_cmm$v_cme_wd_pe2 : 1; unsigned ka0202_cmm$v_cme_mwd_pe2 : 1; unsigned ka0202_cmm$v_cme_fill4 : 2; unsigned ka0202_cmm$v_cme_ca_pe_lw1 : 1; unsigned ka0202_cmm$v_cme_ca_pe_lw3 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw1 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw3 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw5 : 1; unsigned ka0202_cmm$v_cme_d_pe_lw7 : 1; unsigned ka0202_cmm$v_cme_fill5 : 2; unsigned ka0202_cmm$v_cme_eue2 : 1; unsigned ka0202_cmm$v_cme_meue2 : 1; unsigned ka0202_cmm$v_cme_ece2 : 1; unsigned ka0202_cmm$v_cme_mece2 : 1; unsigned ka0202_cmm$v_cme_fill6 : 12; } ka0202_cmm$r_cme_bits; } ka0202_cmm$r_cme_overlay; char ka0202_cmm$b_fill_1 [24]; __union { __int64 ka0202_cmm$q_trap1; __struct { unsigned int ka0202_cmm$l_trap1_l; unsigned int ka0202_cmm$l_trap1_h; } ka0202_cmm$r_trap1_bits; } ka0202_cmm$r_trap1_overlay; char ka0202_cmm$b_fill_2 [24]; __union { __int64 ka0202_cmm$q_trap2; __struct { unsigned int ka0202_cmm$l_trap2_l; unsigned int ka0202_cmm$l_trap2_h; } ka0202_cmm$r_trap2_bits; } ka0202_cmm$r_trap2_overlay; char ka0202_cmm$b_fill_3 [24]; __union { __int64 ka0202_cmm$q_cnfg; __struct { unsigned ka0202_cmm$v_cnfg_mod_id1 : 2; unsigned ka0202_cmm$v_cnfg_fill1 : 2; unsigned ka0202_cmm$v_cnfg_mod_size1 : 3; unsigned ka0202_cmm$v_cnfg_fill2 : 1; unsigned ka0202_cmm$v_cnfg_emd1 : 1; unsigned ka0202_cmm$v_cnfg_fill3 : 9; unsigned ka0202_cmm$v_cnfg_intr_mode1 : 2; unsigned ka0202_cmm$v_cnfg_intr_unit1 : 2; unsigned ka0202_cmm$v_cnfg_base_addr1 : 9; unsigned ka0202_cmm$v_cnfg_mem_enb1 : 1; unsigned ka0202_cmm$v_cnfg_mod_id2 : 2; unsigned ka0202_cmm$v_cnfg_fill4 : 2; unsigned ka0202_cmm$v_cnfg_mod_size2 : 3; unsigned ka0202_cmm$v_cnfg_fill5 : 1; unsigned ka0202_cmm$v_cnfg_emd2 : 1; unsigned ka0202_cmm$v_cnfg_fill6 : 9; unsigned ka0202_cmm$v_cnfg_intr_mode2 : 2; unsigned ka0202_cmm$v_cnfg_intr_unit2 : 2; unsigned ka0202_cmm$v_cnfg_base_addr2 : 9; unsigned ka0202_cmm$v_cnfg_mem_enb2 : 1; } ka0202_cmm$r_cnfg_bits; } ka0202_cmm$r_cnfg_overlay; char ka0202_cmm$b_fill_4 [24]; __union { __int64 ka0202_cmm$q_edc1; __struct { unsigned ka0202_cmm$v_edc1_read_cbits1 : 12; unsigned ka0202_cmm$v_edc1_fill1 : 4; unsigned ka0202_cmm$v_edc1_wr_cbits1 : 12; unsigned ka0202_cmm$v_edc1_fill2 : 4; unsigned ka0202_cmm$v_edc1_read_cbits2 : 12; unsigned ka0202_cmm$v_edc1_fill3 : 4; unsigned ka0202_cmm$v_edc1_wr_cbits2 : 12; unsigned ka0202_cmm$v_edc1_fill4 : 4; } ka0202_cmm$r_edc1_bits; } ka0202_cmm$r_edc1_overlay; char ka0202_cmm$b_fill_5 [24]; __union { __int64 ka0202_cmm$q_edc2; __struct { unsigned ka0202_cmm$v_edc2_syndrome1 : 12; unsigned ka0202_cmm$v_edc2_fill1 : 20; unsigned ka0202_cmm$v_edc2_syndrome2 : 12; unsigned ka0202_cmm$v_edc2_fill2 : 20; } ka0202_cmm$r_edc2_bits; } ka0202_cmm$r_edc2_overlay; char ka0202_cmm$b_fill_6 [24]; __union { __int64 ka0202_cmm$q_edctl; __struct { unsigned ka0202_cmm$v_edctl_srb1 : 12; unsigned ka0202_cmm$v_edctl_uscb1 : 1; unsigned ka0202_cmm$v_edctl_uswcb1 : 1; unsigned ka0202_cmm$v_edctl_dipc1 : 1; unsigned ka0202_cmm$v_edctl_enb_es1 : 1; unsigned ka0202_cmm$v_edctl_swcb1 : 12; unsigned ka0202_cmm$v_edctl_crdp1 : 1; unsigned ka0202_cmm$v_edctl_enb_crdr1 : 1; unsigned ka0202_cmm$v_edctl_dedccorr1 : 1; unsigned ka0202_cmm$v_edctl_dedcreport1 : 1; unsigned ka0202_cmm$v_edctl_srb2 : 12; unsigned ka0202_cmm$v_edctl_uscb2 : 1; unsigned ka0202_cmm$v_edctl_uswcb2 : 1; unsigned ka0202_cmm$v_edctl_dipc2 : 1; unsigned ka0202_cmm$v_edctl_enb_es2 : 1; unsigned ka0202_cmm$v_edctl_swcb2 : 12; unsigned ka0202_cmm$v_edctl_crdp2 : 1; unsigned ka0202_cmm$v_edctl_enb_crdr2 : 1; unsigned ka0202_cmm$v_edctl_dedccorr2 : 1; unsigned ka0202_cmm$v_edctl_dedcreport2 : 1; } ka0202_cmm$r_edctl_bits; } ka0202_cmm$r_edctl_overlay; char ka0202_cmm$b_fill_7 [24]; __union { __int64 ka0202_cmm$q_sbctrl; __struct { unsigned ka0202_cmm$v_sbctrl_dsd1 : 1; unsigned ka0202_cmm$v_sbctrl_dsh1 : 1; unsigned ka0202_cmm$v_sbctrl_dsf1 : 1; unsigned ka0202_cmm$v_sbctrl_dsi1 : 1; unsigned ka0202_cmm$v_sbctrl_erwd1 : 1; unsigned ka0202_cmm$v_sbctrl_fhb1 : 1; unsigned ka0202_cmm$v_sbctrl_fill1 : 26; unsigned ka0202_cmm$v_sbctrl_dsd2 : 1; unsigned ka0202_cmm$v_sbctrl_dsh2 : 1; unsigned ka0202_cmm$v_sbctrl_dsf2 : 1; unsigned ka0202_cmm$v_sbctrl_dsi2 : 1; unsigned ka0202_cmm$v_sbctrl_erwd2 : 1; unsigned ka0202_cmm$v_sbctrl_fhb2 : 1; unsigned ka0202_cmm$v_sbctrl_fill2 : 26; } ka0202_cmm$r_sbctrl_bits; } ka0202_cmm$r_sbctrl_overlay; char ka0202_cmm$b_fill_8 [24]; __union { __int64 ka0202_cmm$q_rctrl; __struct { unsigned ka0202_cmm$v_rctrl_rc1 : 8; unsigned ka0202_cmm$v_rctrl_ref_enb : 1; unsigned ka0202_cmm$v_rctrl_fill1 : 23; unsigned ka0202_cmm$v_rctrl_rc2 : 8; unsigned ka0202_cmm$v_rctrl_ref_enb2 : 1; unsigned ka0202_cmm$v_rctrl_fill2 : 23; } ka0202_cmm$r_rctrl_bits; } ka0202_cmm$r_csr8_overlay; char ka0202_cmm$b_fill_9 [24]; __union { __int64 ka0202_cmm$q_crdctl; __struct { unsigned ka0202_cmm$v_crdctl_sm1 : 12; unsigned ka0202_cmm$v_crdctl_bs1 : 2; unsigned ka0202_cmm$v_crdctl_cfe1 : 1; unsigned ka0202_cmm$v_crdctl_fill1 : 17; unsigned ka0202_cmm$v_crdctl_sm2 : 12; unsigned ka0202_cmm$v_crdctl_bs2 : 2; unsigned ka0202_cmm$v_crdctl_cfe2 : 1; unsigned ka0202_cmm$v_crdctl_fill2 : 17; } ka0202_cmm$r_crdctl_bits; } ka0202_cmm$r_crdctl_overlay; char ka0202_cmm$b_fill_10 [24]; __union { __int64 ka0202_cmm$q_csr10; } ka0202_cmm$r_csr10_overlay; char ka0202_cmm$b_fill_11 [24]; __union { __int64 ka0202_cmm$q_csr11; } ka0202_cmm$r_csr11_overlay; char ka0202_cmm$b_fill_12 [24]; __union { __int64 ka0202_cmm$q_csr12; } ka0202_cmm$r_csr12_overlay; char ka0202_cmm$b_fill_13 [24]; __union { __int64 ka0202_cmm$q_csr13; } ka0202_cmm$r_csr13_overlay; char ka0202_cmm$b_fill_14 [24]; __union { __int64 ka0202_cmm$q_csr14; } ka0202_cmm$r_csr14_overlay; char ka0202_cmm$b_fill_15 [24]; __union { __int64 ka0202_cmm$q_csr15; } ka0202_cmm$r_csr15_overlay; char ka0202_cmm$b_fill17 [7704]; } KA0202CMM; #if !defined(__VAXC) #define ka0202_cmm$q_cme ka0202_cmm$r_cme_overlay.ka0202_cmm$q_cme #define ka0202_cmm$v_cme_es1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_es1 #define ka0202_cmm$v_cme_se1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_se1 #define ka0202_cmm$v_cme_ca_pe1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ca_pe1 #define ka0202_cmm$v_cme_mca_pe1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_mca_pe1 #define ka0202_cmm$v_cme_wd_pe1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_wd_pe1 #define ka0202_cmm$v_cme_mwd_pe1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_mwd_pe1 #define ka0202_cmm$v_cme_ca_pe_lw0 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ca_pe_lw0 #define ka0202_cmm$v_cme_ca_pe_lw2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ca_pe_lw2 #define ka0202_cmm$v_cme_d_pe_lw0 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw0 #define ka0202_cmm$v_cme_d_pe_lw2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw2 #define ka0202_cmm$v_cme_d_pe_lw4 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw4 #define ka0202_cmm$v_cme_d_pe_lw6 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw6 #define ka0202_cmm$v_cme_eue1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_eue1 #define ka0202_cmm$v_cme_meue1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_meue1 #define ka0202_cmm$v_cme_ece1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ece1 #define ka0202_cmm$v_cme_mece1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_mece1 #define ka0202_cmm$v_cme_es2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_es2 #define ka0202_cmm$v_cme_se2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_se2 #define ka0202_cmm$v_cme_ca_pe2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ca_pe2 #define ka0202_cmm$v_cme_mca_pe2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_mca_pe2 #define ka0202_cmm$v_cme_wd_pe2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_wd_pe2 #define ka0202_cmm$v_cme_mwd_pe2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_mwd_pe2 #define ka0202_cmm$v_cme_ca_pe_lw1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ca_pe_lw1 #define ka0202_cmm$v_cme_ca_pe_lw3 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ca_pe_lw3 #define ka0202_cmm$v_cme_d_pe_lw1 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw1 #define ka0202_cmm$v_cme_d_pe_lw3 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw3 #define ka0202_cmm$v_cme_d_pe_lw5 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw5 #define ka0202_cmm$v_cme_d_pe_lw7 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_d_pe_lw7 #define ka0202_cmm$v_cme_eue2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_eue2 #define ka0202_cmm$v_cme_meue2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_meue2 #define ka0202_cmm$v_cme_ece2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_ece2 #define ka0202_cmm$v_cme_mece2 ka0202_cmm$r_cme_overlay.ka0202_cmm$r_cme_bits.ka0202_cmm$v_cme_mece2 #define ka0202_cmm$q_trap1 ka0202_cmm$r_trap1_overlay.ka0202_cmm$q_trap1 #define ka0202_cmm$l_trap1_l ka0202_cmm$r_trap1_overlay.ka0202_cmm$r_trap1_bits.ka0202_cmm$l_trap1_l #define ka0202_cmm$l_trap1_h ka0202_cmm$r_trap1_overlay.ka0202_cmm$r_trap1_bits.ka0202_cmm$l_trap1_h #define ka0202_cmm$q_trap2 ka0202_cmm$r_trap2_overlay.ka0202_cmm$q_trap2 #define ka0202_cmm$l_trap2_l ka0202_cmm$r_trap2_overlay.ka0202_cmm$r_trap2_bits.ka0202_cmm$l_trap2_l #define ka0202_cmm$l_trap2_h ka0202_cmm$r_trap2_overlay.ka0202_cmm$r_trap2_bits.ka0202_cmm$l_trap2_h #define ka0202_cmm$q_cnfg ka0202_cmm$r_cnfg_overlay.ka0202_cmm$q_cnfg #define ka0202_cmm$v_cnfg_mod_id1 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_mod_id1 #define ka0202_cmm$v_cnfg_mod_size1 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_mod_size1 #define ka0202_cmm$v_cnfg_emd1 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_emd1 #define ka0202_cmm$v_cnfg_intr_mode1 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_intr_mode1 #define ka0202_cmm$v_cnfg_intr_unit1 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_intr_unit1 #define ka0202_cmm$v_cnfg_base_addr1 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_base_addr1 #define ka0202_cmm$v_cnfg_mem_enb1 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_mem_enb1 #define ka0202_cmm$v_cnfg_mod_id2 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_mod_id2 #define ka0202_cmm$v_cnfg_mod_size2 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_mod_size2 #define ka0202_cmm$v_cnfg_emd2 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_emd2 #define ka0202_cmm$v_cnfg_intr_mode2 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_intr_mode2 #define ka0202_cmm$v_cnfg_intr_unit2 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_intr_unit2 #define ka0202_cmm$v_cnfg_base_addr2 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_base_addr2 #define ka0202_cmm$v_cnfg_mem_enb2 ka0202_cmm$r_cnfg_overlay.ka0202_cmm$r_cnfg_bits.ka0202_cmm$v_cnfg_mem_enb2 #define ka0202_cmm$q_edc1 ka0202_cmm$r_edc1_overlay.ka0202_cmm$q_edc1 #define ka0202_cmm$v_edc1_read_cbits1 ka0202_cmm$r_edc1_overlay.ka0202_cmm$r_edc1_bits.ka0202_cmm$v_edc1_read_cbits1 #define ka0202_cmm$v_edc1_wr_cbits1 ka0202_cmm$r_edc1_overlay.ka0202_cmm$r_edc1_bits.ka0202_cmm$v_edc1_wr_cbits1 #define ka0202_cmm$v_edc1_read_cbits2 ka0202_cmm$r_edc1_overlay.ka0202_cmm$r_edc1_bits.ka0202_cmm$v_edc1_read_cbits2 #define ka0202_cmm$v_edc1_wr_cbits2 ka0202_cmm$r_edc1_overlay.ka0202_cmm$r_edc1_bits.ka0202_cmm$v_edc1_wr_cbits2 #define ka0202_cmm$q_edc2 ka0202_cmm$r_edc2_overlay.ka0202_cmm$q_edc2 #define ka0202_cmm$v_edc2_syndrome1 ka0202_cmm$r_edc2_overlay.ka0202_cmm$r_edc2_bits.ka0202_cmm$v_edc2_syndrome1 #define ka0202_cmm$v_edc2_syndrome2 ka0202_cmm$r_edc2_overlay.ka0202_cmm$r_edc2_bits.ka0202_cmm$v_edc2_syndrome2 #define ka0202_cmm$q_edctl ka0202_cmm$r_edctl_overlay.ka0202_cmm$q_edctl #define ka0202_cmm$v_edctl_srb1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_srb1 #define ka0202_cmm$v_edctl_uscb1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_uscb1 #define ka0202_cmm$v_edctl_uswcb1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_uswcb1 #define ka0202_cmm$v_edctl_dipc1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_dipc1 #define ka0202_cmm$v_edctl_enb_es1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_enb_es1 #define ka0202_cmm$v_edctl_swcb1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_swcb1 #define ka0202_cmm$v_edctl_crdp1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_crdp1 #define ka0202_cmm$v_edctl_enb_crdr1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_enb_crdr1 #define ka0202_cmm$v_edctl_dedccorr1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_dedccorr1 #define ka0202_cmm$v_edctl_dedcreport1 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_dedcreport1 #define ka0202_cmm$v_edctl_srb2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_srb2 #define ka0202_cmm$v_edctl_uscb2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_uscb2 #define ka0202_cmm$v_edctl_uswcb2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_uswcb2 #define ka0202_cmm$v_edctl_dipc2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_dipc2 #define ka0202_cmm$v_edctl_enb_es2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_enb_es2 #define ka0202_cmm$v_edctl_swcb2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_swcb2 #define ka0202_cmm$v_edctl_crdp2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_crdp2 #define ka0202_cmm$v_edctl_enb_crdr2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_enb_crdr2 #define ka0202_cmm$v_edctl_dedccorr2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_dedccorr2 #define ka0202_cmm$v_edctl_dedcreport2 ka0202_cmm$r_edctl_overlay.ka0202_cmm$r_edctl_bits.ka0202_cmm$v_edctl_dedcreport2 #define ka0202_cmm$q_sbctrl ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$q_sbctrl #define ka0202_cmm$v_sbctrl_dsd1 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsd1 #define ka0202_cmm$v_sbctrl_dsh1 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsh1 #define ka0202_cmm$v_sbctrl_dsf1 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsf1 #define ka0202_cmm$v_sbctrl_dsi1 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsi1 #define ka0202_cmm$v_sbctrl_erwd1 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_erwd1 #define ka0202_cmm$v_sbctrl_fhb1 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_fhb1 #define ka0202_cmm$v_sbctrl_dsd2 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsd2 #define ka0202_cmm$v_sbctrl_dsh2 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsh2 #define ka0202_cmm$v_sbctrl_dsf2 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsf2 #define ka0202_cmm$v_sbctrl_dsi2 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_dsi2 #define ka0202_cmm$v_sbctrl_erwd2 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_erwd2 #define ka0202_cmm$v_sbctrl_fhb2 ka0202_cmm$r_sbctrl_overlay.ka0202_cmm$r_sbctrl_bits.ka0202_cmm$v_sbctrl_fhb2 #define ka0202_cmm$q_rctrl ka0202_cmm$r_csr8_overlay.ka0202_cmm$q_rctrl #define ka0202_cmm$v_rctrl_rc1 ka0202_cmm$r_csr8_overlay.ka0202_cmm$r_rctrl_bits.ka0202_cmm$v_rctrl_rc1 #define ka0202_cmm$v_rctrl_ref_enb ka0202_cmm$r_csr8_overlay.ka0202_cmm$r_rctrl_bits.ka0202_cmm$v_rctrl_ref_enb #define ka0202_cmm$v_rctrl_rc2 ka0202_cmm$r_csr8_overlay.ka0202_cmm$r_rctrl_bits.ka0202_cmm$v_rctrl_rc2 #define ka0202_cmm$v_rctrl_ref_enb2 ka0202_cmm$r_csr8_overlay.ka0202_cmm$r_rctrl_bits.ka0202_cmm$v_rctrl_ref_enb2 #define ka0202_cmm$q_crdctl ka0202_cmm$r_crdctl_overlay.ka0202_cmm$q_crdctl #define ka0202_cmm$v_crdctl_sm1 ka0202_cmm$r_crdctl_overlay.ka0202_cmm$r_crdctl_bits.ka0202_cmm$v_crdctl_sm1 #define ka0202_cmm$v_crdctl_bs1 ka0202_cmm$r_crdctl_overlay.ka0202_cmm$r_crdctl_bits.ka0202_cmm$v_crdctl_bs1 #define ka0202_cmm$v_crdctl_cfe1 ka0202_cmm$r_crdctl_overlay.ka0202_cmm$r_crdctl_bits.ka0202_cmm$v_crdctl_cfe1 #define ka0202_cmm$v_crdctl_sm2 ka0202_cmm$r_crdctl_overlay.ka0202_cmm$r_crdctl_bits.ka0202_cmm$v_crdctl_sm2 #define ka0202_cmm$v_crdctl_bs2 ka0202_cmm$r_crdctl_overlay.ka0202_cmm$r_crdctl_bits.ka0202_cmm$v_crdctl_bs2 #define ka0202_cmm$v_crdctl_cfe2 ka0202_cmm$r_crdctl_overlay.ka0202_cmm$r_crdctl_bits.ka0202_cmm$v_crdctl_cfe2 #define ka0202_cmm$q_csr10 ka0202_cmm$r_csr10_overlay.ka0202_cmm$q_csr10 #define ka0202_cmm$q_csr11 ka0202_cmm$r_csr11_overlay.ka0202_cmm$q_csr11 #define ka0202_cmm$q_csr12 ka0202_cmm$r_csr12_overlay.ka0202_cmm$q_csr12 #define ka0202_cmm$q_csr13 ka0202_cmm$r_csr13_overlay.ka0202_cmm$q_csr13 #define ka0202_cmm$q_csr14 ka0202_cmm$r_csr14_overlay.ka0202_cmm$q_csr14 #define ka0202_cmm$q_csr15 ka0202_cmm$r_csr15_overlay.ka0202_cmm$q_csr15 #endif /* #if !defined(__VAXC) */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __KA0202DEF_LOADED */