/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:26:53 by OpenVMS SDL EV3-3 */ /* Source: 23-DEC-1993 09:20:33 $1$DGA7274:[LIB_H.SRC]IO0E04DEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $IO0E04DEF ***/ #ifndef __IO0E04DEF_LOADED #define __IO0E04DEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif #define IO0E04$L_IOC_IACK_SC_PA_L -1073741824 #define IO0E04$L_IOC_IACK_SC_PA_H 1 #define IO0E04$L_CFG_CYCLE_PA_L -2147483648 #define IO0E04$L_CFG_CYCLE_PA_H 1 #define IO0E04$L_TB_EN_PA_L -2147483648 #define IO0E04$L_TB_EN_PA_H 1 #define IO0E04$L_PCI_SFT_RST_PA_L -2147483648 #define IO0E04$L_PCI_SFT_RST_PA_H 1 #define IO0E04$L_PCI_PAR_DISABLE_PA_L -2147483648 #define IO0E04$L_PCI_PAR_DISABLE_PA_H 1 #define IO0E04$L_PCI_IO_PA_L 0 #define IO0E04$L_PCI_IO_PA_H 3 #define IO0E04$L_PCI_IO_END_PA_L 2097152 #define IO0E04$L_PCI_IO_END_PA_H 3 #define IO0E04$L_KBD_DATA_PA_L 3072 #define IO0E04$L_KBD_DATA_PA_H 3 #define IO0E04$B_KBD_DATA_PCI 96 #define IO0E04$L_KBD_CMD_PA_L 3200 #define IO0E04$L_KBD_CMD_PA_H 3 #define IO0E04$B_KBD_CMD_PCI 100 #define IO0E04$L_DS1287_PA_L 3584 #define IO0E04$L_DS1287_PA_H 3 #define IO0E04$L_COM1_PA_L 32512 #define IO0E04$L_COM1_PA_H 3 #define IO0E04$L_COM1_RCV_BUF_PCI 1016 #define IO0E04$L_COM1_IER_PCI 1017 #define IO0E04$L_COM1_IIR_PCI 1018 #define IO0E04$L_COM1_L_CTL_PCI 1019 #define IO0E04$L_COM1_M_CTL_PCI 1020 #define IO0E04$L_COM1_L_STAT_PCI 1021 #define IO0E04$L_COM1_M_STAT_PCI 1022 #define IO0E04$L_COM2_PA_L 24320 #define IO0E04$L_COM2_PA_H 3 #define IO0E04$L_COM2_RCV_BUF_PCI 760 #define IO0E04$L_COM2_IER_PCI 761 #define IO0E04$L_COM2_IIR_PCI 762 #define IO0E04$L_COM2_L_CTL_PCI 763 #define IO0E04$L_COM2_M_CTL_PCI 764 #define IO0E04$L_COM2_L_STAT_PCI 765 #define IO0E04$L_COM2_M_STAT_PCI 766 #define IO0E04$L_PPORT_PA_L 28416 #define IO0E04$L_PPORT_PA_H 3 #define IO0E04$L_FLOPPY_PA_L 32256 #define IO0E04$L_FLOPPY_PA_H 3 #define IO0E04$L_MASTER_ICR_PCI 32 #define IO0E04$L_MASTER_IMR_PCI 33 #define IO0E04$L_SLAVE_ICR_PCI 160 #define IO0E04$L_SLAVE_IMR_PCI 161 #define IO0E04$L_PCI_IRR_REG 38 #define IO0E04$L_PCI_IMR_REG 38 #define IO0E04$L_HAE_PA_L -2147483648 #define IO0E04$L_HAE_PA_H 1 #define IO0E04$L_IOC_STAT0_PA_L -2147483584 #define IO0E04$L_IOC_STAT0_PA_H 1 #define IO0E04$L_IOC_STAT1_PA_L -2147483552 #define IO0E04$L_IOC_STAT1_PA_H 1 #define IO0E04$L_IOC_TBIA_PA_L -2147483520 #define IO0E04$L_IOC_TBIA_PA_H 1 #define IO0E04$L_IOC_W_BASE_0_PA_L -2147483392 #define IO0E04$L_IOC_W_BASE_0_PA_H 1 #define IO0E04$L_IOC_W_BASE_1_PA_L -2147483360 #define IO0E04$L_IOC_W_BASE_1_PA_H 1 #define IO0E04$L_IOC_W_MASK_0_PA_L -2147483328 #define IO0E04$L_IOC_W_MASK_0_PA_H 1 #define IO0E04$L_IOC_W_MASK_1_PA_L -2147483296 #define IO0E04$L_IOC_W_MASK_1_PA_H 1 #define IO0E04$L_IOC_T_BASE_0_PA_L -2147483264 #define IO0E04$L_IOC_T_BASE_0_PA_H 1 #define IO0E04$L_IOC_T_BASE_1_PA_L -2147483232 #define IO0E04$L_IOC_T_BASE_1_PA_H 1 #define IO0E04$L_IOC_TB_TAG_0_PA_L -2130706432 #define IO0E04$L_IOC_TB_TAG_0_PA_H 1 #define IO0E04$L_IOC_TB_TAG_1_PA_L -2130706400 #define IO0E04$L_IOC_TB_TAG_1_PA_H 1 #define IO0E04$L_IOC_TB_TAG_2_PA_L -2130706368 #define IO0E04$L_IOC_TB_TAG_2_PA_H 1 #define IO0E04$L_IOC_TB_TAG_3_PA_L -2130706336 #define IO0E04$L_IOC_TB_TAG_3_PA_H 1 #define IO0E04$L_IOC_TB_TAG_4_PA_L -2130706304 #define IO0E04$L_IOC_TB_TAG_4_PA_H 1 #define IO0E04$L_IOC_TB_TAG_5_PA_L -2130706272 #define IO0E04$L_IOC_TB_TAG_5_PA_H 1 #define IO0E04$L_IOC_TB_TAG_6_PA_L -2130706240 #define IO0E04$L_IOC_TB_TAG_6_PA_H 1 #define IO0E04$L_IOC_TB_TAG_7_PA_L -2130706208 #define IO0E04$L_IOC_TB_TAG_7_PA_H 1 #define IO0E04$L_FLASH_ROM1_PA 939524096 #define IO0E04$L_FLASH_ROM2_PA 941621248 #define IO0E04$L_FLASH_ROM3_PA 943718400 #define IO0E04$L_FLASH_ROM4_PA 945815552 #define IO0E04$L_FLASH_ROM1_END_PA 941621240 #define IO0E04$L_FLASH_ROM2_END_PA 943718392 #define IO0E04$L_FLASH_ROM3_END_PA 945815544 #define IO0E04$L_FLASH_ROM4_END_PA 947912696 #define IO0E04$L_PCI_SPARSE_MEM_PA_L 0 #define IO0E04$L_PCI_SPARSE_MEM_PA_H 2 #define IO0E04$L_PCI_SPARSE_MEMEND_PA_L 536870912 #define IO0E04$L_PCI_SPARSE_MEMEND_PA_H 2 #define IO0E04$L_PCI_DENSE_MEM_PA_L 0 #define IO0E04$L_PCI_DENSE_MEM_PA_H 3 #define IO0E04$L_PCI_DENSE_MEM_END_PA_L -1 #define IO0E04$L_PCI_DENSE_MEM_END_PA_H 3 #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __IO0E04DEF_LOADED */