/**/
/***************************************************************************/
/**                                                                       **/
/** © Copyright 2010, Hewlett-Packard Development Company, L.P.           **/
/**                                                                       **/
/** Confidential computer software.  Valid license from HP and/or         **/
/** its subsidiaries required for possession, use, or copying.            **/
/**                                                                       **/
/** Consistent with FAR 12.211 and 12.212, Commercial Computer Software,  **/
/** Computer Software Documentation, and Technical Data for Commercial    **/
/** Items are licensed to the U.S. Government under vendor's standard     **/
/** commercial license.                                                   **/
/**                                                                       **/
/** Neither HP nor any of its subsidiaries shall be liable for technical  **/
/** or editorial errors or omissions contained herein.  The information   **/
/** in this document is provided "as is" without warranty of any kind and **/
/** is subject to change without notice.  The warranties for HP products  **/
/** are set forth in the express limited warranty statements accompanying **/
/** such products.  Nothing herein should be construed as constituting an **/
/** additional warranty.                                                  **/
/**                                                                       **/
/***************************************************************************/
/********************************************************************************************************************************/
/* Created: 30-Mar-2010 17:26:43 by OpenVMS SDL EV3-3      */
/* Source:  26-JUN-1995 11:08:59 $1$DGA7274:[LIB_H.SRC]IO0902DEF.SDL;1 */
/********************************************************************************************************************************/
/*** MODULE $IO0902DEF ***/
#ifndef __IO0902DEF_LOADED
#define __IO0902DEF_LOADED 1
 
#pragma __nostandard			 /* This file uses non-ANSI-Standard features */
#pragma __member_alignment __save
#pragma __nomember_alignment
#ifdef __INITIAL_POINTER_SIZE			 /* Defined whenever ptr size pragmas supported */
#pragma __required_pointer_size __save		 /* Save the previously-defined required ptr size */
#pragma __required_pointer_size __short		 /* And set ptr size default to 32-bit pointers */
#endif
 
#ifdef __cplusplus
    extern "C" {
#define __unknown_params ...
#define __optional_params ...
#else
#define __unknown_params
#define __optional_params ...
#endif
 
#ifndef __struct
#if !defined(__VAXC)
#define __struct struct
#else
#define __struct variant_struct
#endif
#endif
 
#ifndef __union
#if !defined(__VAXC)
#define __union union
#else
#define __union variant_union
#endif
#endif
 
#define IO0902$Q_CPU0_PA_L -2147483648
#define IO0902$Q_CPU0_PA_H 131
#define IO0902$Q_CPU1_PA_L -2130706432
#define IO0902$Q_CPU1_PA_H 131
#define IO0902$Q_CPU2_PA_L -2113929216
#define IO0902$Q_CPU2_PA_H 131
#define IO0902$Q_CPU3_PA_L -2097152000
#define IO0902$Q_CPU3_PA_H 131
#define IO0902$Q_SMM0_PA_L -2013265920
#define IO0902$Q_SMM0_PA_H 131
#define IO0902$Q_SMM1_PA_L -1996488704
#define IO0902$Q_SMM1_PA_H 131
#define IO0902$Q_SMM2_PA_L -1979711488
#define IO0902$Q_SMM2_PA_H 131
#define IO0902$Q_SMM3_PA_L -1962934272
#define IO0902$Q_SMM3_PA_H 131
#define IO0902$Q_T2IO_PA_L -1912602624
#define IO0902$Q_T2IO_PA_H 131
#define IO0902$Q_EIO_PA_L -1895825408
#define IO0902$Q_EIO_PA_H 131
#define IO0902$Q_IIC_PA_L -1610570240
#define IO0902$Q_IIC_PA_H 131
#define IO0902$Q_DS1287_PA_L -1610609152
#define IO0902$Q_DS1287_PA_H 131
#define IO0902$Q_MASTER_ICR_L -1610570112
#define IO0902$Q_MASTER_ICR_H 131
#define IO0902$Q_SLAVE0_ICR_L -1610570048
#define IO0902$Q_SLAVE0_ICR_H 131
#define IO0902$Q_SLAVE1_ICR_L -1610569920
#define IO0902$Q_SLAVE1_ICR_H 131
#define IO0902$Q_SLAVE2_ICR_L -1610569856
#define IO0902$Q_SLAVE2_ICR_H 131
#define IO0902$L_MASTER_ICR_PCI 1332
#define IO0902$L_SLAVE0_ICR_PCI 1334
#define IO0902$L_SLAVE1_ICR_PCI 1338
#define IO0902$L_SLAVE2_ICR_PCI 1340
#define IO0902$L_SLAVE3_ICR_PCI 1342
#define IO0902$L_SLAVE4_ICR_PCI 1336
#define IO0902$L_ESC_INT1_ICR 32
#define IO0902$L_ESC_INT2_ICR 160
#define IO0902$Q_MASTER_IMR_L -1610570080
#define IO0902$Q_MASTER_IMR_H 131
#define IO0902$Q_SLAVE0_IMR_L -1610570016
#define IO0902$Q_SLAVE0_IMR_H 131
#define IO0902$Q_SLAVE1_IMR_L -1610569888
#define IO0902$Q_SLAVE1_IMR_H 131
#define IO0902$Q_SLAVE2_IMR_L -1610569824
#define IO0902$Q_SLAVE2_IMR_H 131
#define IO0902$L_MASTER_IMR_PCI 1333
#define IO0902$L_SLAVE0_IMR_PCI 1335
#define IO0902$L_SLAVE1_IMR_PCI 1339
#define IO0902$L_SLAVE2_IMR_PCI 1341
#define IO0902$L_SLAVE3_IMR_PCI 1343
#define IO0902$L_SLAVE4_IMR_PCI 1337
#define IO0902$L_ESC_INT1_IMR 33
#define IO0902$L_ESC_INT2_IMR 161
#define IO0902$Q_SLU0_RCV_BUF_L -1610580224
#define IO0902$Q_SLU0_RCV_BUF_H 131
#define IO0902$Q_SLU0_IER_L -1610580192
#define IO0902$Q_SLU0_IER_H 131
#define IO0902$Q_SLU0_IIR_L -1610580160
#define IO0902$Q_SLU0_IIR_H 131
#define IO0902$Q_SLU0_L_CTL_L -1610580128
#define IO0902$Q_SLU0_L_CTL_H 131
#define IO0902$Q_SLU0_M_CTL_L -1610580096
#define IO0902$Q_SLU0_M_CTL_H 131
#define IO0902$Q_SLU0_L_STAT_L -1610580064
#define IO0902$Q_SLU0_L_STAT_H 131
#define IO0902$Q_SLU0_M_STAT_L -1610580032
#define IO0902$Q_SLU0_M_STAT_H 131
#define IO0902$L_SLU0_RCV_BUF_PCI 1016
#define IO0902$L_SLU0_IER_PCI 1017
#define IO0902$L_SLU0_IIR_PCI 1018
#define IO0902$L_SLU0_L_CTL_PCI 1019
#define IO0902$L_SLU0_M_CTL_PCI 1020
#define IO0902$L_SLU0_L_STAT_PCI 1021
#define IO0902$L_SLU0_M_STAT_PCI 1022
#define IO0902$Q_SLU1_RCV_BUF_L -1610588416
#define IO0902$Q_SLU1_RCV_BUF_H 131
#define IO0902$Q_SLU1_IER_L -1610588384
#define IO0902$Q_SLU1_IER_H 131
#define IO0902$Q_SLU1_IIR_L -1610588352
#define IO0902$Q_SLU1_IIR_H 131
#define IO0902$Q_SLU1_L_CTL_L -1610588320
#define IO0902$Q_SLU1_L_CTL_H 131
#define IO0902$Q_SLU1_M_CTL_L -1610588288
#define IO0902$Q_SLU1_M_CTL_H 131
#define IO0902$Q_SLU1_L_STAT_L -1610588256
#define IO0902$Q_SLU1_L_STAT_H 131
#define IO0902$Q_SLU1_M_STAT_L -1610588224
#define IO0902$Q_SLU1_M_STAT_H 131
#define IO0902$L_SLU1_RCV_BUF_PCI 760
#define IO0902$L_SLU1_IER_PCI 761
#define IO0902$L_SLU1_IIR_PCI 762
#define IO0902$L_SLU1_L_CTL_PCI 763
#define IO0902$L_SLU1_M_CTL_PCI 764
#define IO0902$L_SLU1_L_STAT_PCI 765
#define IO0902$L_SLU1_M_STAT_PCI 766
#define IO0902$B_KBD_CMD_PCI 100
#define IO0902$B_KBD_DATA_PCI 96
#define IO0902$Q_KBD_CMD_L -1610609536
#define IO0902$Q_KBD_CMD_H 131
#define IO0902$Q_KBD_DATA_L -1610609664
#define IO0902$Q_KBD_DATA_H 131
#define IO0902$Q_PCI_SLOT0_CFG_PA_L -1878982656
#define IO0902$Q_PCI_SLOT0_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT1_CFG_PA_L -1878917120
#define IO0902$Q_PCI_SLOT1_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT2_CFG_PA_L -1878786048
#define IO0902$Q_PCI_SLOT2_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT3_CFG_PA_L -1878523904
#define IO0902$Q_PCI_SLOT3_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT4_CFG_PA_L -1877999616
#define IO0902$Q_PCI_SLOT4_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT5_CFG_PA_L -1876951040
#define IO0902$Q_PCI_SLOT5_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT6_CFG_PA_L -1874853888
#define IO0902$Q_PCI_SLOT6_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT7_CFG_PA_L -1870659584
#define IO0902$Q_PCI_SLOT7_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT8_CFG_PA_L -1862270976
#define IO0902$Q_PCI_SLOT8_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT9_CFG_PA_L -1845493760
#define IO0902$Q_PCI_SLOT9_CFG_PA_H 131
#define IO0902$Q_PCI_SLOT10_CFG_PA_L -1811939328
#define IO0902$Q_PCI_SLOT10_CFG_PA_H 131
#define IO0902$Q_PCI_SPARSE_IO_L -1610612736
#define IO0902$Q_PCI_SPARSE_IO_H 131
#define IO0902$Q_PCI_SPARSE_MEM_L 0
#define IO0902$Q_PCI_SPARSE_MEM_H 130
#define IO0902$Q_PCI_DENSE_MEM_L -1073741824
#define IO0902$Q_PCI_DENSE_MEM_H 131
#define IO0902$Q_PCI_CONFIG_SPACE_L -1879048192
#define IO0902$Q_PCI_CONFIG_SPACE_H 131
#define IO0902$Q_PCI_EIO_SPARSE_IO_L -1073741824
#define IO0902$Q_PCI_EIO_SPARSE_IO_H 129
#define IO0902$Q_PCI_EIO_SPARSE_MEM_L 0
#define IO0902$Q_PCI_EIO_SPARSE_MEM_H 131
#define IO0902$Q_PCI_EIO_DENSE_MEM_L -2147483648
#define IO0902$Q_PCI_EIO_DENSE_MEM_H 129
#define IO0902$Q_PCI_EIO_CONFIG_SPACE_L -1744830464
#define IO0902$Q_PCI_EIO_CONFIG_SPACE_H 131
#define IO0902$Q_T4MASTER_ICR_L -1073699200
#define IO0902$Q_T4MASTER_ICR_H 129
#define IO0902$Q_T4SLAVE0_ICR_L -1073699136
#define IO0902$Q_T4SLAVE0_ICR_H 129
#define IO0902$Q_T4MASTER_IMR_L -1073699168
#define IO0902$Q_T4MASTER_IMR_H 129
#define IO0902$Q_T4SLAVE0_IMR_L -1073699104
#define IO0902$Q_T4SLAVE0_IMR_H 129
#define IO0902$K_T2_VECTOR_COUNT 56
#define IO0902$K_T3_VECTOR_COUNT 64
#define IO0902$K_EXTIO_VECTOR_COUNT 16
 
#pragma __member_alignment __restore
#ifdef __INITIAL_POINTER_SIZE			 /* Defined whenever ptr size pragmas supported */
#pragma __required_pointer_size __restore		 /* Restore the previously-defined required ptr size */
#endif
#ifdef __cplusplus
    }
#endif
#pragma __standard
 
#endif /* __IO0902DEF_LOADED */