/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:26:27 by OpenVMS SDL EV3-3 */ /* Source: 02-MAY-2002 09:33:44 $1$DGA7274:[LIB_H.SRC]HWSCBDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $HWSCBDEF ***/ #ifndef __HWSCBDEF_LOADED #define __HWSCBDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /* */ /* System Control Block Entry Definitions. The system control block (SCB) */ /* specifies the entry points for exception and interrupt service routines. */ /* The first quadword is the virtual address of the service routine associated */ /* with that entry. The second quadword is an arbitrary parameter to be passed */ /* to the service routine. The parameter for EVMS for most exceptions and */ /* interrupts is the virtual address of the procedure descrtor for the service */ /* routine. */ /* */ #define HWSCB$K_VECTOR 0 /* Entry point address */ #define HWSCB$K_PARAMETER 8 /* Arbitrary parameter */ #define HWSCB$Q_UNUSED_00 0 /* %X00 Unused vector */ #define HWSCB$Q_FLOAT_FAULT 16 /* %X10 Floating disabled fault */ #define HWSCB$Q_UNUSED_20 32 /* %X20 Unused vector */ #define HWSCB$Q_UNUSED_30 48 /* %X30 Unused vector */ #define HWSCB$Q_UNUSED_40 64 /* %X40 Unused vector */ #define HWSCB$Q_UNUSED_50 80 /* %X50 Unused vector */ #define HWSCB$Q_UNUSED_60 96 /* %X60 Unused vector */ #define HWSCB$Q_UNUSED_70 112 /* %X70 Unused vector */ #define HWSCB$Q_ACCVIO 128 /* %X80 Access control violation fault */ #define HWSCB$Q_TRANSLATION_FAULT 144 /* %X90 Translation not valid fault */ #define HWSCB$Q_READ_FAULT 160 /* %XA0 Fault on read fault */ #define HWSCB$Q_WRITE_FAULT 176 /* %XB0 Fault on write fault */ #define HWSCB$Q_EXECUTE_FAULT 192 /* %XC0 Fault on execute fault */ #define HWSCB$Q_ARITHMETIC_TRAP 512 /* %X200 Arithmetic trap */ #define HWSCB$Q_KERNEL_AST 576 /* %X240 Kernel mode AST */ #define HWSCB$Q_EXEC_AST 592 /* %X250 Exec mode AST */ #define HWSCB$Q_SUPER_AST 608 /* %X260 Super mode AST */ #define HWSCB$Q_USER_AST 624 /* %X270 User mode AST */ #define HWSCB$Q_REPORT_ALIGN_FAULT 640 /* %X280 Report alignment fault */ #define HWSCB$Q_UNUSED_290 656 /* %X290 Unused vector */ #define HWSCB$Q_UNUSED_2A0 672 /* %X2A0 Unused vector */ #define HWSCB$Q_UNUSED_2B0 688 /* %X2B0 Unused vector */ #define HWSCB$Q_UNUSED_2C0 704 /* %X2C0 Unused vector */ #define HWSCB$Q_UNUSED_2D0 720 /* %X2D0 Unused vector */ #define HWSCB$Q_UNUSED_2E0 736 /* %X2E0 Unused vector */ #define HWSCB$Q_UNUSED_2F0 752 /* %X2F0 Unused vector */ #define HWSCB$Q_LOAD_F_FLOAT 768 /* %X300 Load F floating */ #define HWSCB$Q_LOAD_D_FLOAT 784 /* %X310 Load D floating */ #define HWSCB$Q_LOAD_S_FLOAT 800 /* %X320 Load S floating */ #define HWSCB$Q_LOAD_T_FLOAT 816 /* %X330 Load T floating */ #define HWSCB$Q_STORE_F_FLOAT 832 /* %X340 Store F floating */ #define HWSCB$Q_STORE_D_FLOAT 848 /* %X350 Store D floating */ #define HWSCB$Q_STORE_S_FLOAT 864 /* %X360 Store S floating */ #define HWSCB$Q_STORE_T_FLOAT 880 /* %X370 Store T floating */ #define HWSCB$Q_LOAD_SEXT_LONG 896 /* %X380 Load sign-extended longword */ #define HWSCB$Q_LOAD_QUAD 912 /* %X390 Load quadword */ #define HWSCB$Q_LOAD_SEXT_LONG_L 928 /* %X3A0 Load sign-extended longword locked */ #define HWSCB$Q_LOAD_QUAD_L 944 /* %X3B0 Load quadword locked */ #define HWSCB$Q_STORE_LONG 960 /* %X3C0 Store longword */ #define HWSCB$Q_STORE_QUAD 976 /* %X3D0 Store quadword */ #define HWSCB$Q_STORE_LONG_C 992 /* %X3E0 Store longword conditional */ #define HWSCB$Q_STORE_QUAD_C 1008 /* %X3F0 Store quadword conditional */ #define HWSCB$Q_BREAK_POINT 1024 /* %X400 Break point trap */ #define HWSCB$Q_BUG_CHECK 1040 /* %X410 Bug check trap */ #define HWSCB$Q_ILLEGAL_INSTRUCTION 1056 /* %X420 Illegal instruction trap */ #define HWSCB$Q_ILLEGAL_PAL_OPERAND 1072 /* %X430 Illegal call PAL operand */ #define HWSCB$Q_GENTRAP 1088 /* %X440 Software generated trap */ #define HWSCB$Q_UNUSED_450 1104 /* %X450 Unused vector */ #define HWSCB$Q_UNUSED_460 1120 /* %X460 Unused vector */ #define HWSCB$Q_UNUSED_470 1136 /* %X470 Unused vector */ #define HWSCB$Q_CHANGE_MODE_KERNEL 1152 /* %X480 Change mode to kernel */ #define HWSCB$Q_CHANGE_MODE_EXEC 1168 /* %X490 Change mode to exec */ #define HWSCB$Q_CHANGE_MODE_SUPER 1184 /* %X4A0 Change mode to super */ #define HWSCB$Q_CHANGE_MODE_USER 1200 /* %X4B0 Change mode to user */ #define HWSCB$Q_DIGITAL_1 1216 /* %X4C0 Reserved for Digital */ #define HWSCB$Q_DIGITAL_2 1232 /* %X4D0 Reserved for Digital */ #define HWSCB$Q_DIGITAL_3 1248 /* %X4E0 Reserved for Digital */ #define HWSCB$Q_DIGITAL_4 1264 /* %X4F0 Reserved for Digital */ #define HWSCB$Q_UNUSED_500 1280 /* %X500 Unused */ #define HWSCB$Q_SOFT_INTERRUPT_1 1296 /* %X510 Software level 1 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_2 1312 /* %x520 Software level 2 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_3 1328 /* %X530 Software level 3 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_4 1344 /* %X540 Software level 4 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_5 1360 /* %X550 Software level 5 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_6 1376 /* %X560 Software level 6 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_7 1392 /* %X570 Software level 7 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_8 1408 /* %X580 Software level 8 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_9 1424 /* %X590 Software level 9 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_10 1440 /* %X5A0 Software level 10 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_11 1456 /* %X5B0 Software level 11 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_12 1472 /* %X5C0 Software level 12 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_13 1488 /* %X5D0 Software level 13 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_14 1504 /* %X5E0 Software level 14 interrupt */ #define HWSCB$Q_SOFT_INTERRUPT_15 1520 /* %X5F0 Software level 15 interrupt */ #define HWSCB$Q_RESCHEDULE 1328 /* Reschedule interrupt */ #define HWSCB$Q_IO_POST 1344 /* I/O post interrupt */ #define HWSCB$Q_SW_TIMER_INTERRUPT 1392 /* Software timer interrupt */ #define HWSCB$Q_IP_CONTROL 1472 /* IP control */ #define HWSCB$Q_XDELTA 1504 /* Xdelta */ #define HWSCB$Q_INTERVAL_CLOCK 1536 /* %X600 Interval clock interrupt */ #define HWSCB$Q_INTERPROCESSOR 1552 /* %X610 Interprocessor interrupt */ #define HWSCB$Q_SYSTEM_CORRECTED_ERROR 1568 /* %X620 System corrected error interrupt */ #define HWSCB$Q_PROCESS_CORRECTED_ERROR 1584 /* %X630 Processor corrected error interrupt */ #define HWSCB$Q_POWER_FAIL 1600 /* %X640 Power fail interrupt */ #define HWSCB$Q_PERF_MONITOR 1616 /* %X650 Reserved for performance monitor */ #define HWSCB$Q_SYSTEM_MACHINE_CHECK 1632 /* %X660 System machine check abort */ #define HWSCB$Q_PROCESSOR_MACHINE_CHECK 1648 /* %X670 Processor machine check abort */ #define HWSCB$Q_SYSTEM_ENV_EVENT 1664 /* %X680 Environmental event interrupt */ #define HWSCB$Q_PROCESSOR_SPECIFIC_1 1680 /* %X690 Reserved - processor specific */ #define HWSCB$Q_SYSTEM_REC_ERROR 1696 /* %X6A0 System recoverable machine check abort */ #define HWSCB$Q_PROC_REC_ERROR 1712 /* %X6B0 Processer recoverable machine check abort */ #define HWSCB$Q_IO_INTERRUPT_BASE 2048 /* %X800 */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __HWSCBDEF_LOADED */