/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:25:52 by OpenVMS SDL EV3-3 */ /* Source: 20-AUG-2001 06:43:08 $1$DGA7274:[LIB_H.SRC]FPDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $FPDEF ***/ #ifndef __FPDEF_LOADED #define __FPDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /* */ /* Define the I/O Fastpath Function codes */ /* */ #define FP$K_BALANCE_PORTS 1 #define FP$K_CPU_CONFIGURED 2 #define FP$K_CPU_STARTING 3 #define FP$K_CPU_STOPPING 4 #define FP$K_CPU_STOP_FAILED 5 /* */ /* Define flags for call to exe$fp_select_hwint() */ /* */ #define HWINT$M_CPU_SELECTED 0x1 #define HWINT$M_CPU_NOT_IN_RAD 0x2 #define HWINT$M_PRIMARY 0x4 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _hwint_flags { #pragma __nomember_alignment __union { __struct { unsigned int hwint$l_flags; } hwint$r_fields; __struct { unsigned hwint$v_cpu_selected : 1; unsigned hwint$v_cpu_not_in_rad : 1; unsigned hwint$v_primary : 1; unsigned hwint$v_reserved : 1; unsigned hwint$v_fill_0_ : 4; } hwint$r_bits; } hwint$r_overlay; char hwint$b_fill_1_ [4]; } HWINT_FLAGS; #if !defined(__VAXC) #define hwint$l_flags hwint$r_overlay.hwint$r_fields.hwint$l_flags #define hwint$v_cpu_selected hwint$r_overlay.hwint$r_bits.hwint$v_cpu_selected #define hwint$v_cpu_not_in_rad hwint$r_overlay.hwint$r_bits.hwint$v_cpu_not_in_rad #define hwint$v_primary hwint$r_overlay.hwint$r_bits.hwint$v_primary #endif /* #if !defined(__VAXC) */ /* */ /* This structure maintains parameters required for each RAD (Resource */ /* Affinity Domain). The FP struct maintains a pointer to an array of */ /* this structure and the number of these structures in the array. */ /* An array of this structure will be allocated at FP init time */ /* for the number of RADs in the system. The minimum number of RADs */ /* in any system is 1. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _fprad { #pragma __nomember_alignment int fprad$l_current_fp_cpu; int fprad$l_current_hwint_cpu; int fprad$l_radmask; char fprad$b_fill_2_ [4]; } FPRAD; /* */ /* FP - I/O Fastpath block */ /* */ #define FP$M_SPL_HOLD 0x1 #define FP$K_LENGTH 96 /* Length of FP_BLK */ #define FP$C_LENGTH 96 /* Length of FP_BLK */ #ifdef __cplusplus /* Define structure prototypes */ struct _spl; struct _cbb; struct _sud; #endif /* #ifdef __cplusplus */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _fp { #pragma __nomember_alignment struct _spl *fp$l_dlck; /* pointer to spinlock */ int fp$l_dipl; /* device ipl */ unsigned short int fp$w_mbo; /* must-be-one field */ unsigned char fp$b_type; /* structure type */ unsigned char fp$b_subtype; /* structure sub-type */ __union { __struct { unsigned int fp$l_flags; } fp$r_flags_fields; __struct { unsigned fp$v_spl_hold : 1; /* set if already holding FP SPinLock */ unsigned fp$v_reserved : 1; unsigned fp$v_fill_3_ : 6; } fp$r_flags_bits; } fp$r_flags_overlay; unsigned __int64 fp$q_size; /* structure size */ /* pointer to mask of available CPUs */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ struct _cbb *fp$q_useable_cpus; #else unsigned __int64 fp$q_useable_cpus; #endif /* Pointer to mask which tries as much as possible to favor */ /* the CPUs in the RAD in which the IO port lives. */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ struct _cbb *fp$q_favored_cpus; #else unsigned __int64 fp$q_favored_cpus; #endif /* cells to support assignable ports: */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif struct _sud *fp$l_ports_link; /* link to SUD */ int fp$l_num_ports; /* total number of assignable ports */ int fp$l_num_user_ports; /* total number of user-assigned ports */ /* cells to support distributed hardware interrupts: */ struct _sud *fp$l_hwint_ports_link; /* link to SUD */ /* Total number of distributed hardware interrupt ports. */ int fp$l_num_hwint_ports; /* Total number of distributed hardware interrupt ports with */ /* user-assigned interrupt CPU targets. */ int fp$l_num_user_hwint_ports; /* Last hardware interrupt CPU assigned, absolute number, not a mask. */ int fp$l_last_hwint_cpu_assigned; /* Pointer to array of FPRAD structures for RAD housekeeping */ struct _fprad *fp$ps_fprad; /* The number of RADs in this system, which determines the size of the */ /* array of FPRAD structures. The minimum is 1. */ int fp$l_rad_count; /* Unique Identifier of FP spinlock owner. This field is used to prevent */ /* any routine other than the spinlock owner from clearing the lock. */ int fp$l_spl_owner; /* Contingency/debug cells: */ int fp$l_spare1; int fp$l_spare2; int fp$l_spare3; int fp$l_spare4; } FP; #if !defined(__VAXC) #define fp$l_flags fp$r_flags_overlay.fp$r_flags_fields.fp$l_flags #define fp$v_spl_hold fp$r_flags_overlay.fp$r_flags_bits.fp$v_spl_hold #endif /* #if !defined(__VAXC) */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __FPDEF_LOADED */