/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:27:03 by OpenVMS SDL EV3-3 */ /* Source: 05-MAY-2005 15:55:55 $1$DGA7274:[LIB_H.SRC]CONFIG_TABLE.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE CONFIG_TABLE ***/ #ifndef __CONFIG_TABLE_LOADED #define __CONFIG_TABLE_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /* */ /* The configuration table has a 64-bit mask prefix. This mask is used to */ /* strip the HW ID in the busarray prior to matching against the ID in the */ /* configuration entry array. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __longword #else #pragma __nomember_alignment #endif typedef struct _config_header { #pragma __nomember_alignment __union { /* HW ID mask union */ __struct { /* HW ID mask as longwords */ unsigned int iogen_cfg_tbl$l_hw_id_mask_lo; /* HW ID mask low 32-bits */ unsigned int iogen_cfg_tbl$l_hw_id_mask_hi; /* HW ID mask high 32-bits */ } iogen_cfg_tbl$r_hw_id_mask_i; unsigned __int64 iogen_cfg_tbl$q_hw_id_mask; /* HW ID mask 64-bits */ } iogen_cfg_tbl$r_id_mask_union; } CONFIG_HEADER; #if !defined(__VAXC) #define iogen_cfg_tbl$l_hw_id_mask_lo iogen_cfg_tbl$r_id_mask_union.iogen_cfg_tbl$r_hw_id_mask_i.iogen_cfg_tbl$l_hw_id_mask_lo #define iogen_cfg_tbl$l_hw_id_mask_hi iogen_cfg_tbl$r_id_mask_union.iogen_cfg_tbl$r_hw_id_mask_i.iogen_cfg_tbl$l_hw_id_mask_hi #define iogen_cfg_tbl$q_hw_id_mask iogen_cfg_tbl$r_id_mask_union.iogen_cfg_tbl$q_hw_id_mask #endif /* #if !defined(__VAXC) */ #define IOGEN_CFG_TBL$K_HEADER_LEN 8 /* Length of the entry */ /* */ /* This structure provides a layout of the memory used by the */ /* config table. It is prepended to the config_table structure */ /* and is typically used only for creation and deletion of the */ /* table. */ /* */ /* The table is created from a single pool allocation. This pool */ /* fragment is then managed by the table creation routines as a */ /* private pool. This minimizes fragmentation of pool, and allows */ /* the entire table to be deleted by a single call. */ /* */ /* The definition has been worked to be the same size as a "normal" */ /* block header for VMS. The first two longword are not a flink */ /* and blink - since this is not part of a queue. But the size, */ /* type and subtype fields are all in the right places. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _config_memdsc { #pragma __nomember_alignment char *config_memdsc$ps_fragment; /* Pointer to free memory in the fragment */ short int config_memdsc$w_free; /* Amount of memory left in the fragment */ char config_memdsc$b_refcnt; /* Number of references to the fragment */ char config_memdsc$b_fill; /* Spare byte */ short int config_memdsc$w_size; /* Total size of the pool fragment or FFFF */ char config_memdsc$b_type; /* Block type */ char config_memdsc$b_subtype; /* Subtype */ int config_memdsc$l_actual_size; /* Actual block size if size is FFFF */ } CONFIG_MEMDSC; /* */ /* This structure describes an array entry in the config table. It uses the */ /* iogen_cfg_tbl prefix for historical reasons. The first 32 bytes (up to the */ /* flags) is identical in format to a hand-defined BLISS definition that was */ /* replaced in IOGEN_MACROS.REQ. The second 32 bytes provide additional information */ /* to allow boot configuration, and make the configuration extensible. */ /* */ /* If you touch this structure size, or order of the fields, you must edit */ /* IOGEN_MACROS.REQ as well as any *_SUPPORT.C bus modules to ensure that the dummy */ /* records are properly initialized. */ /* */ #define IOGEN_CFG_TBL$M_MSCP 0x1 #define IOGEN_CFG_TBL$M_SCSI 0x2 #define IOGEN_CFG_TBL$M_NOVECTOR 0x4 #define IOGEN_CFG_TBL$M_DISK 0x8 #define IOGEN_CFG_TBL$M_NETWORK 0x10 #define IOGEN_CFG_TBL$M_PORT 0x20 #define IOGEN_CFG_TBL$M_CLASS 0x40 #define IOGEN_CFG_TBL$M_PSEUDO 0x80 #define IOGEN_CFG_TBL$M_BOOT 0x100 #define IOGEN_CFG_TBL$M_CASE_BLIND 0x200 #define IOGEN_CFG_TBL$M_NO_TABLE 0x400 #define IOGEN_CFG_TBL$M_EXTENDED_ID 0x800 #define IOGEN_CFG_TBL$M_FOREIGN 0x1000 #define IOGEN_CFG_TBL$M_FIBRE 0x2000 #define IOGEN_CFG_TBL$M_ULP 0x4000 #define IOGEN_CFG_TBL$M_LOAD_DRV_CLASS 0x8000 #define IOGEN_CFG_TBL$M_NISCA 0x10000 #define IOGEN_CFG_TBL$M_ISA_ON_EISA 0x20000 #define IOGEN_CFG_TBL$M_CISS 0x40000 #define IOGEN_CFG_TBL$M_SAS 0x80000 #define IOGEN_CFG_TBL$M_SYS_DEV 0x1 #define IOGEN_CFG_TBL$M_REMOTE 0x2 #define IOGEN_CFG_TBL$M_ALT_PREFIX 0x4 #define IOGEN_CFG_TBL$M_NO_CTRL_LTR 0x8 #define IOGEN_CFG_TBL$M_HW_CTRL_LTR 0x10 #define IOGEN_CFG_TBL$M_UNIT_0 0x20 #define IOGEN_CFG_TBL$M_CTRL_LTR_A 0x40 #define IOGEN_CFG_TBL$M_CREATE_DEV 0x80 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _iogen_cfg_tbl { #pragma __nomember_alignment __union { /* HW ID union */ __struct { /* HW ID as longwords */ unsigned int iogen_cfg_tbl$l_hw_id_lo; /* HW ID low 32-bits */ unsigned int iogen_cfg_tbl$l_hw_id_hi; /* HW ID high 32-bits */ } iogen_cfg_tbl$r_hw_id; unsigned __int64 iogen_cfg_tbl$q_hw_id; /* HW ID as 64-bits */ char iogen_cfg_tbl$b_hw_id_string [8]; /* HW ID as a string */ } iogen_cfg_tbl$r_id_union; void *iogen_cfg_tbl$ps_driver_name; /* Pointer to the device driver name (descriptor) */ char *iogen_cfg_tbl$ps_devnam; /* Pointer to the device name (ASCIZ) */ unsigned int iogen_cfg_tbl$l_vector_cnt; /* Number of interrupt vectors */ unsigned int iogen_cfg_tbl$l_vector_align; /* Alignment for SCB vectors */ unsigned int iogen_cfg_tbl$l_num_units; /* Number of units */ __union { unsigned int iogen_cfg_tbl$l_flags; /* Device flag word */ __struct { /* Device flag bits */ unsigned iogen_cfg_tbl$v_mscp : 1; /* MSCP device */ unsigned iogen_cfg_tbl$v_scsi : 1; /* SCSI device */ unsigned iogen_cfg_tbl$v_novector : 1; /* No Vector */ unsigned iogen_cfg_tbl$v_disk : 1; /* Disk */ unsigned iogen_cfg_tbl$v_network : 1; /* Network */ unsigned iogen_cfg_tbl$v_port : 1; /* Port driver */ unsigned iogen_cfg_tbl$v_class : 1; /* Class driver */ unsigned iogen_cfg_tbl$v_pseudo : 1; /* Psuedo driver */ unsigned iogen_cfg_tbl$v_boot : 1; /* Bootable device */ unsigned iogen_cfg_tbl$v_case_blind : 1; /* Match case blind */ unsigned iogen_cfg_tbl$v_no_table : 1; /* This is the dummy table */ unsigned iogen_cfg_tbl$v_extended_id : 1; /* ID check should not use the HW_MASK */ unsigned iogen_cfg_tbl$v_foreign : 1; /* Entry is from TPB file */ unsigned iogen_cfg_tbl$v_fibre : 1; /* Fibre Channel */ unsigned iogen_cfg_tbl$v_ulp : 1; /* Upper-Level Protocol */ unsigned iogen_cfg_tbl$v_load_drv_class : 1; /* Load driver class when loading driver */ unsigned iogen_cfg_tbl$v_nisca : 1; /* Identifies NISCA port driver */ unsigned iogen_cfg_tbl$v_isa_on_eisa : 1; /* Device is a ISA device on an EISA bus */ unsigned iogen_cfg_tbl$v_ciss : 1; /* CISS controller */ unsigned iogen_cfg_tbl$v_sas : 1; /* SAS controller */ unsigned iogen_cfg_tbl$v_fill_0_ : 4; } iogen_cfg_tbl$r_c_flag_bits; } iogen_cfg_tbl$r_c_flags; char *iogen_cfg_tbl$ps_description; /* Description of device (ASCIZ) */ unsigned int iogen_cfg_tbl$l_adp_type; /* Adapter type */ char *iogen_cfg_tbl$ps_assoc_drv; /* Associated driver (ASCIZ) */ char *iogen_cfg_tbl$ps_dtype; /* Pointer to TYPE string (ASCIZ) */ char *iogen_cfg_tbl$ps_boot_class; /* Boot class name (ASCIZ) */ __union { unsigned int iogen_cfg_tbl$l_boot_flags; /* Boot flag word */ __struct { /* Boot flag bits */ unsigned iogen_cfg_tbl$v_sys_dev : 1; /* Device can be a system disk */ unsigned iogen_cfg_tbl$v_remote : 1; /* Remote */ unsigned iogen_cfg_tbl$v_alt_prefix : 1; /* Alternate prefix */ unsigned iogen_cfg_tbl$v_no_ctrl_ltr : 1; /* Don't assign controller letter */ unsigned iogen_cfg_tbl$v_hw_ctrl_ltr : 1; /* Needs same controller letter */ unsigned iogen_cfg_tbl$v_unit_0 : 1; /* Unit 0 */ unsigned iogen_cfg_tbl$v_ctrl_ltr_a : 1; /* Device must be unique */ unsigned iogen_cfg_tbl$v_create_dev : 1; /* Must create new device */ } iogen_cfg_tbl$r_b_flag_bits; } iogen_cfg_tbl$r_b_flags; char *iogen_cfg_tbl$ps_private; /* For extensions (ASCIZ) */ int iogen_cfg_tbl$l_avail; /* Available for extensions */ int iogen_cfg_tbl$l_avail2; /* Available for extensions */ char iogen_cfg_tbl$b_fill_1_ [4]; } IOGEN_CFG_TBL; #if !defined(__VAXC) #define iogen_cfg_tbl$l_hw_id_lo iogen_cfg_tbl$r_id_union.iogen_cfg_tbl$r_hw_id.iogen_cfg_tbl$l_hw_id_lo #define iogen_cfg_tbl$l_hw_id_hi iogen_cfg_tbl$r_id_union.iogen_cfg_tbl$r_hw_id.iogen_cfg_tbl$l_hw_id_hi #define iogen_cfg_tbl$q_hw_id iogen_cfg_tbl$r_id_union.iogen_cfg_tbl$q_hw_id #define iogen_cfg_tbl$b_hw_id_string iogen_cfg_tbl$r_id_union.iogen_cfg_tbl$b_hw_id_string #define iogen_cfg_tbl$l_flags iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$l_flags #define iogen_cfg_tbl$v_mscp iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_mscp #define iogen_cfg_tbl$v_scsi iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_scsi #define iogen_cfg_tbl$v_novector iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_novector #define iogen_cfg_tbl$v_disk iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_disk #define iogen_cfg_tbl$v_network iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_network #define iogen_cfg_tbl$v_port iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_port #define iogen_cfg_tbl$v_class iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_class #define iogen_cfg_tbl$v_pseudo iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_pseudo #define iogen_cfg_tbl$v_boot iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_boot #define iogen_cfg_tbl$v_case_blind iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_case_blind #define iogen_cfg_tbl$v_no_table iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_no_table #define iogen_cfg_tbl$v_extended_id iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_extended_id #define iogen_cfg_tbl$v_foreign iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_foreign #define iogen_cfg_tbl$v_fibre iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_fibre #define iogen_cfg_tbl$v_ulp iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_ulp #define iogen_cfg_tbl$v_load_drv_class iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_load_drv_class #define iogen_cfg_tbl$v_nisca iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_nisca #define iogen_cfg_tbl$v_isa_on_eisa iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_isa_on_eisa #define iogen_cfg_tbl$v_ciss iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_ciss #define iogen_cfg_tbl$v_sas iogen_cfg_tbl$r_c_flags.iogen_cfg_tbl$r_c_flag_bits.iogen_cfg_tbl$v_sas #define iogen_cfg_tbl$l_boot_flags iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$l_boot_flags #define iogen_cfg_tbl$v_sys_dev iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_sys_dev #define iogen_cfg_tbl$v_remote iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_remote #define iogen_cfg_tbl$v_alt_prefix iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_alt_prefix #define iogen_cfg_tbl$v_no_ctrl_ltr iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_no_ctrl_ltr #define iogen_cfg_tbl$v_hw_ctrl_ltr iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_hw_ctrl_ltr #define iogen_cfg_tbl$v_unit_0 iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_unit_0 #define iogen_cfg_tbl$v_ctrl_ltr_a iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_ctrl_ltr_a #define iogen_cfg_tbl$v_create_dev iogen_cfg_tbl$r_b_flags.iogen_cfg_tbl$r_b_flag_bits.iogen_cfg_tbl$v_create_dev #endif /* #if !defined(__VAXC) */ #define IOGEN_CFG_TBL$K_ENTRY_SIZE 72 /* Length of the entry */ /* */ /* The config_table structure is the union of both the hw id mask, */ /* and the config table (iogen_cfg_tbl). This structure is pointed */ /* to by ADP$PS_CONFIG_TABLE. A memory descriptor for it exists at */ /* a negative offset. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __longword #else #pragma __nomember_alignment #endif typedef struct _config_table { #pragma __nomember_alignment CONFIG_HEADER config_table$r_header; /* Hardware ID mask header */ IOGEN_CFG_TBL config_table$r_entries; /* Configuration entry array starts here */ } CONFIG_TABLE; /* */ /* The config_mem structure contains the memory prefix description. Normally */ /* this is only use by the allocation and deallocation routines, and the table */ /* consumers see only the config_table or iogen_cfg_tbl structures. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __longword #else #pragma __nomember_alignment #endif typedef struct _config_mem { #pragma __nomember_alignment CONFIG_MEMDSC config_mem$r_memdsc; /* Memory descriptor */ CONFIG_HEADER config_mem$r_header; /* Hardware ID mask prefix */ IOGEN_CFG_TBL config_mem$r_entries; /* Configuration array */ } CONFIG_MEM; #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __CONFIG_TABLE_LOADED */