/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:26:42 by OpenVMS SDL EV3-3 */ /* Source: 06-MAY-2008 15:10:09 $1$DGA7274:[LIB_H.SRC]CFGDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE CFGDEF ***/ #ifndef __CFGDEF_LOADED #define __CFGDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_names { #pragma __nomember_alignment __int64 cfg$iq_bits; /* Value of name */ char *cfg$ps_name; /* Pointer to name string */ char cfg$b_fill_0_ [4]; } CFG_NAMES; /* * Always include ints.h */ #include /* * Some handy macros for turning a handle into an address, * and an address into a handle */ #define _CFG_MAKE_ADDRESS(_cfg_o) ((CFG_NODE *)((char *) CFG_POINTER_TO_ROOT + _cfg_o)); #define _CFG_MAKE_HANDLE(_cfg_a) ((char *) _cfg_a - (char *) CFG_POINTER_TO_ROOT); #define CFG$K_GALAXY_ID_LENGTH 16 /* */ /* typedef the ID and HANDLE */ /* */ typedef unsigned __int64 CFG_ID; typedef __int64 CFG_HANDLE; /* */ /* Version 6.0 for Alpha Systems (forever) */ /* */ #define CFG$K_REVISION_MAJOR 6 #define CFG$K_REVISION_MINOR 0 /* */ /* Success codes */ /* */ #define CFG$K_SUCCESS 1 #define CFG$K_NOSTATUS 0 /* */ /* Error codes. All negative, all even (low bit clear) */ /* This allows BLISS tests for errors on the low bit to */ /* work correctly... even though they are not VMS error */ /* codes. */ /* */ #define CFG$K_BADPARAM -2 /* Bad parameter in call */ #define CFG$K_ILLEGAL -4 /* Operation is illegal */ #define CFG$K_NOTFOUND -6 /* Lookup failed */ #define CFG$K_BADALIGN -8 /* Bad PA alignment */ #define CFG$K_BADALLOC -10 /* Invalid size increment */ #define CFG$K_OVERLAP -12 /* Fragment overlaps with existing */ #define CFG$K_NOTINITIALIZED -14 /* Tree not initialized */ #define CFG$K_BADHANDLE -16 /* Illegal HANDLE */ #define CFG$K_NOTDELETED -18 /* Node was not deleted */ #define CFG$K_MAXEXCEEDED -20 /* Too many memory fragments */ #define CFG$K_NOTALLOWED -22 /* Operation is not allowed */ #define CFG$K_BADOWNER -24 /* Node does not have the right owner */ #define CFG$K_NOTDONE -26 /* Assync callback has not yet finished */ #define CFG$K_NOTPARTITION -28 /* The node is not a partition */ #define CFG$K_NOTCOMMUNITY -30 /* The node is not a community */ #define CFG$K_ILLEGALTREE -32 /* Corrupt tree state */ #define CFG$K_NOTHARDWARE -34 /* The node is not a hardware component */ #define CFG$K_NOMEMORY -36 /* Failed to allocate the node */ #define CFG$K_BADPFN -38 /* PFN is not in the memory system */ #define CFG$K_BADCOUNT -40 /* Fragment count is not valid */ #define CFG$K_TREELOCKED -42 /* Attempt to lock a locked tree */ #define CFG$K_BADUPDATELEVEL -44 /* Illegal update level input */ #define CFG$K_NOTMEMORYDESC -46 /* Not a memory descriptor node */ #define CFG$K_NOTLOCKED -48 /* Tried to unlock an unlocked tree */ #define CFG$K_UNAVAILABLE -50 /* Node is not available */ #define CFG$K_STILLACTIVE -52 /* HW Component is still active */ #define CFG$K_CHILDSTILLACTIVE -54 /* A component part of HW is still active */ #define CFG$K_CHILDALREADYOWNED -56 /* A child is owned internal error */ #define CFG$K_NOTSHARED -58 /* Can't assign because an ancestor is not shared */ #define CFG$K_TREEBEINGUPDATED -60 /* Update in progress */ #define CFG$K_BADTREEINTEGRITY -62 /* Tree corruption detected */ #define CFG$K_NOTHARDPARTITION -64 /* The node is not a hard partition */ #define CFG$K_NOTIMPLEMENTED -66 /* A callback which is not yet implemented */ #define CFG$K_ALREADYOWNED -68 /* Node already has an owner */ #define CFG$K_CHANGECOLLISION -70 /* Node change_counter does not match */ #define CFG$K_NOTSOFTWARE -72 /* Node is not a software node */ #define CFG$K_NO_TREE_CHANGE -74 /* Tree was not changed */ #define CFG$K_WRONG_SPEED -76 /* Incompatible operating speed */ #define CFG$K_WRONG_MODE -78 /* Incompatible operating mode */ #define CFG$K_POWER_BUDGET_EXCEEDED -80 /* Scotty, I need more power! */ #define CFG$K_MEMORY_SPACE_EXCEEDED -82 /* PCI Memory Exceeded */ #define CFG$K_IO_SPACE_EXCEEDED -84 /* PCI IO Space Exceeded */ #define CFG$K_CONSOLE_REJECTED_CHANGE -86 /* Console rejected hot-plug operation */ #define CFG$K_POWER_FAULT -88 /* Device Power Fault */ #define CFG$K_PHPC_FAULT -90 /* Hot-plug controller fault */ #define CFG$K_ACCEPTREJECT -92 /* Flags deny resource assignment */ /* */ /* Node TYPE codes */ /* */ #define CFG$K_NODE_ROOT 1 /* Root node */ #define CFG$K_NODE_HW_ROOT 2 /* Hardware Root */ #define CFG$K_NODE_SW_ROOT 3 /* Software Root */ #define CFG$K_NODE_TEMPLATE_ROOT 4 /* Template Root */ #define CFG$K_NODE_COMMUNITY 5 /* Community */ #define CFG$K_NODE_PARTITION 6 /* Partition */ #define CFG$K_NODE_SBB 7 /* System Building Block */ #define CFG$K_NODE_PSEUDO 8 /* Pseudo device */ #define CFG$K_NODE_CPU 9 /* CPU */ #define CFG$K_NODE_MEMORY_SUB 10 /* Memory Subsystem */ #define CFG$K_NODE_MEMORY_DESC 11 /* Memory Description */ #define CFG$K_NODE_MEMORY_CTRL 12 /* Memory Controller */ #define CFG$K_NODE_IOP 13 /* IO Processor */ #define CFG$K_NODE_HOSE 14 /* IO Hose */ #define CFG$K_NODE_BUS 15 /* Option Bus */ #define CFG$K_NODE_IO_CTRL 16 /* IO Controller */ #define CFG$K_NODE_SLOT 17 /* Option slot */ #define CFG$K_NODE_CPU_MODULE 18 /* CPU module board */ #define CFG$K_NODE_POWER_ENVIR 19 /* Power Environmental */ #define CFG$K_NODE_FRU_ROOT 20 /* FRU Root */ #define CFG$K_NODE_FRU_DESC 21 /* FRU Descripter */ #define CFG$K_NODE_SMB 22 /* System Mother Board */ #define CFG$K_NODE_CAB 23 /* Cabinet */ #define CFG$K_NODE_CHASSIS 24 /* System Chassis */ #define CFG$K_NODE_EXP_CHASSIS 25 /* Expander Chassis */ #define CFG$K_NODE_SYS_INTER_SWITCH 26 /* System Interconnect Switch */ #define CFG$K_NODE_HARD_PARTITION 27 /* Hard partition (firewall) */ #define CFG$K_NODE_RISER 28 /* IO Riser Module */ #define CFG$K_NODE_SOC 29 /* System Ona Chip */ #define CFG$K_NODE_SOCKET 30 /* Processor Socket */ #define CFG$K_NODE_CORE 31 /* Processor Core */ #define CFG$K_NODE_THREAD 32 /* Processor Thread */ #define CFG$K_NODE_LAST 33 /* Always Last */ /* */ /* Routine index values for console callbacks */ /* */ #define CFG$K_READ_LOCK 1 /* Take out a read lock */ #define CFG$K_READ_UNLOCK 2 /* Release the read lock */ #define CFG$K_SET_NODE_FLAGS 3 /* Set bits a node's flags */ #define CFG$K_CLEAR_NODE_FLAGS 4 /* Clear bits in a node's flags */ #define CFG$K_ASSIGN_DESCRIPTOR 5 /* Assign a memory descriptor */ #define CFG$K_UPDATE_TREE 6 /* Update configuration tree */ #define CFG$K_CREATE_COMMUNITY 7 /* Create a community node */ #define CFG$K_DELETE_COMMUNITY 8 /* Delete a community */ #define CFG$K_CREATE_PARTITION 9 /* Create a partition node */ #define CFG$K_DELETE_PARTITION 10 /* Delete a partition */ #define CFG$K_ASSIGN_HW 11 /* Assign HW to a community or partition */ #define CFG$K_UPDATE_OS_USAGE 12 /* Update OS-specific field */ #define CFG$K_FIND_PARTITION 13 /* Find Partition */ #define CFG$K_FIND_NODE 14 /* Search for a component */ #define CFG$K_GET_TEXT 15 /* Get a text string */ #define CFG$K_UPDATE_GMDB 16 /* Update GMDB area in community */ #define CFG$K_VALIDATE_PARTITION 17 /* Validate a partition */ #define CFG$K_INITIALIZE_PARTITION 18 /* Initialize a partition */ #define CFG$K_UPDATE_GALAXY_ID 19 /* Update the Galaxy ID */ #define CFG$K_GET_MAX_PARTITION 20 /* RETAINED BUT NO LONGER USED */ #define CFG$K_UPDATE_INSTANCE_NAME 21 /* Read/Write Instance Name */ #define CFG$K_SAVE_CONFIG 22 /* Save Configuration */ #define CFG$K_GET_SENSOR_INFO 23 /* Get sensor information */ #define CFG$K_CREATE_HARD_PARTITION 24 /* Create a hard partition */ #define CFG$K_DELETE_HARD_PARTITION 25 /* DELETE a hard partition */ #define CFG$K_POWER_HW 26 /* Power Management Control */ #define CFG$K_UPDATE_TESTED_PFNS 27 /* Update tested PFN field */ #define CFG$K_SET_ERROR_TARGET 28 /* Declare the new error target */ #define CFG$K_CLEAR_CB_STATE 29 /* Clear callback state */ #define CFG$K_GET_AVAIL_HW 30 /* Get available hardware information */ #define CFG$K_UPDATE_NODE 31 /* Update all environmental sensor data */ /* */ /* Routine argument values for SET/CLEAR_NODE_FLAGS callback */ /* */ #define CFG$K_NODE_FLAGS 0 /* Operate on node flags */ #define CFG$K_PART_FLAGS 1 /* Operate on partition flags */ #define CFG$K_COMM_FLAGS 2 /* Operate on community flags */ #define CFG$K_HARD_FLAGS 3 /* Operate on hard partition flags */ #define CFG$K_ROOT_FLAGS 4 /* Operate on root node flags */ /* */ /* Routine argument mask bits for ASSIGN_HW callback */ /* */ #define CFG$M_ALL_DESCENDANTS 1 #define CFG$M_ASSIGN_POWER_UP 2 #define CFG$M_ASSIGN_POWER_DOWN 4 #define CFG$M_IGNORE_COUNTER 8 /* Synonyms for UP and DOWN */ #define CFG$M_ASSIGN_POWER_ON 2 #define CFG$M_ASSIGN_POWER_OFF 4 /* */ /* Routine argument mask bits for UPDATE_OS_USAGE callback */ /* */ #define CFG$M_NO_TREE_CHANGE 0 /* */ /* Routine argument mask values for SAVE_CONFIG callback */ /* Note the longer prefix. This was required to resolve duplicate */ /* defs of ALL_DESCENDANTS */ /* */ #define CFG$M_CURRENT_OWNER 1 #define CFG$M_SAVE_DESCENDANTS 2 /* */ /* Routine argument values for POWER_HW callback */ /* */ #define CFG$K_POWER_HW_DOWN 0 #define CFG$K_POWER_HW_UP 1 /* Synonyms for DOWN and UP */ #define CFG$K_POWER_HW_OFF 0 #define CFG$K_POWER_HW_ON 1 /* */ /* Node subtype codes */ /* */ #define CFG$K_SNODE_UNKNOWN 0 /* Unknown subtype */ /* CPU codes */ #define CFG$K_SNODE_CPU_NOPRIMARY 1 /* A CPU not capable of being a primary */ /* Bus codes */ #define CFG$K_SNODE_PCI 2 /* Peripheral Component Interconnect */ #define CFG$K_SNODE_EISA 3 /* Extended ISA bus */ #define CFG$K_SNODE_ISA 4 /* Industry Standard Architecture bus */ #define CFG$K_SNODE_XMI 5 /* XMI bus */ #define CFG$K_SNODE_FBUS 6 /* FutureBus */ #define CFG$K_SNODE_XBUS 7 /* Built in device bus */ #define CFG$K_SNODE_USB 8 /* Univeral Serial Bus */ /* IO controller codes */ #define CFG$K_SNODE_SERIAL_PORT 9 /* Serial port */ #define CFG$K_SNODE_FLOPPY 10 /* Standard Floppy */ #define CFG$K_SNODE_PARALLEL_PORT 11 /* Parallel port */ #define CFG$K_SNODE_SCSI 12 /* SCSI Controller */ #define CFG$K_SNODE_IDE 13 /* IDE Controller */ #define CFG$K_SNODE_NI 14 /* Ethernet Controller */ #define CFG$K_SNODE_FDDI 15 /* FDDI */ #define CFG$K_SNODE_TOKEN_RING 16 /* Token Ring */ #define CFG$K_SNODE_NI_SCSI 17 /* Combo card */ #define CFG$K_SNODE_GRAPHICS 18 /* Graphics Controller */ #define CFG$K_SNODE_ATM 19 /* ATM Controller */ #define CFG$K_SNODE_MEM_CHAN 20 /* Memory Channel */ #define CFG$K_SNODE_CI 21 /* CI adapter */ #define CFG$K_SNODE_1394 22 /* */ #define CFG$K_SNODE_AGP 23 /* AGP (Graphics Port) */ #define CFG$K_SNODE_SUPER_HIPPI 24 /* Super Hippi */ #define CFG$K_SNODE_FIBRECHANNEL 25 /* Fibrechannel */ #define CFG$K_SNODE_CAB 26 /* Cabinet */ #define CFG$K_SNODE_CHASSIS 27 /* System Chassis */ #define CFG$K_SNODE_EXP_CHASSIS 28 /* Expander Chassis */ #define CFG$K_SNODE_POWER_SUPPLY 29 /* Power Envir - Power Supply */ #define CFG$K_SNODE_COOLING 30 /* Power Envir - Cooling */ #define CFG$K_SNODE_SIMM 31 /* SIMM memory card */ #define CFG$K_SNODE_DIMM 32 /* DIMM memory card */ #define CFG$K_SNODE_RIMM 33 /* RIMM memory card */ #define CFG$K_SNODE_CPU_MODULE 34 #define CFG$K_SNODE_CPU_CACHE_MODULE 35 #define CFG$K_SNODE_CPU_MEMORY_MODULE 36 #define CFG$K_SNODE_MEM_CARRIER_MODULE 37 #define CFG$K_SNODE_BACKPLANE_ASSY 38 #define CFG$K_SNODE_MOTHER_BOARD 39 #define CFG$K_SNODE_FAN 40 #define CFG$K_SNODE_SYS_INTERCONN_PORT 41 #define CFG$K_SNODE_SYS_INTERCONN_SW 42 #define CFG$K_SNODE_MEM_COHERE_MODULE 43 #define CFG$K_SNODE_IO_PORT_MODULE 44 #define CFG$K_SNODE_REMOTE_MGNT_MODULE 45 #define CFG$K_SNODE_PWR_ENV_CTRL_MODULE 46 #define CFG$K_SNODE_MULTI_DEVICE 47 #define CFG$K_SNODE_IO_EXP_CAB 48 #define CFG$K_SNODE_EXPANSION_CAB 49 #define CFG$K_RESERVED1 50 #define CFG$K_SNODE_DAUGHTER_CARD 51 #define CFG$K_SNODE_RISER_CARD 52 #define CFG$K_SNODE_CPU_FAN 53 #define CFG$K_SNODE_MASTER_CLOCK 54 /* Master Clock Module */ #define CFG$K_SNODE_CLOCK_DIST 55 /* Clock splitter/distribution module */ #define CFG$K_SNODE_POWER_SUB_RACK 56 /* Start of Marvel Specific Snodes */ #define CFG$K_SNODE_OCP 57 #define CFG$K_SNODE_SYSTEM_CABINET 58 #define CFG$K_SNODE_VOLTAGE_REG_MODULE 59 #define CFG$K_SNODE_CPU_CHIP 60 #define CFG$K_SNODE_IO_EXPANSION_DRAWER 61 #define CFG$K_SNODE_SYSTEM_DRAWER 62 #define CFG$K_SNODE_PCI_X 63 #define CFG$K_SNODE_IO_EXP_ASSEMBLY 64 /* End of Marvel Specific Snodes */ #define CFG$K_SNODE_KEYBD_MOUSE 65 #define CFG$K_SNODE_LAST 66 /* Highest */ /* */ /* Lookup flags */ /* */ #define CFG$M_FIND_ANY 0 #define CFG$M_FIND_BY_OWNER 1 #define CFG$M_FIND_BY_TYPE 2 #define CFG$M_FIND_BY_SUBTYPE 4 #define CFG$M_FIND_BY_ID 8 #define CFG$M_FIND_UNAVAILABLE 16 /* */ /* Lock types */ /* */ #define CFG$K_LOCK_FOR_READ 1 /* Just want to read the tree */ #define CFG$K_LOCK_FOR_UPDATE 2 /* Want to update the tree */ #define CFG$K_UNLOCK_READ 3 /* Unlock a read */ #define CFG$K_UNLOCK_UPDATE 4 /* Unlock an update */ #define CFG$K_UNLOCK_NO_UPDATE 5 /* Unlock an update lock with no update */ /* */ /* Magic */ /* */ #define CFG$K_NODE_VALID 1498958919 /* */ /* OS types */ /* */ #define CFG$K_OS_VMS 1 /* OS is VMS on Partition */ #define CFG$K_OS_OSF 2 /* OS is OSF (aka Tru64) on Partition */ #define CFG$K_OS_NT 3 /* OS is NT on Partition */ #define CFG$K_OS_LINUX 4 /* OS is Linux on Partition */ #define CFG$K_OS_LAST 5 /* Always last */ /* */ /* Values for text lookups */ /* */ #define CFG$K_NAME_IS_PRETTY 256 /* Return plain text */ #define CFG$K_NAME_IS_FLAG 512 /* Input is flags */ #define CFG$K_FLAG_NAMES 512 /* Decode CFG$q_node_flags */ #define CFG$K_MEM_FLAG_NAMES 513 /* Decode mem_flags */ #define CFG$K_SUBTYPE_NAMES 2 /* Decode Subtypes */ #define CFG$K_TYPE_NAMES 3 /* Decode Types */ #define CFG$K_OS_NAMES 4 /* Decode OS name */ #define CFG$K_ERROR_TEXT 5 /* Decode Error value */ #define CFG$K_RTN_NAMES 6 /* Callback routine names */ #define CFG$K_LOCK_TYPES 7 /* Lock types for calls */ /* */ /* Define the CFG_NODE structure */ /* */ #define CFG$M_NODE_HARDWARE 0x1 #define CFG$M_NODE_HOTSWAP 0x2 #define CFG$M_NODE_UNAVAILABLE 0x4 #define CFG$M_NODE_HW_TEMPLATE 0x8 #define CFG$M_NODE_INITIALIZED 0x10 #define CFG$M_NODE_CPU_PRIMARY 0x20 #define CFG$M_NODE_IN_CONSOLE 0x40 #define CFG$M_NODE_PWR_DOWN 0x80 #define CFG$M_NODE_PWR_CTRL_POINT 0x100 #define CFG$M_NODE_PRESENT 0x200 #define CFG$M_NODE_REASSIGNABLE 0x400 #define CFG$M_NODE_HARD_PARTITIONED 0x800 #define CFG$M_NODE_DISABLED 0x1000 #define CFG$M_NODE_UPDATING 0x2000 #define CFG$M_NODE_UNHEALTHY 0x4000 #define CFG$M_NODE_ATTENTION 0x8000 #define CFG$M_NODE_INS_EXT 0x10000 #define CFG$M_NODE_DECON_PEND 0x20000 #define CFG$M_NODE_INDICTED 0x40000 #define CFG$M_NODE_19_31 0xFFF80000 #define CFG$M_NODE_32_63 0xFFFFFFFF00000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_node { #pragma __nomember_alignment unsigned char cfg$b_type; /* Node type */ unsigned char cfg$b_subtype; /* Type-specific subtype */ unsigned short int cfg$w_size; /* Size of node */ unsigned int cfg$il_hd_extension; /* Header Extension offset */ __union { /* These two quadwords pertain to all nodes except the root node */ __struct { CFG_HANDLE cfg$iq_owner; /* Software owner of node */ CFG_HANDLE cfg$iq_current_owner; /* Active user of the node (not used in the root node) */ } cfg$r_node_overlay_fields; /* These two quadwords are only defined for the root node */ __struct { unsigned int cfg$il_buffer_size; /* Size of entire config tree in bytes */ __union { unsigned int cfg$il_rev_full; /* Structure revision of node (entire */ __struct { /* config tree if root node) */ unsigned short int cfg$iw_rev_major; /* Major revision */ unsigned short int cfg$iw_rev_minor; /* Minor revision */ } cfg$r_rev_sub; } cfg$r_revision; __int64 cfg$iq_reserved1; /* Reserved for future use in the root node only, MBZ */ } cfg$r_root_overlay_fields; } cfg$r_root_overlay; __union { CFG_ID cfg$iq_cfg_id64; /*Reference the entire 64-bit structure */ __struct { unsigned cfg$v_node_id_root : 8; unsigned cfg$v_node_id_root_08_15 : 8; unsigned cfg$v_node_id_root_16_31 : 16; unsigned cfg$v_node_id_root_32_63 : 32; } cfg$_cfg_node_id_root; __struct { unsigned cfg$v_node_id_hw_root : 8; unsigned cfg$v_node_id_hw_root_08_15 : 8; unsigned cfg$v_node_id_hw_root_16_31 : 16; unsigned cfg$v_node_id_hw_root_32_63 : 32; } cfg$_cfg_node_id_hw_root; __struct { unsigned cfg$v_node_id_sw_root : 8; unsigned cfg$v_node_id_sw_root_08_15 : 8; unsigned cfg$v_node_id_sw_root_16_31 : 16; unsigned cfg$v_node_id_sw_root_32_63 : 32; } cfg$_cfg_node_id_sw_root; __struct { unsigned cfg$v_node_id_tmplt_root : 8; unsigned cfg$v_node_id_tmplt_root_08_15 : 8; unsigned cfg$v_node_id_tmplt_root_16_31 : 16; unsigned cfg$v_node_id_tmplt_root_32_63 : 32; } cfg$_cfg_node_id_template_root; __struct { unsigned cfg$v_node_id_comm_id : 16; unsigned cfg$v_node_id_comm_16_31 : 16; unsigned cfg$v_node_id_comm_32_63 : 32; } cfg$_cfg_node_id_community; __struct { unsigned cfg$v_node_id_part_id : 16; unsigned cfg$v_node_id_part_16_31 : 16; unsigned cfg$v_node_id_part_32_63 : 32; } cfg$_cfg_node_id_partition; __struct { unsigned cfg$v_node_id_sbb_0_31 : 32; unsigned cfg$v_node_id_sbb_hsbb : 8; unsigned cfg$v_node_id_sbb_40_47 : 8; unsigned cfg$v_node_id_sbb_sbb : 8; unsigned cfg$v_node_id_sbb_56_63 : 8; } cfg$_cfg_node_id_sbb; __struct { unsigned cfg$v_node_id_pseudo_num : 16; unsigned cfg$v_node_id_pseudo_16_31 : 16; unsigned cfg$v_node_id_pseudo_32_63 : 32; } cfg$_cfg_node_id_pseudo; __struct { unsigned cfg$v_node_id_cpu_cpu : 16; unsigned cfg$v_node_id_cpu_16_23 : 8; unsigned cfg$v_node_id_cpu_revcnt : 8; unsigned cfg$v_node_id_cpu_hsbb : 8; unsigned cfg$v_node_id_cpu_smb : 8; unsigned cfg$v_node_id_cpu_sbb : 8; unsigned cfg$v_node_id_cpu_56_63 : 8; } cfg$_cfg_node_id_cpu; __struct { unsigned cfg$v_node_id_mem_sub_memsub : 8; unsigned cfg$v_node_id_mem_sub_8_31 : 24; unsigned cfg$v_node_id_mem_sub_hsbb : 8; unsigned cfg$v_node_id_mem_sub_smb : 8; unsigned cfg$v_node_id_mem_sub_sbb : 8; unsigned cfg$v_node_id_mem_sub_56_63 : 8; } cfg$_cfg_node_id_mem_sub; __struct { unsigned cfg$v_node_id_mem_desc_memdesc : 16; unsigned cfg$v_node_id_mem_desc_memsub : 8; unsigned cfg$v_node_id_mem_desc_24_31 : 8; unsigned cfg$v_node_id_mem_desc_hsbb : 8; unsigned cfg$v_node_id_mem_desc_smb : 8; unsigned cfg$v_node_id_mem_desc_sbb : 8; unsigned cfg$v_node_id_mem_desc_56_63 : 8; } cfg$_cfg_node_id_mem_desc; __struct { unsigned cfg$v_node_id_mem_ctrl_memctrl : 16; unsigned cfg$v_node_id_mem_ctrl_memsub : 8; unsigned cfg$v_node_id_mem_ctrl_24_31 : 8; unsigned cfg$v_node_id_mem_ctrl_hsbb : 8; unsigned cfg$v_node_id_mem_ctrl_smb : 8; unsigned cfg$v_node_id_mem_ctrl_sbb : 8; unsigned cfg$v_node_id_mem_ctrl_56_63 : 8; } cfg$_cfg_node_id_mem_ctrl; __struct { unsigned cfg$v_node_id_iop_iop : 8; unsigned cfg$v_node_id_iop_8_31 : 24; unsigned cfg$v_node_id_iop_hsbb : 8; unsigned cfg$v_node_id_iop_smb : 8; unsigned cfg$v_node_id_iop_sbb : 8; unsigned cfg$v_node_id_iop_56_63 : 8; } cfg$_cfg_node_id_iop; __struct { unsigned cfg$v_node_id_hose_hose : 8; unsigned cfg$v_node_id_hose_iop : 8; unsigned cfg$v_node_id_hose_24_31 : 16; unsigned cfg$v_node_id_hose_hsbb : 8; unsigned cfg$v_node_id_hose_smb : 8; unsigned cfg$v_node_id_hose_sbb : 8; unsigned cfg$v_node_id_hose_56_63 : 8; } cfg$_cfg_node_id_hose; __struct { unsigned cfg$v_node_id_bus_bus : 8; unsigned cfg$v_node_id_bus_hose : 8; unsigned cfg$v_node_id_bus_iop : 8; unsigned cfg$v_node_id_bus_24_31 : 8; unsigned cfg$v_node_id_bus_hsbb : 8; unsigned cfg$v_node_id_bus_smb : 8; unsigned cfg$v_node_id_bus_sbb : 8; unsigned cfg$v_node_id_bus_56_63 : 8; } cfg$_cfg_node_id_bus; __struct { unsigned cfg$v_node_id_io_ctrl_ctrlr : 8; unsigned cfg$v_node_id_io_ctrl_bus : 8; unsigned cfg$v_node_id_io_ctrl_hose : 8; unsigned cfg$v_node_id_io_ctrl_iop : 8; unsigned cfg$v_node_id_io_ctrl_hsbb : 8; unsigned cfg$v_node_id_io_ctrl_smb : 8; unsigned cfg$v_node_id_io_ctrl_sbb : 8; unsigned cfg$v_node_id_io_ctrl_56_63 : 8; } cfg$_cfg_node_id_io_ctrl; __struct { unsigned cfg$v_node_id_slot_slot : 8; unsigned cfg$v_node_id_slot_bus : 8; unsigned cfg$v_node_id_slot_hose : 8; unsigned cfg$v_node_id_slot_iop : 8; unsigned cfg$v_node_id_slot_hsbb : 8; unsigned cfg$v_node_id_slot_smb : 8; unsigned cfg$v_node_id_slot_sbb : 8; unsigned cfg$v_node_id_slot_56_63 : 8; } cfg$_cfg_node_id_slot; __struct { unsigned cfg$v_node_id_cpu_mod : 8; unsigned cfg$v_node_id_cpu_mod_16_31 : 24; unsigned cfg$v_node_id_cpu_mod_hsbb : 8; unsigned cfg$v_node_id_cpu_mod_smb : 8; unsigned cfg$v_node_id_cpu_mod_sbb : 8; unsigned cfg$v_node_id_cpu_mod_56_63 : 8; } cfg$_cfg_node_id_cpu_module; __struct { unsigned cfg$v_node_id_power_env_pe_num : 16; unsigned cfg$v_node_id_power_env_16_23 : 8; unsigned cfg$v_node_id_power_env_cab : 8; unsigned cfg$v_node_id_power_env_hsbb : 8; unsigned cfg$v_node_id_power_env_smb : 8; unsigned cfg$v_node_id_power_env_sbb : 8; unsigned cfg$v_node_id_power_env_chassis : 8; } cfg$_cfg_node_id_power_env; __struct { unsigned cfg$v_node_id_fru_root_site_loc : 8; unsigned cfg$v_node_id_fru_root_cab_id : 8; unsigned cfg$v_node_id_fru_root_position : 8; unsigned cfg$v_node_id_fru_root_chassis : 8; unsigned cfg$v_node_id_fru_root_assembly : 8; unsigned cfg$v_node_id_fru_root_subassem : 8; unsigned cfg$v_node_id_fru_root_slot : 16; } cfg$_cfg_node_id_fru_root; __struct { unsigned cfg$v_node_id_fru_desc_site_loc : 8; unsigned cfg$v_node_id_fru_desc_cab_id : 8; unsigned cfg$v_node_id_fru_desc_position : 8; unsigned cfg$v_node_id_fru_desc_chassis : 8; unsigned cfg$v_node_id_fru_desc_assembly : 8; unsigned cfg$v_node_id_fru_desc_subassem : 8; unsigned cfg$v_node_id_fru_desc_slot : 16; } cfg$_cfg_node_id_fru_desc; __struct { unsigned cfg$v_node_id_smb_0_31 : 32; unsigned cfg$v_node_id_smb_hsbb : 8; unsigned cfg$v_node_id_smb_smb : 8; unsigned cfg$v_node_id_smb_sbb : 8; unsigned cfg$v_node_id_smb_56_63 : 8; } cfg$_cfg_node_id_smb; __struct { unsigned cfg$v_node_id_cab : 8; unsigned cfg$v_node_id_cab_08_15 : 8; unsigned cfg$v_node_id_cab_16_31 : 16; unsigned cfg$v_node_id_cab_32_63 : 32; } cfg$_cfg_node_id_cab; __struct { unsigned cfg$v_node_id_chassis : 8; unsigned cfg$v_node_id_chassis_08_15 : 8; unsigned cfg$v_node_id_chassis_16_31 : 16; unsigned cfg$v_node_id_chassis_32_63 : 32; } cfg$_cfg_node_id_chassis; __struct { unsigned cfg$v_node_id_exp_chassis : 8; unsigned cfg$v_node_id_exp_chassis_08_15 : 8; unsigned cfg$v_node_id_exp_chassis_16_31 : 16; unsigned cfg$v_node_id_exp_chassis_32_63 : 32; } cfg$_cfg_node_id_exp_chassis; __struct { unsigned cfg$v_node_id_switch_id : 16; unsigned cfg$v_node_id_switch_16_31 : 16; unsigned cfg$v_node_id_switch_hsbb : 8; unsigned cfg$v_node_id_switch_40_63 : 24; } cfg$_cfg_node_id_sys_inter_sw; __struct { unsigned cfg$v_node_id_hard_part : 16; unsigned cfg$v_node_id_hard_part_16_31 : 16; unsigned cfg$v_node_id_hard_part_32_63 : 32; } cfg$_cfg_node_id_hard_part; __struct { unsigned cfg$v_node_id_riser_riser : 8; unsigned cfg$v_node_id_riser_iop : 8; unsigned cfg$v_node_id_riser_16_31 : 16; unsigned cfg$v_node_id_riser_hsbb : 8; unsigned cfg$v_node_id_riser_smb : 8; unsigned cfg$v_node_id_riser_sbb : 8; unsigned cfg$v_node_id_riser_56_63 : 8; } cfg$_cfg_node_id_riser; __struct { unsigned cfg$v_node_id_soc_num : 16; unsigned cfg$v_node_id_soc_16_31 : 16; unsigned cfg$v_node_id_soc_hsbb : 8; unsigned cfg$v_node_id_soc_smb : 8; unsigned cfg$v_node_id_soc_sbb : 8; unsigned cfg$v_node_id_soc_56_63 : 8; } cfg$_cfg_node_id_soc; __struct { unsigned cfg$v_node_id_socket_id : 16; unsigned cfg$v_node_id_socket_16_31 : 16; unsigned cfg$v_node_id_socket_hsbb : 8; unsigned cfg$v_node_id_socket_smb : 8; unsigned cfg$v_node_id_socket_sbb : 8; unsigned cfg$v_node_id_socket_56_63 : 8; } cfg$_cfg_node_id_socket; __struct { unsigned cfg$v_node_id_core_id : 16; unsigned cfg$v_node_id_core_16_31 : 16; unsigned cfg$v_node_id_core_hsbb : 8; unsigned cfg$v_node_id_core_smb : 8; unsigned cfg$v_node_id_core_sbb : 8; unsigned cfg$v_node_id_core_56_63 : 8; } cfg$_cfg_node_id_core; __struct { unsigned cfg$v_node_id_thread_id : 16; unsigned cfg$v_node_id_thread_16_31 : 16; unsigned cfg$v_node_id_thread_hsbb : 8; unsigned cfg$v_node_id_thread_smb : 8; unsigned cfg$v_node_id_thread_sbb : 8; unsigned cfg$v_node_id_thread_56_63 : 8; } cfg$_cfg_node_id_thread; } cfg$r_cfg_id_union; __union { unsigned __int64 cfg$iq_node_flags; /* flags */ __struct { unsigned cfg$v_node_hardware : 1; /* Node represents hardware */ unsigned cfg$v_node_hotswap : 1; /* Hardware can be hotswapped */ unsigned cfg$v_node_unavailable : 1; /* Hardware is not available for use */ unsigned cfg$v_node_hw_template : 1; /* Node is a template device */ unsigned cfg$v_node_initialized : 1; /* Partition is initialized */ unsigned cfg$v_node_cpu_primary : 1; /* CPU is primary */ unsigned cfg$v_node_in_console : 1; /* CPU is in console mode */ unsigned cfg$v_node_pwr_down : 1; /* Hardware is powered down */ unsigned cfg$v_node_pwr_ctrl_point : 1; /* Node controls power down (circ bkr) */ unsigned cfg$v_node_present : 1; /* Node is physically populated */ unsigned cfg$v_node_reassignable : 1; /* Node is reassignable */ unsigned cfg$v_node_hard_partitioned : 1; /* Node is hard partitioned */ unsigned cfg$v_node_disabled : 1; /* Set in HW node if disabled by SW */ unsigned cfg$v_node_updating : 1; /* Set in HW node during changes */ unsigned cfg$v_node_unhealthy : 1; /* Set in HW node if unhealthy, chk diag_flag */ unsigned cfg$v_node_attention : 1; /* Set in HW node if oper add/rem resource */ unsigned cfg$v_node_ins_ext : 1; /* Set in HW node during add/rem */ unsigned cfg$v_node_decon_pend : 1; /* Node has pending deconfigure on reboot */ unsigned cfg$v_node_indicted : 1; /* Node has been indicted at least once this boot */ unsigned cfg$v_node_19_31 : 13; /* Unused bits in first longword */ unsigned cfg$v_node_32_63 : 32; /* Unused bits in second longword */ } cfg$r_flag_bits; } cfg$r_flag_union; unsigned short int cfg$w_rev; /* Revision of this node */ unsigned short int cfg$w_change_counter; /* Change bit */ unsigned int cfg$il_rsvd1; /* Reserved */ CFG_HANDLE cfg$iq_saved_owner; /* Saved Owner configuration */ CFG_HANDLE cfg$iq_affinity; /* Affinity (performance) */ CFG_HANDLE cfg$iq_parent; /* Parent node */ CFG_HANDLE cfg$iq_next_sib; /* Next sibling node */ CFG_HANDLE cfg$iq_prev_sib; /* Previous sibling node */ CFG_HANDLE cfg$iq_child; /* Child node */ unsigned __int64 cfg$iq_fw_usage; /* FW usage */ unsigned __int64 cfg$iq_os_usage; /* OS usage */ __union { unsigned __int64 cfg$iq_fru_id; /* NODE_ID_FRU_DESC structure */ __struct { unsigned cfg$v_fru_id_site_loc : 8; unsigned cfg$v_fru_id_cab_id : 8; unsigned cfg$v_fru_id_position : 8; unsigned cfg$v_fru_id_chassis : 8; unsigned cfg$v_fru_id_assembly : 8; unsigned cfg$v_fru_id_subassem : 8; unsigned cfg$v_fru_id_slot : 16; } cfg$r_fru_id_fields; } cfg$r_fru_id_union; unsigned int cfg$is_checksum; /* Checksum field */ unsigned int cfg$il_magic; /* Valid bits 'GLXY' */ } CFG_NODE; #if !defined(__VAXC) #define cfg$iq_owner cfg$r_root_overlay.cfg$r_node_overlay_fields.cfg$iq_owner #define cfg$iq_current_owner cfg$r_root_overlay.cfg$r_node_overlay_fields.cfg$iq_current_owner #define cfg$il_buffer_size cfg$r_root_overlay.cfg$r_root_overlay_fields.cfg$il_buffer_size #define cfg$r_revision cfg$r_root_overlay.cfg$r_root_overlay_fields.cfg$r_revision #define cfg$il_rev_full cfg$r_revision.cfg$il_rev_full #define cfg$iw_rev_major cfg$r_revision.cfg$r_rev_sub.cfg$iw_rev_major #define cfg$iw_rev_minor cfg$r_revision.cfg$r_rev_sub.cfg$iw_rev_minor #define cfg$iq_reserved1 cfg$r_root_overlay.cfg$r_root_overlay_fields.cfg$iq_reserved1 #define cfg$iq_cfg_id64 cfg$r_cfg_id_union.cfg$iq_cfg_id64 #define cfg$_cfg_node_id_root cfg$r_cfg_id_union.cfg$_cfg_node_id_root #define cfg$v_node_id_root cfg$_cfg_node_id_root.cfg$v_node_id_root #define cfg$_cfg_node_id_hw_root cfg$r_cfg_id_union.cfg$_cfg_node_id_hw_root #define cfg$v_node_id_hw_root cfg$_cfg_node_id_hw_root.cfg$v_node_id_hw_root #define cfg$_cfg_node_id_sw_root cfg$r_cfg_id_union.cfg$_cfg_node_id_sw_root #define cfg$v_node_id_sw_root cfg$_cfg_node_id_sw_root.cfg$v_node_id_sw_root #define cfg$_cfg_node_id_template_root cfg$r_cfg_id_union.cfg$_cfg_node_id_template_root #define cfg$v_node_id_tmplt_root cfg$_cfg_node_id_template_root.cfg$v_node_id_tmplt_root #define cfg$_cfg_node_id_community cfg$r_cfg_id_union.cfg$_cfg_node_id_community #define cfg$v_node_id_comm_id cfg$_cfg_node_id_community.cfg$v_node_id_comm_id #define cfg$_cfg_node_id_partition cfg$r_cfg_id_union.cfg$_cfg_node_id_partition #define cfg$v_node_id_part_id cfg$_cfg_node_id_partition.cfg$v_node_id_part_id #define cfg$_cfg_node_id_sbb cfg$r_cfg_id_union.cfg$_cfg_node_id_sbb #define cfg$v_node_id_sbb_hsbb cfg$_cfg_node_id_sbb.cfg$v_node_id_sbb_hsbb #define cfg$v_node_id_sbb_sbb cfg$_cfg_node_id_sbb.cfg$v_node_id_sbb_sbb #define cfg$_cfg_node_id_pseudo cfg$r_cfg_id_union.cfg$_cfg_node_id_pseudo #define cfg$v_node_id_pseudo_num cfg$_cfg_node_id_pseudo.cfg$v_node_id_pseudo_num #define cfg$_cfg_node_id_cpu cfg$r_cfg_id_union.cfg$_cfg_node_id_cpu #define cfg$v_node_id_cpu_cpu cfg$_cfg_node_id_cpu.cfg$v_node_id_cpu_cpu #define cfg$v_node_id_cpu_revcnt cfg$_cfg_node_id_cpu.cfg$v_node_id_cpu_revcnt #define cfg$v_node_id_cpu_hsbb cfg$_cfg_node_id_cpu.cfg$v_node_id_cpu_hsbb #define cfg$v_node_id_cpu_smb cfg$_cfg_node_id_cpu.cfg$v_node_id_cpu_smb #define cfg$v_node_id_cpu_sbb cfg$_cfg_node_id_cpu.cfg$v_node_id_cpu_sbb #define cfg$_cfg_node_id_mem_sub cfg$r_cfg_id_union.cfg$_cfg_node_id_mem_sub #define cfg$v_node_id_mem_sub_memsub cfg$_cfg_node_id_mem_sub.cfg$v_node_id_mem_sub_memsub #define cfg$v_node_id_mem_sub_hsbb cfg$_cfg_node_id_mem_sub.cfg$v_node_id_mem_sub_hsbb #define cfg$v_node_id_mem_sub_smb cfg$_cfg_node_id_mem_sub.cfg$v_node_id_mem_sub_smb #define cfg$v_node_id_mem_sub_sbb cfg$_cfg_node_id_mem_sub.cfg$v_node_id_mem_sub_sbb #define cfg$_cfg_node_id_mem_desc cfg$r_cfg_id_union.cfg$_cfg_node_id_mem_desc #define cfg$v_node_id_mem_desc_memdesc cfg$_cfg_node_id_mem_desc.cfg$v_node_id_mem_desc_memdesc #define cfg$v_node_id_mem_desc_memsub cfg$_cfg_node_id_mem_desc.cfg$v_node_id_mem_desc_memsub #define cfg$v_node_id_mem_desc_hsbb cfg$_cfg_node_id_mem_desc.cfg$v_node_id_mem_desc_hsbb #define cfg$v_node_id_mem_desc_smb cfg$_cfg_node_id_mem_desc.cfg$v_node_id_mem_desc_smb #define cfg$v_node_id_mem_desc_sbb cfg$_cfg_node_id_mem_desc.cfg$v_node_id_mem_desc_sbb #define cfg$_cfg_node_id_mem_ctrl cfg$r_cfg_id_union.cfg$_cfg_node_id_mem_ctrl #define cfg$v_node_id_mem_ctrl_memctrl cfg$_cfg_node_id_mem_ctrl.cfg$v_node_id_mem_ctrl_memctrl #define cfg$v_node_id_mem_ctrl_memsub cfg$_cfg_node_id_mem_ctrl.cfg$v_node_id_mem_ctrl_memsub #define cfg$v_node_id_mem_ctrl_hsbb cfg$_cfg_node_id_mem_ctrl.cfg$v_node_id_mem_ctrl_hsbb #define cfg$v_node_id_mem_ctrl_smb cfg$_cfg_node_id_mem_ctrl.cfg$v_node_id_mem_ctrl_smb #define cfg$v_node_id_mem_ctrl_sbb cfg$_cfg_node_id_mem_ctrl.cfg$v_node_id_mem_ctrl_sbb #define cfg$_cfg_node_id_iop cfg$r_cfg_id_union.cfg$_cfg_node_id_iop #define cfg$v_node_id_iop_iop cfg$_cfg_node_id_iop.cfg$v_node_id_iop_iop #define cfg$v_node_id_iop_hsbb cfg$_cfg_node_id_iop.cfg$v_node_id_iop_hsbb #define cfg$v_node_id_iop_smb cfg$_cfg_node_id_iop.cfg$v_node_id_iop_smb #define cfg$v_node_id_iop_sbb cfg$_cfg_node_id_iop.cfg$v_node_id_iop_sbb #define cfg$_cfg_node_id_hose cfg$r_cfg_id_union.cfg$_cfg_node_id_hose #define cfg$v_node_id_hose_hose cfg$_cfg_node_id_hose.cfg$v_node_id_hose_hose #define cfg$v_node_id_hose_iop cfg$_cfg_node_id_hose.cfg$v_node_id_hose_iop #define cfg$v_node_id_hose_hsbb cfg$_cfg_node_id_hose.cfg$v_node_id_hose_hsbb #define cfg$v_node_id_hose_smb cfg$_cfg_node_id_hose.cfg$v_node_id_hose_smb #define cfg$v_node_id_hose_sbb cfg$_cfg_node_id_hose.cfg$v_node_id_hose_sbb #define cfg$_cfg_node_id_bus cfg$r_cfg_id_union.cfg$_cfg_node_id_bus #define cfg$v_node_id_bus_bus cfg$_cfg_node_id_bus.cfg$v_node_id_bus_bus #define cfg$v_node_id_bus_hose cfg$_cfg_node_id_bus.cfg$v_node_id_bus_hose #define cfg$v_node_id_bus_iop cfg$_cfg_node_id_bus.cfg$v_node_id_bus_iop #define cfg$v_node_id_bus_hsbb cfg$_cfg_node_id_bus.cfg$v_node_id_bus_hsbb #define cfg$v_node_id_bus_smb cfg$_cfg_node_id_bus.cfg$v_node_id_bus_smb #define cfg$v_node_id_bus_sbb cfg$_cfg_node_id_bus.cfg$v_node_id_bus_sbb #define cfg$_cfg_node_id_io_ctrl cfg$r_cfg_id_union.cfg$_cfg_node_id_io_ctrl #define cfg$v_node_id_io_ctrl_ctrlr cfg$_cfg_node_id_io_ctrl.cfg$v_node_id_io_ctrl_ctrlr #define cfg$v_node_id_io_ctrl_bus cfg$_cfg_node_id_io_ctrl.cfg$v_node_id_io_ctrl_bus #define cfg$v_node_id_io_ctrl_hose cfg$_cfg_node_id_io_ctrl.cfg$v_node_id_io_ctrl_hose #define cfg$v_node_id_io_ctrl_iop cfg$_cfg_node_id_io_ctrl.cfg$v_node_id_io_ctrl_iop #define cfg$v_node_id_io_ctrl_hsbb cfg$_cfg_node_id_io_ctrl.cfg$v_node_id_io_ctrl_hsbb #define cfg$v_node_id_io_ctrl_smb cfg$_cfg_node_id_io_ctrl.cfg$v_node_id_io_ctrl_smb #define cfg$v_node_id_io_ctrl_sbb cfg$_cfg_node_id_io_ctrl.cfg$v_node_id_io_ctrl_sbb #define cfg$_cfg_node_id_slot cfg$r_cfg_id_union.cfg$_cfg_node_id_slot #define cfg$v_node_id_slot_slot cfg$_cfg_node_id_slot.cfg$v_node_id_slot_slot #define cfg$v_node_id_slot_bus cfg$_cfg_node_id_slot.cfg$v_node_id_slot_bus #define cfg$v_node_id_slot_hose cfg$_cfg_node_id_slot.cfg$v_node_id_slot_hose #define cfg$v_node_id_slot_iop cfg$_cfg_node_id_slot.cfg$v_node_id_slot_iop #define cfg$v_node_id_slot_hsbb cfg$_cfg_node_id_slot.cfg$v_node_id_slot_hsbb #define cfg$v_node_id_slot_smb cfg$_cfg_node_id_slot.cfg$v_node_id_slot_smb #define cfg$v_node_id_slot_sbb cfg$_cfg_node_id_slot.cfg$v_node_id_slot_sbb #define cfg$_cfg_node_id_cpu_module cfg$r_cfg_id_union.cfg$_cfg_node_id_cpu_module #define cfg$v_node_id_cpu_mod cfg$_cfg_node_id_cpu_module.cfg$v_node_id_cpu_mod #define cfg$v_node_id_cpu_mod_hsbb cfg$_cfg_node_id_cpu_module.cfg$v_node_id_cpu_mod_hsbb #define cfg$v_node_id_cpu_mod_smb cfg$_cfg_node_id_cpu_module.cfg$v_node_id_cpu_mod_smb #define cfg$v_node_id_cpu_mod_sbb cfg$_cfg_node_id_cpu_module.cfg$v_node_id_cpu_mod_sbb #define cfg$_cfg_node_id_power_env cfg$r_cfg_id_union.cfg$_cfg_node_id_power_env #define cfg$v_node_id_power_env_pe_num cfg$_cfg_node_id_power_env.cfg$v_node_id_power_env_pe_num #define cfg$v_node_id_power_env_cab cfg$_cfg_node_id_power_env.cfg$v_node_id_power_env_cab #define cfg$v_node_id_power_env_hsbb cfg$_cfg_node_id_power_env.cfg$v_node_id_power_env_hsbb #define cfg$v_node_id_power_env_smb cfg$_cfg_node_id_power_env.cfg$v_node_id_power_env_smb #define cfg$v_node_id_power_env_sbb cfg$_cfg_node_id_power_env.cfg$v_node_id_power_env_sbb #define cfg$v_node_id_power_env_chassis cfg$_cfg_node_id_power_env.cfg$v_node_id_power_env_chassis #define cfg$_cfg_node_id_fru_root cfg$r_cfg_id_union.cfg$_cfg_node_id_fru_root #define cfg$v_node_id_fru_root_site_loc cfg$_cfg_node_id_fru_root.cfg$v_node_id_fru_root_site_loc #define cfg$v_node_id_fru_root_cab_id cfg$_cfg_node_id_fru_root.cfg$v_node_id_fru_root_cab_id #define cfg$v_node_id_fru_root_position cfg$_cfg_node_id_fru_root.cfg$v_node_id_fru_root_position #define cfg$v_node_id_fru_root_chassis cfg$_cfg_node_id_fru_root.cfg$v_node_id_fru_root_chassis #define cfg$v_node_id_fru_root_assembly cfg$_cfg_node_id_fru_root.cfg$v_node_id_fru_root_assembly #define cfg$v_node_id_fru_root_subassem cfg$_cfg_node_id_fru_root.cfg$v_node_id_fru_root_subassem #define cfg$v_node_id_fru_root_slot cfg$_cfg_node_id_fru_root.cfg$v_node_id_fru_root_slot #define cfg$_cfg_node_id_fru_desc cfg$r_cfg_id_union.cfg$_cfg_node_id_fru_desc #define cfg$v_node_id_fru_desc_site_loc cfg$_cfg_node_id_fru_desc.cfg$v_node_id_fru_desc_site_loc #define cfg$v_node_id_fru_desc_cab_id cfg$_cfg_node_id_fru_desc.cfg$v_node_id_fru_desc_cab_id #define cfg$v_node_id_fru_desc_position cfg$_cfg_node_id_fru_desc.cfg$v_node_id_fru_desc_position #define cfg$v_node_id_fru_desc_chassis cfg$_cfg_node_id_fru_desc.cfg$v_node_id_fru_desc_chassis #define cfg$v_node_id_fru_desc_assembly cfg$_cfg_node_id_fru_desc.cfg$v_node_id_fru_desc_assembly #define cfg$v_node_id_fru_desc_subassem cfg$_cfg_node_id_fru_desc.cfg$v_node_id_fru_desc_subassem #define cfg$v_node_id_fru_desc_slot cfg$_cfg_node_id_fru_desc.cfg$v_node_id_fru_desc_slot #define cfg$_cfg_node_id_smb cfg$r_cfg_id_union.cfg$_cfg_node_id_smb #define cfg$v_node_id_smb_hsbb cfg$_cfg_node_id_smb.cfg$v_node_id_smb_hsbb #define cfg$v_node_id_smb_smb cfg$_cfg_node_id_smb.cfg$v_node_id_smb_smb #define cfg$v_node_id_smb_sbb cfg$_cfg_node_id_smb.cfg$v_node_id_smb_sbb #define cfg$_cfg_node_id_cab cfg$r_cfg_id_union.cfg$_cfg_node_id_cab #define cfg$v_node_id_cab cfg$_cfg_node_id_cab.cfg$v_node_id_cab #define cfg$_cfg_node_id_chassis cfg$r_cfg_id_union.cfg$_cfg_node_id_chassis #define cfg$v_node_id_chassis cfg$_cfg_node_id_chassis.cfg$v_node_id_chassis #define cfg$_cfg_node_id_exp_chassis cfg$r_cfg_id_union.cfg$_cfg_node_id_exp_chassis #define cfg$v_node_id_exp_chassis cfg$_cfg_node_id_exp_chassis.cfg$v_node_id_exp_chassis #define cfg$_cfg_node_id_sys_inter_sw cfg$r_cfg_id_union.cfg$_cfg_node_id_sys_inter_sw #define cfg$v_node_id_switch_id cfg$_cfg_node_id_sys_inter_sw.cfg$v_node_id_switch_id #define cfg$v_node_id_switch_hsbb cfg$_cfg_node_id_sys_inter_sw.cfg$v_node_id_switch_hsbb #define cfg$_cfg_node_id_hard_part cfg$r_cfg_id_union.cfg$_cfg_node_id_hard_part #define cfg$v_node_id_hard_part cfg$_cfg_node_id_hard_part.cfg$v_node_id_hard_part #define cfg$_cfg_node_id_riser cfg$r_cfg_id_union.cfg$_cfg_node_id_riser #define cfg$v_node_id_riser_riser cfg$_cfg_node_id_riser.cfg$v_node_id_riser_riser #define cfg$v_node_id_riser_iop cfg$_cfg_node_id_riser.cfg$v_node_id_riser_iop #define cfg$v_node_id_riser_hsbb cfg$_cfg_node_id_riser.cfg$v_node_id_riser_hsbb #define cfg$v_node_id_riser_smb cfg$_cfg_node_id_riser.cfg$v_node_id_riser_smb #define cfg$v_node_id_riser_sbb cfg$_cfg_node_id_riser.cfg$v_node_id_riser_sbb #define cfg$_cfg_node_id_soc cfg$r_cfg_id_union.cfg$_cfg_node_id_soc #define cfg$v_node_id_soc_num cfg$_cfg_node_id_soc.cfg$v_node_id_soc_num #define cfg$v_node_id_soc_hsbb cfg$_cfg_node_id_soc.cfg$v_node_id_soc_hsbb #define cfg$v_node_id_soc_smb cfg$_cfg_node_id_soc.cfg$v_node_id_soc_smb #define cfg$v_node_id_soc_sbb cfg$_cfg_node_id_soc.cfg$v_node_id_soc_sbb #define cfg$_cfg_node_id_socket cfg$r_cfg_id_union.cfg$_cfg_node_id_socket #define cfg$v_node_id_socket_id cfg$_cfg_node_id_socket.cfg$v_node_id_socket_id #define cfg$v_node_id_socket_hsbb cfg$_cfg_node_id_socket.cfg$v_node_id_socket_hsbb #define cfg$v_node_id_socket_smb cfg$_cfg_node_id_socket.cfg$v_node_id_socket_smb #define cfg$v_node_id_socket_sbb cfg$_cfg_node_id_socket.cfg$v_node_id_socket_sbb #define cfg$_cfg_node_id_core cfg$r_cfg_id_union.cfg$_cfg_node_id_core #define cfg$v_node_id_core_id cfg$_cfg_node_id_core.cfg$v_node_id_core_id #define cfg$v_node_id_core_hsbb cfg$_cfg_node_id_core.cfg$v_node_id_core_hsbb #define cfg$v_node_id_core_smb cfg$_cfg_node_id_core.cfg$v_node_id_core_smb #define cfg$v_node_id_core_sbb cfg$_cfg_node_id_core.cfg$v_node_id_core_sbb #define cfg$_cfg_node_id_thread cfg$r_cfg_id_union.cfg$_cfg_node_id_thread #define cfg$v_node_id_thread_id cfg$_cfg_node_id_thread.cfg$v_node_id_thread_id #define cfg$v_node_id_thread_hsbb cfg$_cfg_node_id_thread.cfg$v_node_id_thread_hsbb #define cfg$v_node_id_thread_smb cfg$_cfg_node_id_thread.cfg$v_node_id_thread_smb #define cfg$v_node_id_thread_sbb cfg$_cfg_node_id_thread.cfg$v_node_id_thread_sbb #define cfg$iq_node_flags cfg$r_flag_union.cfg$iq_node_flags #define cfg$v_node_hardware cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_hardware #define cfg$v_node_hotswap cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_hotswap #define cfg$v_node_unavailable cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_unavailable #define cfg$v_node_hw_template cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_hw_template #define cfg$v_node_initialized cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_initialized #define cfg$v_node_cpu_primary cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_cpu_primary #define cfg$v_node_in_console cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_in_console #define cfg$v_node_pwr_down cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_pwr_down #define cfg$v_node_pwr_ctrl_point cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_pwr_ctrl_point #define cfg$v_node_present cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_present #define cfg$v_node_reassignable cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_reassignable #define cfg$v_node_hard_partitioned cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_hard_partitioned #define cfg$v_node_disabled cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_disabled #define cfg$v_node_updating cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_updating #define cfg$v_node_unhealthy cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_unhealthy #define cfg$v_node_attention cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_attention #define cfg$v_node_ins_ext cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_ins_ext #define cfg$v_node_decon_pend cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_decon_pend #define cfg$v_node_indicted cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_indicted #define cfg$v_node_19_31 cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_19_31 #define cfg$v_node_32_63 cfg$r_flag_union.cfg$r_flag_bits.cfg$v_node_32_63 #define cfg$iq_fru_id cfg$r_fru_id_union.cfg$iq_fru_id #define cfg$v_fru_id_site_loc cfg$r_fru_id_union.cfg$r_fru_id_fields.cfg$v_fru_id_site_loc #define cfg$v_fru_id_cab_id cfg$r_fru_id_union.cfg$r_fru_id_fields.cfg$v_fru_id_cab_id #define cfg$v_fru_id_position cfg$r_fru_id_union.cfg$r_fru_id_fields.cfg$v_fru_id_position #define cfg$v_fru_id_chassis cfg$r_fru_id_union.cfg$r_fru_id_fields.cfg$v_fru_id_chassis #define cfg$v_fru_id_assembly cfg$r_fru_id_union.cfg$r_fru_id_fields.cfg$v_fru_id_assembly #define cfg$v_fru_id_subassem cfg$r_fru_id_union.cfg$r_fru_id_fields.cfg$v_fru_id_subassem #define cfg$v_fru_id_slot cfg$r_fru_id_union.cfg$r_fru_id_fields.cfg$v_fru_id_slot #endif /* #if !defined(__VAXC) */ #define CFG$K_INSTANCE_NAME_LENGTH 128 #define CFG$K_PARTITION_NAME_LENGTH 64 #define CFG$K_COMM_BLOCK_SIZE 8 #define CFG$M_PARTITIONS_CAPABLE 0x1 #define CFG$M_PARTITION_CALLBACKS 0x2 #define CFG$M_CELLULAR_PLATFORM 0x4 #define CFG$M_ROOTFLAG_3_31 0xFFFFFFF8 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_root_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_root; unsigned __int64 cfg$iq_lock; /* Software lock */ unsigned __int64 cfg$iq_transient_level; /* Update counter (in prog) */ unsigned __int64 cfg$iq_current_level; /* Update counter (actual) */ unsigned __int64 cfg$iq_console_req; /* Memory required for console */ unsigned __int64 cfg$iq_min_alloc; /* Minimum memory allocation */ unsigned __int64 cfg$iq_min_align; /* Memory allocation alignment */ unsigned __int64 cfg$iq_base_alloc; /* Base memory min allocation */ unsigned __int64 cfg$iq_base_align; /* Base memory alloc alignment */ unsigned __int64 cfg$iq_max_phys_address; /* Largest Physical Address */ unsigned __int64 cfg$iq_mem_size; /* Total current memory size */ unsigned __int64 cfg$iq_platform_type; /* Type code of platform */ __int64 cfg$iq_platform_name; /* Offset to name string */ CFG_HANDLE cfg$iq_primary_instance; /* Handle of GALAXY Primary Partiion */ CFG_HANDLE cfg$iq_first_free; /* First free byte of tree pool */ CFG_HANDLE cfg$iq_high_limit; /* High address limit for nodes */ CFG_HANDLE cfg$iq_lookaside; /* Lookaside list for node deletion */ int cfg$il_available; /* Amount of bytes in pool */ unsigned int cfg$il_max_partition; /* Max partitions */ __int64 cfg$iq_partitions; /* Offset to partition ID map */ __int64 cfg$iq_communities; /* Offset to community ID map */ __int64 cfg$iq_bindings; /* Offset to array of bindings */ unsigned int cfg$il_max_platform_partition; /* Max part platform supports */ unsigned int cfg$il_max_desc; /* Max memory descriptors */ char cfg$b_galaxy_id [16]; /* Galaxy ID */ char cfg$b_galaxy_id_pad [4]; /* Pad ID with a longword of bytes (ensures a null terminator) */ __union { unsigned int cfg$il_root_flags; /* Flags in root node */ __struct { unsigned cfg$v_partitions_capable : 1; /* Console supports partitions */ unsigned cfg$v_partition_callbacks : 1; /* Console contains Galaxy/partitioning callback routines */ unsigned cfg$v_cellular_platform : 1; /* System is cell-based */ unsigned cfg$v_rootflag_3_31 : 29; /* Unused bits */ } cfg$r_rootflag_bits; } cfg$r_rootflag_union; } CFG_ROOT_NODE; #if !defined(__VAXC) #define cfg$il_root_flags cfg$r_rootflag_union.cfg$il_root_flags #define cfg$v_partitions_capable cfg$r_rootflag_union.cfg$r_rootflag_bits.cfg$v_partitions_capable #define cfg$v_partition_callbacks cfg$r_rootflag_union.cfg$r_rootflag_bits.cfg$v_partition_callbacks #define cfg$v_cellular_platform cfg$r_rootflag_union.cfg$r_rootflag_bits.cfg$v_cellular_platform #define cfg$v_rootflag_3_31 cfg$r_rootflag_union.cfg$r_rootflag_bits.cfg$v_rootflag_3_31 #endif /* #if !defined(__VAXC) */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_hw_root_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_hw_root; } CFG_HW_ROOT_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_sw_root_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_sw_root; } CFG_SW_ROOT_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_template_root_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_template_root; } CFG_TEMPLATE_ROOT_NODE; #define CFG$M_CAN_ACCEPT_SHMEM 0x1 #define CFG$M_COMMFLAG_1_31 0xFFFFFFFE #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_community_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_community; unsigned __int64 cfg$iq_gmdb [8]; /* Communication block */ __int64 cfg$iq_mcd_shared_header; /* Offset from base of GCT to first shared MCD */ __union { unsigned int cfg$il_comm_flags; /* Flags in community node */ __struct { unsigned cfg$v_can_accept_shmem : 1; /* Community will accept in-swapped or reassigned memory */ unsigned cfg$v_commflag_1_31 : 31; /* Unused bits */ } cfg$r_commflag_bits; } cfg$r_commflag_union; int cfg$il_community_mbz1; /* Reserved, MBZ */ } CFG_COMMUNITY_NODE; #if !defined(__VAXC) #define cfg$il_comm_flags cfg$r_commflag_union.cfg$il_comm_flags #define cfg$v_can_accept_shmem cfg$r_commflag_union.cfg$r_commflag_bits.cfg$v_can_accept_shmem #define cfg$v_commflag_1_31 cfg$r_commflag_union.cfg$r_commflag_bits.cfg$v_commflag_1_31 #endif /* #if !defined(__VAXC) */ #define CFG$M_CAN_ACCEPT_MEM 0x1 #define CFG$M_CAN_ACCEPT_CPU 0x2 #define CFG$M_CAN_ACCEPT_IO 0x4 #define CFG$M_TREE_CHANGE_NOTIFY 0x8 #define CFG$M_HW_CHANGE_NOTIFY 0x10 #define CFG$M_ERROR_TARGET 0x20 #define CFG$M_ERROR_PENDING 0x40 #define CFG$M_PARTFLAG_7_31 0xFFFFFF80 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_partition_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_partition; unsigned __int64 cfg$iq_hwrpb; /* HWRPB PA */ unsigned __int64 cfg$iq_incarnation; /* Partition incarnation */ unsigned __int64 cfg$iq_priority; /* Partition priority */ unsigned int cfg$il_os_type; /* OS type */ __union { unsigned int cfg$il_part_flags; /* Flags in partition node */ __struct { unsigned cfg$v_can_accept_mem : 1; /* Instance can accept in-swapped or reassigned memory */ unsigned cfg$v_can_accept_cpu : 1; /* Instance can accept in-swapped or reassigned CPU */ unsigned cfg$v_can_accept_io : 1; /* Instance can accept in-swapped or reassigned IO */ unsigned cfg$v_tree_change_notify : 1; /* Notify instance of configuration tree changes */ unsigned cfg$v_hw_change_notify : 1; /* Notify instance of new hardware (hot-swap) */ unsigned cfg$v_error_target : 1; /* I am the error target */ unsigned cfg$v_error_pending : 1; /* I have pending errors */ unsigned cfg$v_partflag_7_31 : 25; /* Unused bits */ } cfg$r_partflag_bits; } cfg$r_partflag_union; char cfg$b_instance_name [128]; /* Instance Name */ __int64 cfg$iq_part_mbz1; /* Reserved, MBZ */ } CFG_PARTITION_NODE; #if !defined(__VAXC) #define cfg$il_part_flags cfg$r_partflag_union.cfg$il_part_flags #define cfg$v_can_accept_mem cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_can_accept_mem #define cfg$v_can_accept_cpu cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_can_accept_cpu #define cfg$v_can_accept_io cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_can_accept_io #define cfg$v_tree_change_notify cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_tree_change_notify #define cfg$v_hw_change_notify cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_hw_change_notify #define cfg$v_error_target cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_error_target #define cfg$v_error_pending cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_error_pending #define cfg$v_partflag_7_31 cfg$r_partflag_union.cfg$r_partflag_bits.cfg$v_partflag_7_31 #endif /* #if !defined(__VAXC) */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_sbb_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_sbb; } CFG_SBB_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_pseudo_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_pseudo; } CFG_PSEUDO_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_cpu_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_cpu; } CFG_CPU_NODE; #define CFG$M_MCD_USAGE_CONSOLE 0x1 #define CFG$M_MCD_USAGE_NVRAM 0x2 #define CFG$M_MCD_USAGE_SHARED 0x4 #define CFG$M_MCD_USAGE_FIXED 0x8 #define CFG$M_MCD_4_31 0xFFFFFFF0 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_mcd { /* Checksum quadword */ #pragma __nomember_alignment unsigned __int64 cfg$iq_mcd_checksum; /* Offset from GCT base to next MCD in private or shared list */ /* (-1 if end of list, 0 if not on private or shared list) */ __int64 cfg$iq_mcd_usage_link; /* First PFN in contiguous range of PFNs described by this MCD */ __union { unsigned int cfg$i_mcd_start_pfn; unsigned int cfg$il_mcd_start_pfn; } cfg$r_mcd_pfn_union; /* Count of PFNs described by this MCD */ __union { unsigned int cfg$i_mcd_pfn_count; unsigned int cfg$il_mcd_pfn_count; } cfg$r_mcd_count_union; /* Number of the lowest-ordered PFNs described by this MCD that have been tested */ __union { unsigned int cfg$i_mcd_tested_pfn_count; unsigned int cfg$il_mcd_tested_pfn_count; } cfg$r_mcd_tested_union; /* Memory Usage Bits: */ /* 0 - software private */ /* 1 - console */ /* 2 - software NVRAM */ /* 3 - not a valid combination of bits (console NVRAM) */ /* 4 - software shared */ /* 5 - console shared */ /* 6 - not a valid combination of bits (shared NVRAM) */ /* 7 - not a valid combination of bits (console, shared, NVRAM) */ /* 8 - software private "FIXED" */ /* 9 - software console "FIXED" */ __union { unsigned int cfg$il_mcd_usage_bits; /* Memory usage bits */ __struct { unsigned cfg$v_mcd_usage_console : 1; /* Console memory */ unsigned cfg$v_mcd_usage_nvram : 1; /* Software (NVRAM) */ unsigned cfg$v_mcd_usage_shared : 1; /* Shared memory */ unsigned cfg$v_mcd_usage_fixed : 1; /* "FIXED" memory, cannot be out-swapped or reassigned */ unsigned cfg$v_mcd_4_31 : 28; /* Unused bits in longword */ } cfg$r_mcd_usage_bits; } cfg$r_mcd_usage_union; /* Physical address of bitmap, zero if none */ unsigned __int64 cfg$iq_mcd_bitmap_pa; /* Checksum of the lowest-ordered quadwords of bitmap. Only those */ /* bitmap quadwords up to test_pfn_count are included. */ unsigned __int64 cfg$iq_mcd_bitmap_checksum; /* Reserved, must be zero */ unsigned __int64 cfg$iq_mcd_mbz_1; unsigned __int64 cfg$iq_mcd_mbz_2; unsigned __int64 cfg$iq_mcd_mbz_3; unsigned __int64 cfg$iq_mcd_mbz_4; } CFG_MCD; #if !defined(__VAXC) #define cfg$i_mcd_start_pfn cfg$r_mcd_pfn_union.cfg$i_mcd_start_pfn #define cfg$il_mcd_start_pfn cfg$r_mcd_pfn_union.cfg$il_mcd_start_pfn #define cfg$i_mcd_pfn_count cfg$r_mcd_count_union.cfg$i_mcd_pfn_count #define cfg$il_mcd_pfn_count cfg$r_mcd_count_union.cfg$il_mcd_pfn_count #define cfg$i_mcd_tested_pfn_count cfg$r_mcd_tested_union.cfg$i_mcd_tested_pfn_count #define cfg$il_mcd_tested_pfn_count cfg$r_mcd_tested_union.cfg$il_mcd_tested_pfn_count #define cfg$il_mcd_usage_bits cfg$r_mcd_usage_union.cfg$il_mcd_usage_bits #define cfg$v_mcd_usage_console cfg$r_mcd_usage_union.cfg$r_mcd_usage_bits.cfg$v_mcd_usage_console #define cfg$v_mcd_usage_nvram cfg$r_mcd_usage_union.cfg$r_mcd_usage_bits.cfg$v_mcd_usage_nvram #define cfg$v_mcd_usage_shared cfg$r_mcd_usage_union.cfg$r_mcd_usage_bits.cfg$v_mcd_usage_shared #define cfg$v_mcd_usage_fixed cfg$r_mcd_usage_union.cfg$r_mcd_usage_bits.cfg$v_mcd_usage_fixed #define cfg$v_mcd_4_31 cfg$r_mcd_usage_union.cfg$r_mcd_usage_bits.cfg$v_mcd_4_31 #endif /* #if !defined(__VAXC) */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_memory_sub_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_memory_sub; unsigned __int64 cfg$iq_min_pa; /* Lowest possible PA in subsystem */ unsigned __int64 cfg$iq_max_pa; /* Highest possible PA in subsys */ } CFG_MEMORY_SUB_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_mem_desc_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_mem_desc; CFG_MCD cfg$r_mem_cluster_desc; } CFG_MEM_DESC_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_memory_ctrl_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_memory_ctrl; } CFG_MEMORY_CTRL_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_iop_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_iop; unsigned __int64 cfg$iq_min_io_pa; /* Lowest possible PA in I/O subsystem */ unsigned __int64 cfg$iq_max_io_pa; /* Highest possible PA in I/O subsys */ } CFG_IOP_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_hose_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_hose; } CFG_HOSE_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_bus_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_bus; } CFG_BUS_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_io_ctrl_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_io_ctrl; } CFG_IO_CTRL_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_slot_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_slot; } CFG_SLOT_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_cpu_module_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_cpu_module; } CFG_CPU_MODULE_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_power_env_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_power_env; } CFG_POWER_ENV_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_fru_info { #pragma __nomember_alignment unsigned int cfg$il_fru_info_diag_flag; unsigned int cfg$il_fru_info_diag_info; unsigned char cfg$b_fru_info_first_tlv; /* Start of five string TLVs containing mfg, model, p/n, s/n and rev. */ /* You are wise to use TLV macros from Nigel Croxon (Alpha FW) to ref these. */ char cfg$b_fill_1_ [7]; } CFG_FRU_INFO; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_fru_root_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_fru_root; CFG_FRU_INFO cfg$r_fru_root_info; } CFG_FRU_ROOT_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_fru_desc_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_fru_desc; CFG_FRU_INFO cfg$r_fru_desc_info; } CFG_FRU_DESC_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_smb_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_smb; } CFG_SMB_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_cab_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_cab; } CFG_CAB_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_chassis_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_chassis; } CFG_CHASSIS_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_exp_chassis_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_exp_chassis; } CFG_EXP_CHASSIS_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_switch_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_switch; } CFG_SWITCH_NODE; #define CFG$M_ACCEPT_HW_UNSOLICITED 0x1 #define CFG$M_HARDFLAG_1_31 0xFFFFFFFE #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_hard_partition_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_hard_partition; __union { unsigned int cfg$il_hard_flags; /* Flags in root node */ __struct { unsigned cfg$v_accept_hw_unsolicited : 1; /* Hard partition can accept new or reassigned hardware */ unsigned cfg$v_hardflag_1_31 : 31; /* Unused bits */ } cfg$r_hardflag_bits; } cfg$r_hardflag_union; int cfg$il_hard_partition_cell_cnt; /* Number of Cells if Cellular */ __int64 cfg$iq_hard_partition_mbz1; /* Reserved, MBZ */ } CFG_HARD_PARTITION_NODE; #if !defined(__VAXC) #define cfg$il_hard_flags cfg$r_hardflag_union.cfg$il_hard_flags #define cfg$v_accept_hw_unsolicited cfg$r_hardflag_union.cfg$r_hardflag_bits.cfg$v_accept_hw_unsolicited #define cfg$v_hardflag_1_31 cfg$r_hardflag_union.cfg$r_hardflag_bits.cfg$v_hardflag_1_31 #endif /* #if !defined(__VAXC) */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_riser_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_riser; } CFG_RISER_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_soc_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_soc; } CFG_SOC_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_socket_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_socket; } CFG_SOCKET_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_core_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_core; __int64 cfg$iq_core_socket_id; /* Socket/Package ID */ } CFG_CORE_NODE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_thread_node { #pragma __nomember_alignment CFG_NODE cfg$r_hd_thread; __int64 cfg$iq_thread_socket_id; /* Socket/Package ID */ __int64 cfg$iq_thread_core_id; /* Core ID */ } CFG_THREAD_NODE; /* * Define the GCT_FILE type as char. */ #ifndef CFG_FILE #define CFG_FILE char #endif /* * Define some typedefs */ #ifdef __INITIAL_POINTER_SIZE #pragma __required_pointer_size __save /* Save current pointer size */ #pragma __required_pointer_size __long /* Pointers are 64-bit */ typedef struct _cfg_buffer_header *CFG_BUFFER_HEADER_PQ; typedef struct _cfg_node *CFG_NODE_PQ; typedef union _cfg_id_union *CFG_ID_UNION_PQ; typedef struct _cfg_root_node *CFG_ROOT_NODE_PQ; typedef struct _cfg_hw_root_node *CFG_HW_ROOT_NODE_PQ; typedef struct _cfg_sw_root_node *CFG_SW_ROOT_NODE_PQ; typedef struct _cfg_template_root_node *CFG_TEMPLATE_ROOT_NODE_PQ; typedef struct _cfg_community_node *CFG_COMMUNITY_NODE_PQ; typedef struct _cfg_partition_node *CFG_PARTITION_NODE_PQ; typedef struct _cfg_names *CFG_NAMES_PQ; typedef struct _cfg_sbb_node *CFG_SBB_NODE_PQ; typedef struct _cfg_pseudo_node *CFG_PSEUDO_NODE_PQ; typedef struct _cfg_cpu_node *CFG_CPU_NODE_PQ; typedef struct _cfg_memory_sub_node *CFG_MEMORY_SUB_NODE_PQ; typedef struct _cfg_memory_ctrl_node *CFG_MEMORY_CTRL_NODE_PQ; typedef struct _cfg_mem_desc_node *CFG_MEM_DESC_NODE_PQ; typedef struct _cfg_mcd *CFG_MCD_PQ; typedef struct _cfg_iop_node *CFG_IOP_NODE_PQ; typedef struct _cfg_hose_node *CFG_HOSE_NODE_PQ; typedef struct _cfg_bus_node *CFG_BUS_NODE_PQ; typedef struct _cfg_io_ctrl_node *CFG_IO_CTRL_NODE_PQ; typedef struct _cfg_slot_node *CFG_SLOT_NODE_PQ; typedef struct _cfg_cpu_module_node *CFG_CPU_MODULE_NODE_PQ; typedef struct _cfg_power_envir_node *CFG_POWER_ENVIR_NODE_PQ; typedef struct _cfg_fru_root_node *CFG_FRU_ROOT_NODE_PQ; typedef struct _cfg_fru_desc_node *CFG_FRU_DESC_NODE_PQ; typedef struct _cfg_smb_node *CFG_SMB_NODE_PQ; typedef struct _cfg_cab_node *CFG_CAB_NODE_PQ; typedef struct _cfg_chassis_node *CFG_CHASSIS_NODE_PQ; typedef struct _cfg_exp_chassis_node *CFG_EXP_CHASSIS_NODE_PQ; typedef struct _cfg_switch_node *CFG_SYS_INTER_SW_NODE_PQ; typedef struct _cfg_hard_partition_node *CFG_HARD_PARTITION_NODE_PQ; typedef struct _cfg_riser_node *CFG_RISER_NODE_PQ; typedef struct _cfg_soc_node *CFG_SOC_NODE_PQ; typedef struct _cfg_socket_node *CFG_SOCKET_NODE_PQ; typedef struct _cfg_core_node *CFG_CORE_NODE_PQ; typedef struct _cfg_thread_node *CFG_THREAD_NODE_PQ; #pragma __required_pointer_size __restore /* Return to previous pointer size */ #else typedef unsigned __int64 CFG_BUFFER_HEADER_PQ; typedef unsigned __int64 CFG_NODE_PQ; typedef unsigned __int64 CFG_ROOT_NODE_PQ; typedef unsigned __int64 CFG_HW_ROOT_NODE_PQ; typedef unsigned __int64 CFG_SW_ROOT_NODE_PQ; typedef unsigned __int64 CFG_TEMPLATE_ROOT_NODE_PQ; typedef unsigned __int64 CFG_COMMUNITY_NODE_PQ; typedef unsigned __int64 CFG_PARTITION_NODE_PQ; typedef unsigned __int64 CFG_NAMES_PQ; typedef unsigned __int64 CFG_SBB_NODE_PQ; typedef unsigned __int64 CFG_PSEUDO_NODE_PQ; typedef unsigned __int64 CFG_CPU_NODE_PQ; typedef unsigned __int64 CFG_MEMORY_SUB_NODE_PQ; typedef unsigned __int64 CFG_MEMORY_CRTL_NODE_PQ; typedef unsigned __int64 CFG_MEM_DESC_NODE_PQ; typedef unsigned __int64 CFG_MCD_PQ; typedef unsigned __int64 CFG_IOP_NODE_PQ; typedef unsigned __int64 CFG_HOSE_NODE_PQ; typedef unsigned __int64 CFG_BUS_NODE_PQ; typedef unsigned __int64 CFG_IO_CTRL_NODE_PQ; typedef unsigned __int64 CFG_SLOT_NODE_PQ; typedef unsigned __int64 CFG_CPU_MODULE_NODE_PQ; typedef unsigned __int64 CFG_POWER_ENVIR_NODE_PQ; typedef unsigned __int64 CFG_FRU_ROOT_NODE_PQ; typedef unsigned __int64 CFG_FRU_DESC_NODE_PQ; typedef unsigned __int64 CFG_SMB_NODE_PQ; typedef unsigned __int64 CFG_CAB_NODE_PQ; typedef unsigned __int64 CFG_CHASSIS_NODE_PQ; typedef unsigned __int64 CFG_EXP_CHASSIS_NODE_PQ; typedef unsigned __int64 CFG_SYS_INTER_SW_NODE_PQ; typedef unsigned __int64 CFG_HARD_PARTITION_NODE_PQ; typedef unsigned __int64 CFG_RISER_NODE_PQ; typedef unsigned __int64 CFG_SOC_NODE_PQ; typedef unsigned __int64 CFG_SOCKET_NODE_PQ; typedef unsigned __int64 CFG_CORE_NODE_PQ; typedef unsigned __int64 CFG_THREAD_NODE_PQ; typedef unsigned __int64 CFG_ID_UNION_PQ; #endif /* __INITIAL_POINTER_SIZE */ /* */ /* TLV strings... To access them -- you need to use the tag to understand */ /* the data type, the length to get the number of bytes in the value. */ /* You are wise to use TLV macros from Nigel Croxon (Alpha FW) to ref these. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_tlv { #pragma __nomember_alignment unsigned short int cfg$iw_tlv_tag; /* The Type of data */ unsigned short int cfg$iw_tlv_length; /* Its length */ unsigned char cfg$b_tlv_value; /* The first byte(s) in the value */ char cfg$b_fill_2_ [3]; } CFG_TLV; #define CFG$K_TLV_TAG_ISOLATIN1 1 #define CFG$K_TLV_TAG_QUOTED 2 #define CFG$K_TLV_TAG_BINARY 3 #define CFG$K_TLV_TAG_UNICODE 4 /* */ /* define the diag_failure structure */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __longword #else #pragma __nomember_alignment #endif typedef struct _cfg_diag_failure { #pragma __nomember_alignment unsigned char cfg$b_failure_type_rev; /* type nibble (0:3) and revision (4:7) */ unsigned char cfg$b_failure_test; /* Test */ unsigned char cfg$b_failure_subtest; /* Subtest code */ unsigned char cfg$b_failure_error; /* Error code */ } CFG_DIAG_FAILURE; #define CFG$K_DIAG_ST_NA 1 /* */ #define CFG$K_DIAG_ST_PASSED 1 /* */ #define CFG$K_DIAG_ST_RSRVD_03_31 -4 /* */ /* */ /* System Resource Configuration Subpacket header format */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __longword #else #pragma __nomember_alignment #endif typedef struct _cfg_subpack { #pragma __nomember_alignment unsigned short int cfg$iw_subpack_length; /* Length */ unsigned short int cfg$iw_subpack_class; /* Class */ unsigned short int cfg$iw_subpack_type; /* Type */ unsigned short int cfg$iw_subpack_rev; /* Revision */ unsigned int cfg$il_subpack_diag_flags; unsigned int cfg$il_subpack_diag_failure; } CFG_SUBPACK; /* */ /* Subpacket TYPE codes for CLASS 1 ( System Resource Conf Subpackets ) */ /* */ #define CFG$K_SUBPACK_UNUSED_1 1 /* Used to be SYSTEM_PLATFORM */ #define CFG$K_SUBPACK_PROCESSOR 2 #define CFG$K_SUBPACK_MEMORY 3 #define CFG$K_SUBPACK_SYS_BUS_BRIDGE 4 #define CFG$K_SUBPACK_PCI_DEVICE 5 #define CFG$K_SUBPACK_UNUSED_6 6 #define CFG$K_SUBPACK_CACHE 7 #define CFG$K_SUBPACK_POWER 8 #define CFG$K_SUBPACK_COOLING 9 #define CFG$K_SUBPACK_SYS_INIT_LOG 10 #define CFG$K_SUBPACK_UNUSED_11 11 #define CFG$K_SUBPACK_UNUSED_12 12 #define CFG$K_SUBPACK_VME 13 #define CFG$K_SUBPACK_SBB 14 #define CFG$K_SUBPACK_IOP 15 #define CFG$K_SUBPACK_HOSE 16 #define CFG$K_SUBPACK_BUS 17 #define CFG$K_SUBPACK_ISA_DEVICE 18 #define CFG$K_SUBPACK_USB_DEVICE 19 #define CFG$K_SUBPACK_CONSOLE 20 #define CFG$K_SUBPACK_POWER_ENVIR 21 #define CFG$K_SUBPACK_UNUSED_22 22 #define CFG$K_SUBPACK_UNUSED_23 23 #define CFG$K_SUBPACK_UNUSED_24 24 #define CFG$K_SUBPACK_UNUSED_25 25 #define CFG$K_SUBPACK_UNUSED_26 26 #define CFG$K_SUBPACK_UNUSED_27 27 #define CFG$K_SUBPACK_UNUSED_28 28 #define CFG$K_SUBPACK_UNUSED_29 29 #define CFG$K_SUBPACK_PCI_VPD 30 #define CFG$K_SUBPACK_SMB 31 #define CFG$K_SUBPACK_FIBRECHANNEL 32 #define CFG$K_SUBPACK_AGP 33 #define CFG$K_SUBPACK_IDE 34 #define CFG$K_SUBPACK_SCSI 35 #define CFG$K_SUBPACK_1394 36 #define CFG$K_SUBPACK_SUPER_HIPPI 37 #define CFG$K_SUBPACK_MEMORY_DIR 38 #define CFG$K_SUBPACK_NUMA_PORT 39 #define CFG$K_SUBPACK_NUMA_SWITCH 40 #define CFG$K_SUBPACK_RMC 41 #define CFG$K_SUBPACK_SENSOR 42 #define CFG$K_SUBPACK_SYSEVT 43 #define CFG$K_SUBPACK_LAST 44 /* */ /* CPU Resource subpacket ( Class 1 Type 2 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_cpu_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_cpu_sub; unsigned int cfg$il_cpu_id; unsigned int cfg$il_cpu_family; unsigned __int64 cfg$iq_cpu_state; unsigned __int64 cfg$iq_cpu_ovms_palcode_rev; unsigned __int64 cfg$iq_cpu_dunix_palcode_rev; unsigned __int64 cfg$iq_cpu_wnt_palcode_rev; unsigned __int64 cfg$iq_cpu_alpha_type; unsigned __int64 cfg$iq_cpu_variation; CFG_TLV cfg$r_cpu_first_tlv; /* Three TLV's exist: */ /* You are wise to use TLV macros from Nigel Croxon (Alpha FW) to ref these. */ /* cpu_manufacturer CFG_TLV; */ /* cpu_serial_number CFG_TLV; */ /* cpu_revision_level CFG_TLV; */ } SUBPKT_CPU_FRU; /* */ /* MEMORY Resouce subpacket ( Class 1 Type 3) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_mem_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_mem_sub; unsigned __int64 cfg$iq_mem_id; unsigned int cfg$il_mem_reserved; unsigned int cfg$il_mem_register_count; } SUBPKT_MEM_FRU; /* */ /* BUSBRIDGE Resouce subpacket ( Class 1 Type 4) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_bridge_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_bridge_sub; unsigned short int cfg$iw_bridge_level; unsigned short int cfg$iw_bridge_type; unsigned int cfg$il_bridge_register_count; unsigned __int64 cfg$iq_bridge_physical_addr; } SUBPKT_BRIDGE_FRU; #define CFG$K_BRIDGE_LVL_PRIMARY 1 #define CFG$K_BRIDGE_LVL_SECONDARY 2 #define CFG$K_BRIDGE_LVL_TERTIARY 3 #define CFG$K_BRIDGE_TYPE_HOSE 1 #define CFG$K_BRIDGE_TYPE_PCI 2 #define CFG$K_BRIDGE_TYPE_XMI 3 #define CFG$K_BRIDGE_TYPE_FBUS 4 #define CFG$K_BRIDGE_TYPE_VME 5 #define CFG$K_BRIDGE_TYPE_ISA 6 #define CFG$K_BRIDGE_TYPE_AGP 7 #define CFG$K_BRIDGE_TYPE_LAST 8 /* */ /* PCI Resouce subpacket ( Class 1 Type 5) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_pci_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_pci_sub; unsigned __int64 cfg$iq_pci_config_addr; unsigned __int64 cfg$iq_pci_config_head0; unsigned __int64 cfg$iq_pci_config_head1; unsigned __int64 cfg$iq_pci_config_head2; unsigned __int64 cfg$iq_pci_config_head3; unsigned __int64 cfg$iq_pci_config_head4; unsigned __int64 cfg$iq_pci_config_head5; unsigned __int64 cfg$iq_pci_config_head6; unsigned __int64 cfg$iq_pci_config_head7; } SUBPKT_PCI_FRU; /* */ /* Cache Resouce subpacket ( Class 1 Type 7 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_cache_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_cache_sub; unsigned short int cfg$iw_cache_level; unsigned short int cfg$iw_cache_speed; unsigned short int cfg$iw_cache_size; unsigned short int cfg$iw_cache_size_avail; unsigned short int cfg$iw_cache_wp; unsigned short int cfg$iw_cache_ec; unsigned short int cfg$iw_cache_type; unsigned short int cfg$iw_cache_state; } SUBPKT_CACHE_FRU; /* */ /* CACHE types */ /* */ #define CFG$K_CACHE_OTHER 1 /* */ #define CFG$K_CACHE_UNKNOWN 2 /* */ #define CFG$K_CACHE_LVL_PRIMARY 3 /* 1st level */ #define CFG$K_CACHE_LVL_SECONDARY 4 /* 2nd level */ #define CFG$K_CACHE_LVL_TERTIARY 5 /* 3rd level */ #define CFG$K_CACHE_LAST 6 /* */ #define CFG$K_CACHE_WP_WRITEBACK 3 #define CFG$K_CACHE_WP_WRITETHROUGH 4 #define CFG$K_CACHE_WP_LATEWRITE 5 #define CFG$K_CACHE_EC_NONE 3 #define CFG$K_CACHE_EC_PARITY 4 #define CFG$K_CACHE_EC_SINGLEBITECC 5 #define CFG$K_CACHE_EC_MULTIBITECC 6 #define CFG$K_CACHE_TYPE_INSTRUCTION 3 #define CFG$K_CACHE_TYPE_DATA 4 #define CFG$K_CACHE_TYPE_UNIFIED 5 #define CFG$K_CACHE_STAT_ENABLED 3 #define CFG$K_CACHE_STAT_DISABLED 4 #define CFG$K_CACHE_STAT_NOTAPPLY 5 /* */ /* Power Resouce subpacket ( Class 1 Type 8 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_power_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_power_sub; unsigned int cfg$il_power_fru_count; unsigned int cfg$il_power_fru_reserved; unsigned __int64 cfg$iq_power_fru_offset; unsigned short int cfg$iw_power_type; unsigned short int cfg$iw_power_id; unsigned int cfg$il_power_status; } SUBPKT_POWER_FRU; #define CFG$K_POWER_PS_TYPE_DC 1 #define CFG$K_POWER_PS_TYPE_AC 2 #define CFG$K_POWER_PS_TYPE_GNDCUR 3 #define CFG$K_POWER_PS_TYPE_BBU 4 #define CFG$K_POWER_PS_TYPE_UPS 5 /* */ /* Cooling Resouce subpacket ( Class 1 Type 9 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_cooling_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_cooling_sub; unsigned int cfg$il_cooling_fru_count; unsigned int cfg$il_cooling_fru_reserved; unsigned __int64 cfg$iq_cooling_fru_offset; unsigned short int cfg$iw_cooling_type; unsigned short int cfg$iw_cooling_id; unsigned int cfg$il_cooling_status; } SUBPKT_COOLING_FRU; #define CFG$K_COOLING_COOL_TYPE_FAN 1 #define CFG$K_COOLING_COOL_TYPE_TEMP 2 /* */ /* Bus Resouce subpacket ( Class 1 Type 17 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_bus_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_bus_sub; unsigned __int64 cfg$iq_bus_id; unsigned int cfg$il_bus_reserved; unsigned int cfg$il_bus_register_count; } SUBPKT_BUS_FRU; /* */ /* CSL Resouce subpacket ( Class 1 Type 20 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_csl_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_csl_sub; unsigned int cfg$il_csl_reset_reason; unsigned int cfg$il_csl_ev_count; CFG_TLV cfg$r_csl_first_tlv; /* Four TLV's exist: */ /* You are wise to use TLV macros from Nigel Croxon (Alpha FW) to ref these. */ /* csl_srm_part_number CFG_TLV; */ /* csl_srm_rev CFG_TLV; */ /* csl_alphabios_part_number CFG_TLV; */ /* csl_alphabios_rev CFG_TLV; */ } SUBPKT_CSL_FRU; #define CFG$K_CSL_UNKNOWN_RESET 0 #define CFG$K_CSL_SOFT_RESET 2 #define CFG$K_CSL_HARD_RESET 4 #define CFG$K_CSL_OCP_RESET 8 #define CFG$K_CSL_REMOTE_RESET 16 /* */ /* PCI VPD Resouce subpacket ( Class 1 Type 30 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_vpd_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_vpd_sub; unsigned __int64 cfg$iq_vpd_load_id; unsigned __int64 cfg$iq_vpd_rom_level; unsigned __int64 cfg$iq_vpd_rom_rev; unsigned __int64 cfg$iq_vpd_net_addr; unsigned __int64 cfg$iq_vpd_dev_driv_level; unsigned __int64 cfg$iq_vpd_diag_level; unsigned __int64 cfg$iq_vpd_load_ucode_level; unsigned __int64 cfg$iq_vpd_bin_func_num; } SUBPKT_VPD_FRU; /* */ /* SMB Resouce subpacket ( Class 1 Type 31 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_smb_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_smb_sub; unsigned __int64 cfg$iq_smb_id; unsigned int cfg$il_smb_reserved; unsigned int cfg$il_smb_register_count; } SUBPKT_SMB_FRU; /* */ /* RMC Resouce subpacket ( Class 1 Type 41 ) */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_rmc_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_rmc_sub; unsigned __int64 cfg$iq_rmc_id; unsigned int cfg$il_rmc_pic_hw_rev; unsigned int cfg$il_rmc_pic_fw_rev; } SUBPKT_RMC_FRU; /* */ /* SENSOR Resouce subpacket ( Class 1 Type 42 ) */ /* */ #define CFG$M_SENSOR_PROP_STATUS 0x1 #define CFG$M_SENSOR_PROP_VALUE 0x2 #define CFG$M_SENSOR_PROP_WRITEABLE 0x4 #define CFG$M_SENSOR_PROP_BITFIELD 0x8 #define CFG$M_SENSOR_PROP_FILL 0xFFFFFFF0 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _subpkt_sensor_fru { #pragma __nomember_alignment CFG_SUBPACK cfg$r_sensor_sub; unsigned int cfg$il_sensor_fru_count; unsigned int cfg$il_sensor_fru_reserved; unsigned __int64 cfg$iq_sensor_fru_offset; __union { unsigned __int64 cfg$iq_sensor_console_id; __struct { unsigned int cfg$il_sensor_console_id; unsigned int cfg$il_sensor_bitfield; } cfg$r_sensor_console_id_fields; } cfg$r_sensor_console_id_overlay; unsigned int cfg$il_sensor_class; __union { unsigned int cfg$il_sensor_prop; /* Sensor properties */ __struct { unsigned cfg$v_sensor_prop_status : 1; unsigned cfg$v_sensor_prop_value : 1; unsigned cfg$v_sensor_prop_writeable : 1; unsigned cfg$v_sensor_prop_bitfield : 1; unsigned cfg$v_sensor_prop_fill : 28; } cfg$r_sensor_prop_fields; } cfg$r_sensor_prop_overlay; } SUBPKT_SENSOR_FRU; #if !defined(__VAXC) #define cfg$iq_sensor_console_id cfg$r_sensor_console_id_overlay.cfg$iq_sensor_console_id #define cfg$il_sensor_console_id cfg$r_sensor_console_id_overlay.cfg$r_sensor_console_id_fields.cfg$il_sensor_console_id #define cfg$il_sensor_bitfield cfg$r_sensor_console_id_overlay.cfg$r_sensor_console_id_fields.cfg$il_sensor_bitfield #define cfg$il_sensor_prop cfg$r_sensor_prop_overlay.cfg$il_sensor_prop #define cfg$v_sensor_prop_status cfg$r_sensor_prop_overlay.cfg$r_sensor_prop_fields.cfg$v_sensor_prop_status #define cfg$v_sensor_prop_value cfg$r_sensor_prop_overlay.cfg$r_sensor_prop_fields.cfg$v_sensor_prop_value #define cfg$v_sensor_prop_writeable cfg$r_sensor_prop_overlay.cfg$r_sensor_prop_fields.cfg$v_sensor_prop_writeable #define cfg$v_sensor_prop_bitfield cfg$r_sensor_prop_overlay.cfg$r_sensor_prop_fields.cfg$v_sensor_prop_bitfield #endif /* #if !defined(__VAXC) */ #define CFG$K_SENSOR_CLASS_FAN 1 #define CFG$K_SENSOR_CLASS_TEMPERATURE 2 #define CFG$K_SENSOR_CLASS_AC 3 #define CFG$K_SENSOR_CLASS_DC 4 #define CFG$K_SENSOR_CLASS_BATTERY 5 /* */ /* Define the header extension structure. Offset to by hd_extension */ /* in the common header. If zero, no extended header information is */ /* present for the node. */ /* */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cfg_hd_ext { #pragma __nomember_alignment unsigned int cfg$il_hd_ext_fru_count; unsigned int cfg$il_reserved_1; CFG_HANDLE cfg$iq_hd_ext_fru; unsigned int cfg$il_hd_ext_subpkt_count; unsigned int cfg$il_hd_ext_subpkt_offset; } CFG_HD_EXT; #define CFG$K_NODE_HARDWARE 1 #define CFG$K_NODE_HOTSWAP 2 #define CFG$K_NODE_UNAVAILABLE 4 #define CFG$K_NODE_HW_TEMPLATE 8 #define CFG$K_NODE_INITIALIZED 16 #define CFG$K_NODE_CPU_PRIMARY 32 #define CFG$K_NODE_IN_CONSOLE 64 #define CFG$K_NODE_PWR_DOWN 128 #define CFG$K_NODE_PWR_CTRL_POINT 256 #define CFG$K_NODE_PRESENT 512 #define CFG$K_NODE_REASSIGNABLE 1024 #define CFG$K_NODE_HARD_PARTITIONED 2048 #define CFG$K_NODE_DISABLED 4096 #define CFG$K_NODE_UPDATING 8192 #define CFG$K_NODE_UNHEALTHY 16384 #define CFG$K_NODE_ATTENTION 32768 #define CFG$K_NODE_INS_EXT 65536 #define CFG$K_NODE_DECON_PEND 131072 #define CFG$K_NODE_INDICTED 262144 #define CFG$K_NODE_RSRVD_19_31 -524288 #define CFG$K_NODE_RSRVD_32_63 -1 #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __CFGDEF_LOADED */