/**/ /***************************************************************************/ /** **/ /** © Copyright 2010, Hewlett-Packard Development Company, L.P. **/ /** **/ /** Confidential computer software. Valid license from HP and/or **/ /** its subsidiaries required for possession, use, or copying. **/ /** **/ /** Consistent with FAR 12.211 and 12.212, Commercial Computer Software, **/ /** Computer Software Documentation, and Technical Data for Commercial **/ /** Items are licensed to the U.S. Government under vendor's standard **/ /** commercial license. **/ /** **/ /** Neither HP nor any of its subsidiaries shall be liable for technical **/ /** or editorial errors or omissions contained herein. The information **/ /** in this document is provided "as is" without warranty of any kind and **/ /** is subject to change without notice. The warranties for HP products **/ /** are set forth in the express limited warranty statements accompanying **/ /** such products. Nothing herein should be construed as constituting an **/ /** additional warranty. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 30-Mar-2010 17:37:40 by OpenVMS SDL EV3-3 */ /* Source: 09-MAY-2007 16:32:28 $1$DGA7274:[LIB_H.SRC]ADPDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $ADPDEF ***/ #ifndef __ADPDEF_LOADED #define __ADPDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* ADAPTER CONTROL BLOCK DEFINITIONS */ /* */ /* There is one ADP for each adapter on the system, where an adapter */ /* is defined as an interconnect between two busses or a multichannel */ /* device. ADPs are now arranged in a hierarchical structure reflecting */ /* the physical topology of the system and I/O buses. A special system ADP */ /* is placed at the root of the tree to represent a "virtual adapter" */ /* to the system bus. ADPs now contain a pointer to an array of */ /* information for each node on the remote bus to which the adapter */ /* connects. For example, the ADP for an XMI to BI adapter points to */ /* a 16-entry array for the 16 node BI bus. Each array entry contains */ /* several items including a hardware ID field, the base address of */ /* the node's CSR space, pointer(s) to data structure(s), a node */ /* number, and a bus-specific field. */ /* */ /* The ADP sometimes contains a pointer to a bus command table, which contains */ /* bit patterns representing commands on the target bus. These bit patterns */ /* are copied to the command field in the hardware mailbox for remote I/O */ /* bus register access on SRM-mailbox machines. */ /*- */ #include #define ADP$M_INDIRECT_VECTOR 0x1 #define ADP$M_ONLINE 0x2 #define ADP$M_BOOT_ADP 0x4 #define ADP$M_PCI_PCI_BRIDGE 0x8 #define ADP$M_EISA_PARENT 0x10 #define ADP$M_DEEP 0x20 #define ADP$M_PCI_MULTI 0x40 #define ADP$M_HCDP 0x80 #define ADP$M_MULTI_CHAN 0x100 #define ADP$M_SHUTDOWN 0x1 #define ADP$M_PORTONLY 0x2 #define ADP$M_STRUCT_ALLOCATED 0x4 #define ADP$M_DDMA64 0x1 #define ADP$M_DDMA_MONSTER 0x2 #define ADP$M_DDMA32 0x4 #define ADP$M_MAP_REGISTERS 0x8 #define ADP$M_BUFFER_COPYING 0x10 #define ADP$M_ALLOC_MAP_REGISTERS 0x20 #ifdef __cplusplus /* Define structure prototypes */ struct _crb; struct _busarray_header; struct _spl; struct _crab; struct _iohandle; #endif /* #ifdef __cplusplus */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _adp { #pragma __nomember_alignment __int64 adp$q_csr; /* Adapter control and status register */ unsigned short int adp$w_size; /* Structure size in bytes */ unsigned char adp$b_type; /* Structure type code */ unsigned char adp$b_number; /* Ordinal adapter number */ struct _adp *adp$l_link; /* Address of next adapter control block */ unsigned int adp$l_tr; /* Configuration TR number */ unsigned int adp$l_adptype; /* Software adapter type */ int (*adp$ps_node_data)(); /* Address of adapter specific node data routine */ void *adp$l_vector; /* Address of vector jump table */ struct _crb *adp$l_crb; /* Address of channel request block */ void *adp$ps_mbpr; /* Address of mailbox pointer register */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned __int64 adp$q_queue_time; /* Timeout value for mailbox queueing operation */ #pragma __nomember_alignment unsigned __int64 adp$q_wait_time; /* Timeout value for mailbox completion (DON bit set) */ struct _adp *adp$ps_parent_adp; /* Address of parent ADP (0 if this is the root ADP) */ struct _adp *adp$ps_peer_adp; /* Address of next ADP in peer list */ struct _adp *adp$ps_child_adp; /* Address of first child ADP */ unsigned int adp$l_probe_cmd; /* Command index used for probing bus */ struct _busarray_header *adp$ps_bus_array; /* Address of bus array */ void *adp$ps_command_tbl; /* Address of bus specific command table */ struct _spl *adp$ps_spinlock; /* Address of spinlock structure */ /* For a bus-to-bus adapter, the node_num is the node number of the adapter */ /* on the primary bus. The sec_node_num is the node number of the adapter */ /* on the remote bus. Whether these fields are used or not depends on how */ /* the bus and adapter hardware are designed. Examples: for xmi, the lamb */ /* xmi node number is stored in sec_node_num. For the other XMI */ /* adapters, the xmi node number is stored in node_num and sec_node_num is */ /* not used. */ __union { unsigned short int adp$w_node_num; unsigned short int adp$w_prim_node_num; /* Primary node number */ } adp$r_node_num_overlay; unsigned short int adp$w_sec_node_num; /* Secondary node number */ unsigned short int adp$w_fill2 [1]; /* Keep alignment */ unsigned char adp$b_hose_num; /* I/O adapter hose number */ unsigned char adp$b_fill3 [1]; /* Keep alignment */ __union { /* ADP specific cell */ void *adp$ps_adp_specific2; unsigned int adp$l_adp_specific2; unsigned int adp$l_hw_location; /* Geographic locator */ unsigned int adp$l_a32_free_items; /* Fbus specific usage */ } adp$r_adp_specific2_overlay; __union { /* ADP specific cell */ void *adp$ps_adp_specific3; unsigned int adp$l_adp_specific3; unsigned int adp$l_a64_item_num; /* Fbus specific usage */ } adp$r_adp_specific3_overlay; struct _crab *adp$l_crab; /* Address of map register control block */ __union { unsigned int adp$l_adapter_flags; __struct { /* Adapter flags field */ unsigned adp$v_indirect_vector : 1; /* Indirect vectored interrupts */ unsigned adp$v_online : 1; /* Adapter is online */ unsigned adp$v_boot_adp : 1; /* Adapter is boot adapter */ unsigned adp$v_pci_pci_bridge : 1; /* Adapter represents a PCI/PCI bridge */ unsigned adp$v_eisa_parent : 1; /* EISA ADP is this adp's child */ unsigned adp$v_deep : 1; /* Multiple IRQs per SCB */ unsigned adp$v_pci_multi : 1; /* ADP represents a */ /* multifunction device */ unsigned adp$v_hcdp : 1; /* ADP for HCDP console devices */ unsigned adp$v_multi_chan : 1; /* ADP for multi-channel device */ unsigned adp$v_fill_4_ : 7; } adp$r_adapter_flag_bits; } adp$r_adapter_flags_overlay; unsigned int adp$l_reserved1; /* Reserved for future expansion */ __union { __int64 adp$q_hw_id_mask; /* Hardware ID mask 64-bits */ __struct { int adp$l_hw_id_mask_lo; /* Hardware ID mask low 32-bits */ int adp$l_hw_id_mask_hi; /* Hardware ID mask high 32-bits */ } adp$r_adp_hw_id_mask_ints; } adp$r_adp_hw_id_mask_overlay; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif __union { #pragma __nomember_alignment CBB adp$r_cbb_cpu_affinity; /* Embedded CBB block */ __struct { /* Compatability offset cells */ __int64 adp$q_cbb_fill_1 [6]; __union { unsigned int adp$l_cpu_affinity; /* Records CPUs which devices have affinity with */ unsigned __int64 adp$q_cpu_affinity; /* Records CPUs which devices have affinity with */ } adp$r_cbb_cpuaff_data_overlay; } adp$r_cbb_cpuaff_compat_overlay; } adp$r_cbb_cpuaff_overlay; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif int (*adp$ps_node_function)(); /* Address of adapter-specific node function routine */ #pragma __nomember_alignment __union { unsigned int adp$l_vportsts; /* CI - Vax port status bits */ __struct { unsigned adp$v_shutdown : 1; /* CI - adapter microcode is stopped */ unsigned adp$v_portonly : 1; /* CI - port restart only -- no adapter restart */ unsigned adp$v_struct_allocated : 1; /* CI/SCSI - adapter-wide structures allocated */ unsigned adp$v_fill_5_ : 5; } adp$r_vportsts_bits; } adp$r_vportsts_overlay; void *adp$l_avector; /* Addr of 1ST SCB vector for this adaptor */ char adp$b_fill_6_ [4]; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned __int64 adp$q_scratch_buf_pa; #pragma __nomember_alignment void *adp$ps_scratch_buf_va; /* VA, PA, and length of a physically */ unsigned int adp$l_scratch_buf_len; /* contiguous memory block */ void *adp$l_lsdump; /* Address of physical contiguous */ /* memory for the adapter memory dump. */ int (*adp$ps_probe_csr)(); /* Address of adapter-specific probe CSR routine */ int (*adp$ps_probe_csr_cleanup)(); /* Address of adapter-specific probe CSR cleanup routine */ int (*adp$ps_load_map_reg)(); /* Address of adapter-specific load map register routine */ int (*adp$ps_shutdown)(); /* Address of adapter-specific shutdown routine */ void *adp$ps_config_table; /* Pointer to autoconfiguration table */ void *adp$ps_map_reg_base; /* Base virtual address of adapter map registers */ __union { void *adp$ps_adp_specific; /* ADP specific cell */ void *adp$ps_adp_specific1; unsigned int adp$l_adp_specific1; unsigned int adp$l_a32_item_num; /* Fbus specific usage */ void *adp$ps_ablk; /* PNDRIVER specific usage */ void *adp$ps_ioc_base_va; /* IPF - SVA of IOC register base */ } adp$r_adp_specific1_overlay; int (*adp$ps_disable_interrupts)(); /* Address of adapter-specific disable interrupts routine */ int (*adp$ps_startup)(); /* Address of adapter-specific startup routine */ int (*adp$ps_init)(); /* Address of adapter-specific initialization routine */ __union { /* ADP specific cell */ void *adp$ps_adp_specific4; unsigned int adp$l_adp_specific4; unsigned int adp$l_a64_free_items; /* Fbus specific usage */ unsigned int adp$l_total_sg_entries; /* For PCI specific usage with memory channel */ } adp$r_adp_specific4_overlay; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif __int64 adp$q_hardware_type; /* Saved hardware device type and revision */ #pragma __nomember_alignment __int64 adp$q_hardware_rev; /* info. Interpretation in adapter-specific. */ int (*adp$ps_cram_cmd)(); /* Address of adapter-specific cram init routine */ int (*adp$ps_read_pci_config)(); /* Address of adapter-specific read pci config routine */ int (*adp$ps_write_pci_config)(); /* Address of adapter-specific write pci config routine */ int (*adp$ps_map_io)(); /* Address of adapter-specific I/O space mapping routine */ int (*adp$ps_read_io)(); /* Address of adapter-specific read I/O space routine */ int (*adp$ps_write_io)(); /* Address of adapter-specific write I/O space routine */ struct _iohandle *adp$ps_iohandle_flink; /* Pointer to IOHANDLE structures associated with this bus */ struct _iohandle *adp$ps_iohandle_blink; /* Pointer to IOHANDLE structures associated with this bus */ /* Make sure that INTD has quadword alignment */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned int adp$l_intd [4]; /* Interrupt transfer vector */ #pragma __nomember_alignment unsigned int adp$l_bus_num; /* Bus number. Used for systems with remote PCI */ /* buses for Type1 config space address generation. */ unsigned short int adp$w_fpars_sba_uid; /* SBA UID as short integer */ unsigned char adp$b_fpars_ioc_no; /* IOC number from low byte of UID */ unsigned char adp$b_fpars_rope_no; /* Rope number from ACPI _SUN method */ __union { __int64 adp$q_pci_node_num; /* PCI node number of PCI/PCI bridge adapter */ __struct { __struct { __union { int adp$l_pci_node_num_l; __struct { unsigned int adp$l_pci_node_num; /* Unsigned on Alpha, signed on IA64 */ } adp$r_fill_3_; } adp$r_fill_2_; int adp$l_pci_node_num_h; } adp$r_pnn_long_struct; } adp$r_fill_1_; } adp$r_fill_0_; /* Make sure that SINTD has quadword alignment */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif unsigned int adp$l_sintd [4]; /* Shared Interrupt transfer vector */ #pragma __nomember_alignment unsigned __int64 adp$q_hw_handle; /* An opaque hw_handle to match this ADP with its hardware */ unsigned __int64 adp$q_parent_hh; /* Hardware Handle of this ADP's parent. */ void *adp$ps_prt; /* Pointer to the PCI Routing Table */ int (*adp$ps_unload_map_reg)(); /* Address of adapter-specific unload map register routine */ __int64 adp$q_iotlb_ibase; /* IOTLB IOVA base */ __int64 adp$q_iotlb_imask; /* IOTLB IOVA mask; defines IOVA size */ __int64 adp$q_iotlb_pa; /* Physical address of IOTLB */ unsigned __int64 adp$q_ioc_base_pa; /* IPF Physical address of IOC registers */ /* */ /* The TRA_OFFSET identifier is being deprecated in favor of */ /* the TRA_MMIO identifier, since we need a TRA for Port IO */ /* space as well. */ /* */ __union { unsigned __int64 adp$q_tra_mmio; unsigned __int64 adp$q_tra_offset; /* Offset between I/O and system views of MMIO */ } adp$r_tra_mmio_overlay; unsigned __int64 adp$q_hid; /* ACPI Object Hardware ID field */ unsigned __int64 adp$q_uid; /* ACPI Object Unique ID field */ __union { /* This provides a cell for the ADP-specific */ __int64 adp$q_init_io_bridge; /* init_io_bridge routine, if one exists. */ int (*adp$ps_init_io_bridge)(); } adp$r_init_io_bridge_overlay; unsigned __int64 adp$q_sal_handle; /* Identify shared FPars resouce to SAL */ void *adp$ps_config; /* Short pointer to GPSCONFIG struct */ /* These flags describe the types of DMA that are supported by the PLATFORM. Putting */ /* the flags at the ADP level allows additional flexibility on platforms where DMA */ /* capabilities vary by, for example, I/O controller. */ /* */ /* Device drivers use the same set of flag values to describe the DMA capabilities */ /* supported by the driver. Note that capabilities may not be uniform across all */ /* driver functions; for example, command/response rings may be constrained to exist */ /* below 4GB at the same time that the driver/adapter support 64-bit transfer addresses. */ /* */ __union { unsigned int adp$l_mapping_flags; __struct { unsigned adp$v_ddma64 : 1; /* 64-bit DDMA available */ unsigned adp$v_ddma_monster : 1; /* DDMA Monster window */ unsigned adp$v_ddma32 : 1; /* 32-bit DDMA available */ unsigned adp$v_map_registers : 1; /* Map registers available */ unsigned adp$v_buffer_copying : 1; /* Copying to/from system buffers */ unsigned adp$v_alloc_map_registers : 1; /* Allocate map regs before load */ unsigned adp$v_fill_7_ : 2; } adp$r_mapping_flag_bits; } adp$r_mapping_capabilities_overlay; __union { unsigned __int64 adp$q_reserved14; /* Reserved for future expansion */ __struct { void *adp$ps_devslots; /* Short Pointer to SLOT Objects */ int adp$l_devslot_count; /* Number of Device SLOT Objects */ } adp$r_devslot_struct; } adp$r_rsvd14; /* Cells that describe the 32-bit Direct DMA window */ /* */ unsigned __int64 adp$q_dma_base_pa; /* Base physical address of window */ unsigned __int64 adp$q_dma_size; /* Size of window */ unsigned __int64 adp$q_dma_paba_32; /* PA to bus address offset */ /* Cells that describe the 64-bit Direct DMA window */ /* */ unsigned __int64 adp$q_dma_paba_64; /* PA to bus address offset */ unsigned __int64 adp$q_reserved19; /* Reserved for future expansion */ unsigned __int64 adp$q_reserved20; /* Reserved for future expansion */ unsigned __int64 adp$q_reserved21; /* Reserved for future expansion */ unsigned __int64 adp$q_reserved22; /* Reserved for future expansion */ unsigned __int64 adp$q_reserved23; /* Reserved for future expansion */ unsigned __int64 adp$q_reserved24; /* Reserved for future expansion */ } ADP; #if !defined(__VAXC) #define adp$w_node_num adp$r_node_num_overlay.adp$w_node_num #define adp$w_prim_node_num adp$r_node_num_overlay.adp$w_prim_node_num #define adp$ps_adp_specific2 adp$r_adp_specific2_overlay.adp$ps_adp_specific2 #define adp$l_adp_specific2 adp$r_adp_specific2_overlay.adp$l_adp_specific2 #define adp$l_hw_location adp$r_adp_specific2_overlay.adp$l_hw_location #define adp$l_a32_free_items adp$r_adp_specific2_overlay.adp$l_a32_free_items #define adp$ps_adp_specific3 adp$r_adp_specific3_overlay.adp$ps_adp_specific3 #define adp$l_adp_specific3 adp$r_adp_specific3_overlay.adp$l_adp_specific3 #define adp$l_a64_item_num adp$r_adp_specific3_overlay.adp$l_a64_item_num #define adp$l_adapter_flags adp$r_adapter_flags_overlay.adp$l_adapter_flags #define adp$v_indirect_vector adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_indirect_vector #define adp$v_online adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_online #define adp$v_boot_adp adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_boot_adp #define adp$v_pci_pci_bridge adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_pci_pci_bridge #define adp$v_eisa_parent adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_eisa_parent #define adp$v_deep adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_deep #define adp$v_pci_multi adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_pci_multi #define adp$v_hcdp adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_hcdp #define adp$v_multi_chan adp$r_adapter_flags_overlay.adp$r_adapter_flag_bits.adp$v_multi_chan #define adp$q_hw_id_mask adp$r_adp_hw_id_mask_overlay.adp$q_hw_id_mask #define adp$l_hw_id_mask_lo adp$r_adp_hw_id_mask_overlay.adp$r_adp_hw_id_mask_ints.adp$l_hw_id_mask_lo #define adp$l_hw_id_mask_hi adp$r_adp_hw_id_mask_overlay.adp$r_adp_hw_id_mask_ints.adp$l_hw_id_mask_hi #define adp$r_cbb_cpu_affinity adp$r_cbb_cpuaff_overlay.adp$r_cbb_cpu_affinity #define adp$l_cpu_affinity adp$r_cbb_cpuaff_overlay.adp$r_cbb_cpuaff_compat_overlay.adp$r_cbb_cpuaff_data_overlay.adp$l_cpu_affinity #define adp$q_cpu_affinity adp$r_cbb_cpuaff_overlay.adp$r_cbb_cpuaff_compat_overlay.adp$r_cbb_cpuaff_data_overlay.adp$q_cpu_affinity #define adp$l_vportsts adp$r_vportsts_overlay.adp$l_vportsts #define adp$v_shutdown adp$r_vportsts_overlay.adp$r_vportsts_bits.adp$v_shutdown #define adp$v_portonly adp$r_vportsts_overlay.adp$r_vportsts_bits.adp$v_portonly #define adp$v_struct_allocated adp$r_vportsts_overlay.adp$r_vportsts_bits.adp$v_struct_allocated #define adp$ps_adp_specific adp$r_adp_specific1_overlay.adp$ps_adp_specific #define adp$ps_adp_specific1 adp$r_adp_specific1_overlay.adp$ps_adp_specific1 #define adp$l_adp_specific1 adp$r_adp_specific1_overlay.adp$l_adp_specific1 #define adp$l_a32_item_num adp$r_adp_specific1_overlay.adp$l_a32_item_num #define adp$ps_ablk adp$r_adp_specific1_overlay.adp$ps_ablk #define adp$ps_ioc_base_va adp$r_adp_specific1_overlay.adp$ps_ioc_base_va #define adp$ps_adp_specific4 adp$r_adp_specific4_overlay.adp$ps_adp_specific4 #define adp$l_adp_specific4 adp$r_adp_specific4_overlay.adp$l_adp_specific4 #define adp$l_a64_free_items adp$r_adp_specific4_overlay.adp$l_a64_free_items #define adp$l_total_sg_entries adp$r_adp_specific4_overlay.adp$l_total_sg_entries #define adp$q_pci_node_num adp$r_fill_0_.adp$q_pci_node_num #define adp$l_pci_node_num_l adp$r_fill_0_.adp$r_fill_1_.adp$r_pnn_long_struct.adp$r_fill_2_.adp$l_pci_node_num_l #define adp$l_pci_node_num adp$r_fill_0_.adp$r_fill_1_.adp$r_pnn_long_struct.adp$r_fill_2_.adp$r_fill_3_.adp$l_pci_node_num #define adp$l_pci_node_num_h adp$r_fill_0_.adp$r_fill_1_.adp$r_pnn_long_struct.adp$l_pci_node_num_h #define adp$q_tra_mmio adp$r_tra_mmio_overlay.adp$q_tra_mmio #define adp$q_tra_offset adp$r_tra_mmio_overlay.adp$q_tra_offset #define adp$q_init_io_bridge adp$r_init_io_bridge_overlay.adp$q_init_io_bridge #define adp$ps_init_io_bridge adp$r_init_io_bridge_overlay.adp$ps_init_io_bridge #define adp$l_mapping_flags adp$r_mapping_capabilities_overlay.adp$l_mapping_flags #define adp$v_ddma64 adp$r_mapping_capabilities_overlay.adp$r_mapping_flag_bits.adp$v_ddma64 #define adp$v_ddma_monster adp$r_mapping_capabilities_overlay.adp$r_mapping_flag_bits.adp$v_ddma_monster #define adp$v_ddma32 adp$r_mapping_capabilities_overlay.adp$r_mapping_flag_bits.adp$v_ddma32 #define adp$v_map_registers adp$r_mapping_capabilities_overlay.adp$r_mapping_flag_bits.adp$v_map_registers #define adp$v_buffer_copying adp$r_mapping_capabilities_overlay.adp$r_mapping_flag_bits.adp$v_buffer_copying #define adp$v_alloc_map_registers adp$r_mapping_capabilities_overlay.adp$r_mapping_flag_bits.adp$v_alloc_map_registers #define adp$q_reserved14 adp$r_rsvd14.adp$q_reserved14 #define adp$ps_devslots adp$r_rsvd14.adp$r_devslot_struct.adp$ps_devslots #define adp$l_devslot_count adp$r_rsvd14.adp$r_devslot_struct.adp$l_devslot_count #endif /* #if !defined(__VAXC) */ #define ADP$K_CIADPLEN 544 /* Length of ADP for CI */ #define ADP$C_CIADPLEN 544 /* Length of ADP for CI */ #define ADP$K_NIADPLEN 544 /* Length of ADP for NI */ #define ADP$C_NIADPLEN 544 /* Length of ADP for NI */ #define ADP$K_GBIADPLEN 544 /* Length of ADP for Generic BI device */ #define ADP$C_GBIADPLEN 544 /* Length of ADP for Generic BI device */ #define ADP$K_MINADPLEN 544 /* Length of smallest available ADP */ #define ADP$C_MINADPLEN 544 /* Length of smallest available ADP */ #define ADP$S_ADPDEF 544 /* Old ADP size field for compatiblity */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __ADPDEF_LOADED */