--******************************************************************************************************************** -- Created: 30-Mar-2010 17:33:53 by OpenVMS SDL EV3-3 -- Source: 09-OCT-1995 13:44:01 $1$DGA7274:[LIB_ADA.LIS]HPCDEF.SDL;1 --******************************************************************************************************************** with SYSTEM; use SYSTEM; with STARLET; use STARLET; with CONDITION_HANDLING; use CONDITION_HANDLING; package HPCDEF is -- module $HPCDEF type HPC_DEVVEC_COMPONENT_TYPE is record D_INTA : UNSIGNED_LONGWORD; D_INT_FILL1 : UNSIGNED_LONGWORD_ARRAY (1 .. 31); D_INTB : UNSIGNED_LONGWORD; D_INT_FILL2 : UNSIGNED_LONGWORD_ARRAY (1 .. 31); D_INTC : UNSIGNED_LONGWORD; D_INT_FILL3 : UNSIGNED_LONGWORD_ARRAY (1 .. 31); D_INTD : UNSIGNED_LONGWORD; D_INT_FILL4 : UNSIGNED_LONGWORD_ARRAY (1 .. 31); end record; for HPC_DEVVEC_COMPONENT_TYPE use record D_INTA at 0 range 0 .. 31; D_INT_FILL1 at 4 range 0 .. 991; D_INTB at 128 range 0 .. 31; D_INT_FILL2 at 132 range 0 .. 991; D_INTC at 256 range 0 .. 31; D_INT_FILL3 at 260 range 0 .. 991; D_INTD at 384 range 0 .. 31; D_INT_FILL4 at 388 range 0 .. 991; end record; for HPC_DEVVEC_COMPONENT_TYPE'SIZE use 4096; HPC_DEVVEC_COMPONENT_TYPE_INIT : constant HPC_DEVVEC_COMPONENT_TYPE := (D_INTA => 0, D_INT_FILL1 => (others => 0), D_INTB => 0, D_INT_FILL2 => (others => 0), D_INTC => 0, D_INT_FILL3 => (others => 0), D_INTD => 0, D_INT_FILL4 => (others => 0)); TYPE HPC_DEVVEC_TYPE is ARRAY (1 .. 4) of HPC_DEVVEC_COMPONENT_TYPE; HPC_DEVVEC_TYPE_INIT : constant HPC_DEVVEC_TYPE := ( others => HPC_DEVVEC_COMPONENT_TYPE_INIT); type HPC_TYPE is record F00 : UNSIGNED_BYTE_ARRAY (1 .. 24); CTL : UNSIGNED_LONGWORD; F10 : UNSIGNED_BYTE_ARRAY (1 .. 124); MRETRY : UNSIGNED_LONGWORD; F20 : UNSIGNED_BYTE_ARRAY (1 .. 124); GPR : UNSIGNED_LONGWORD; F30 : UNSIGNED_BYTE_ARRAY (1 .. 124); ERR : UNSIGNED_LONGWORD; F40 : UNSIGNED_BYTE_ARRAY (1 .. 124); FADR : UNSIGNED_LONGWORD; F50 : UNSIGNED_BYTE_ARRAY (1 .. 124); IMASK : UNSIGNED_LONGWORD; F60 : UNSIGNED_BYTE_ARRAY (1 .. 124); DIAG : UNSIGNED_LONGWORD; F70 : UNSIGNED_BYTE_ARRAY (1 .. 124); IPEND : UNSIGNED_LONGWORD; F80 : UNSIGNED_BYTE_ARRAY (1 .. 124); IPROG : UNSIGNED_LONGWORD; F90 : UNSIGNED_BYTE_ARRAY (1 .. 124); WMASK_A : UNSIGNED_LONGWORD; F100 : UNSIGNED_BYTE_ARRAY (1 .. 124); WBASE_A : UNSIGNED_LONGWORD; F110 : UNSIGNED_BYTE_ARRAY (1 .. 124); TBASE_A : UNSIGNED_LONGWORD; F120 : UNSIGNED_BYTE_ARRAY (1 .. 124); WMASK_B : UNSIGNED_LONGWORD; F130 : UNSIGNED_BYTE_ARRAY (1 .. 124); WBASE_B : UNSIGNED_LONGWORD; F140 : UNSIGNED_BYTE_ARRAY (1 .. 124); TBASE_B : UNSIGNED_LONGWORD; F150 : UNSIGNED_BYTE_ARRAY (1 .. 124); WMASK_C : UNSIGNED_LONGWORD; F160 : UNSIGNED_BYTE_ARRAY (1 .. 124); WBASE_C : UNSIGNED_LONGWORD; F170 : UNSIGNED_BYTE_ARRAY (1 .. 124); TBASE_C : UNSIGNED_LONGWORD; F180 : UNSIGNED_BYTE_ARRAY (1 .. 124); ERRVEC : UNSIGNED_LONGWORD; F190 : UNSIGNED_BYTE_ARRAY (1 .. 1788); DEVVEC : HPC_DEVVEC_COMPONENT_TYPE; end record; for HPC_TYPE use record F00 at 0 range 0 .. 191; CTL at 24 range 0 .. 31; F10 at 28 range 0 .. 991; MRETRY at 152 range 0 .. 31; F20 at 156 range 0 .. 991; GPR at 280 range 0 .. 31; F30 at 284 range 0 .. 991; ERR at 408 range 0 .. 31; F40 at 412 range 0 .. 991; FADR at 536 range 0 .. 31; F50 at 540 range 0 .. 991; IMASK at 664 range 0 .. 31; F60 at 668 range 0 .. 991; DIAG at 792 range 0 .. 31; F70 at 796 range 0 .. 991; IPEND at 920 range 0 .. 31; F80 at 924 range 0 .. 991; IPROG at 1048 range 0 .. 31; F90 at 1052 range 0 .. 991; WMASK_A at 1176 range 0 .. 31; F100 at 1180 range 0 .. 991; WBASE_A at 1304 range 0 .. 31; F110 at 1308 range 0 .. 991; TBASE_A at 1432 range 0 .. 31; F120 at 1436 range 0 .. 991; WMASK_B at 1560 range 0 .. 31; F130 at 1564 range 0 .. 991; WBASE_B at 1688 range 0 .. 31; F140 at 1692 range 0 .. 991; TBASE_B at 1816 range 0 .. 31; F150 at 1820 range 0 .. 991; WMASK_C at 1944 range 0 .. 31; F160 at 1948 range 0 .. 991; WBASE_C at 2072 range 0 .. 31; F170 at 2076 range 0 .. 991; TBASE_C at 2200 range 0 .. 31; F180 at 2204 range 0 .. 991; ERRVEC at 2328 range 0 .. 31; F190 at 2332 range 0 .. 14303; DEVVEC at 4120 range 0 .. 16383; end record; for HPC_TYPE'SIZE use 49344; HPC_TYPE_INIT : constant HPC_TYPE := (F00 => (others => 0), CTL => 0, F10 => (others => 0), MRETRY => 0, F20 => (others => 0), GPR => 0, F30 => (others => 0), ERR => 0, F40 => (others => 0), FADR => 0, F50 => (others => 0), IMASK => 0, F60 => (others => 0), DIAG => 0, F70 => (others => 0), IPEND => 0, F80 => (others => 0), IPROG => 0, F90 => (others => 0), WMASK_A => 0, F100 => (others => 0), WBASE_A => 0, F110 => (others => 0), TBASE_A => 0, F120 => (others => 0), WMASK_B => 0, F130 => (others => 0), WBASE_B => 0, F140 => (others => 0), TBASE_B => 0, F150 => (others => 0), WMASK_C => 0, F160 => (others => 0), WBASE_C => 0, F170 => (others => 0), TBASE_C => 0, F180 => (others => 0), ERRVEC => 0, F190 => (others => 0), DEVVEC => HPC_DEVVEC_TYPE_INIT); type IACK_TYPE is record FILLER_1 : UNSIGNED_10; FILLER_2 : UNSIGNED_22; end record; for IACK_TYPE use record FILLER_1 at 0 range 0 .. 9; FILLER_2 at 1 range 2 .. 23; end record; for IACK_TYPE'SIZE use 32; IACK_TYPE_INIT : constant IACK_TYPE := (FILLER_1 => 0, FILLER_2 => 0); type IACK_TYPE is record F210 : UNSIGNED_BYTE_ARRAY (1 .. 24); IACK : IACK_TYPE; end record; for IACK_TYPE use record F210 at 0 range 0 .. 191; IACK at 24 range 0 .. 31; end record; for IACK_TYPE'SIZE use 224; IACK_TYPE_INIT : constant IACK_TYPE := (F210 => (others => 0), IACK => IACK_TYPE_INIT ); type HPC_REG_CTL_TYPE is record CONFIG_CYCLE_TYPE : UNSIGNED_2; MEMORY_BLOCK_SIZE : BOOLEAN; PCI_RESET : BOOLEAN; PCI_CT_THRESHOLD : UNSIGNED_4; PCI_CT_ENABLE : BOOLEAN; IO_HAE : UNSIGNED_5; MEMORY_HAE : UNSIGNED_5; HAE_DISABLE : BOOLEAN; MRM_ARB : BOOLEAN; MRM_ENABLE : BOOLEAN; MRM_PREFETCH_SIZE : BOOLEAN; IO_UPHOSE_BUFF : UNSIGNED_2; SGM_RAM_SIZE : UNSIGNED_2; PCI_ARB_CONTROL : UNSIGNED_2; FILLER_1 : UNSIGNED_3; end record; for HPC_REG_CTL_TYPE use record CONFIG_CYCLE_TYPE at 0 range 0 .. 1; MEMORY_BLOCK_SIZE at 0 range 2 .. 2; PCI_RESET at 0 range 3 .. 3; PCI_CT_THRESHOLD at 0 range 4 .. 7; PCI_CT_ENABLE at 1 range 0 .. 0; IO_HAE at 1 range 1 .. 5; MEMORY_HAE at 1 range 6 .. 10; HAE_DISABLE at 2 range 3 .. 3; MRM_ARB at 2 range 4 .. 4; MRM_ENABLE at 2 range 5 .. 5; MRM_PREFETCH_SIZE at 2 range 6 .. 6; IO_UPHOSE_BUFF at 2 range 7 .. 8; SGM_RAM_SIZE at 3 range 1 .. 2; PCI_ARB_CONTROL at 3 range 3 .. 4; FILLER_1 at 3 range 5 .. 7; end record; for HPC_REG_CTL_TYPE'SIZE use 32; HPC_REG_CTL_TYPE_INIT : constant HPC_REG_CTL_TYPE := (CONFIG_CYCLE_TYPE => 0, MEMORY_BLOCK_SIZE => FALSE, PCI_RESET => FALSE, PCI_CT_THRESHOLD => 0, PCI_CT_ENABLE => FALSE, IO_HAE => 0, MEMORY_HAE => 0, HAE_DISABLE => FALSE, MRM_ARB => FALSE, MRM_ENABLE => FALSE, MRM_PREFETCH_SIZE => FALSE, IO_UPHOSE_BUFF => 0, SGM_RAM_SIZE => 0, PCI_ARB_CONTROL => 0, FILLER_1 => 0); type HPC_CTL_TYPE is record REG_CTL : HPC_REG_CTL_TYPE; end record; for HPC_CTL_TYPE use record REG_CTL at 0 range 0 .. 31; end record; for HPC_CTL_TYPE'SIZE use 32; HPC_CTL_TYPE_INIT : constant HPC_CTL_TYPE := ( REG_CTL => HPC_REG_CTL_TYPE_INIT ); type HPC_REG_IMASK_TYPE is record INT : UNSIGNED_WORD; ENABLE_ERRINT : BOOLEAN; DEVICE_PRIORITY : UNSIGNED_4; ERROR_PRIORITY : UNSIGNED_4; MBZ : UNSIGNED_7; end record; for HPC_REG_IMASK_TYPE use record INT at 0 range 0 .. 15; ENABLE_ERRINT at 2 range 0 .. 0; DEVICE_PRIORITY at 2 range 1 .. 4; ERROR_PRIORITY at 2 range 5 .. 8; MBZ at 3 range 1 .. 7; end record; for HPC_REG_IMASK_TYPE'SIZE use 32; HPC_REG_IMASK_TYPE_INIT : constant HPC_REG_IMASK_TYPE := (INT => 0, ENABLE_ERRINT => FALSE, DEVICE_PRIORITY => 0, ERROR_PRIORITY => 0, MBZ => 0); type HPC_IMASK_TYPE is record REG_IMASK : HPC_REG_IMASK_TYPE; end record; for HPC_IMASK_TYPE use record REG_IMASK at 0 range 0 .. 31; end record; for HPC_IMASK_TYPE'SIZE use 32; HPC_IMASK_TYPE_INIT : constant HPC_IMASK_TYPE := ( REG_IMASK => HPC_REG_IMASK_TYPE_INIT ); type HPC_REG_PRESENT_TYPE is record PCI_0_SLOT_0 : UNSIGNED_2; PCI_0_SLOT_1 : UNSIGNED_2; PCI_0_SLOT_2 : UNSIGNED_2; PCI_0_SLOT_3 : UNSIGNED_2; PCI_1_SLOT_0 : UNSIGNED_2; PCI_1_SLOT_1 : UNSIGNED_2; PCI_1_SLOT_2 : UNSIGNED_2; PCI_1_SLOT_3 : UNSIGNED_2; PCI_2_SLOT_0 : UNSIGNED_2; PCI_2_SLOT_1 : UNSIGNED_2; PCI_2_SLOT_2 : UNSIGNED_2; PCI_2_SLOT_3 : UNSIGNED_2; STANDARD_IO : BOOLEAN; REVISION : UNSIGNED_4; PRESENT_MBZ : UNSIGNED_3; end record; for HPC_REG_PRESENT_TYPE use record PCI_0_SLOT_0 at 0 range 0 .. 1; PCI_0_SLOT_1 at 0 range 2 .. 3; PCI_0_SLOT_2 at 0 range 4 .. 5; PCI_0_SLOT_3 at 0 range 6 .. 7; PCI_1_SLOT_0 at 1 range 0 .. 1; PCI_1_SLOT_1 at 1 range 2 .. 3; PCI_1_SLOT_2 at 1 range 4 .. 5; PCI_1_SLOT_3 at 1 range 6 .. 7; PCI_2_SLOT_0 at 2 range 0 .. 1; PCI_2_SLOT_1 at 2 range 2 .. 3; PCI_2_SLOT_2 at 2 range 4 .. 5; PCI_2_SLOT_3 at 2 range 6 .. 7; STANDARD_IO at 3 range 0 .. 0; REVISION at 3 range 1 .. 4; PRESENT_MBZ at 3 range 5 .. 7; end record; for HPC_REG_PRESENT_TYPE'SIZE use 32; HPC_REG_PRESENT_TYPE_INIT : constant HPC_REG_PRESENT_TYPE := (PCI_0_SLOT_0 => 0, PCI_0_SLOT_1 => 0, PCI_0_SLOT_2 => 0, PCI_0_SLOT_3 => 0, PCI_1_SLOT_0 => 0, PCI_1_SLOT_1 => 0, PCI_1_SLOT_2 => 0, PCI_1_SLOT_3 => 0, PCI_2_SLOT_0 => 0, PCI_2_SLOT_1 => 0, PCI_2_SLOT_2 => 0, PCI_2_SLOT_3 => 0, STANDARD_IO => FALSE, REVISION => 0, PRESENT_MBZ => 0); type HPC_PRESENT_TYPE is record REG_PRESENT : HPC_REG_PRESENT_TYPE; end record; for HPC_PRESENT_TYPE use record REG_PRESENT at 0 range 0 .. 31; end record; for HPC_PRESENT_TYPE'SIZE use 32; HPC_PRESENT_TYPE_INIT : constant HPC_PRESENT_TYPE := ( REG_PRESENT => HPC_REG_PRESENT_TYPE_INIT ); end HPCDEF;